Searched +full:0 +full:x0a6f8800 (Results 1 – 8 of 8) sorted by relevance
/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdx75.dtsi | 32 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #size-cells = <0>; 46 cpu0: cpu@0 { 49 reg = <0x0 0x0>; 50 clocks = <&cpufreq_hw 0>; 54 qcom,freq-domain = <&cpufreq_hw 0>; 75 reg = <0x0 0x100>; 76 clocks = <&cpufreq_hw 0>; 80 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
|
H A D | sm8350.dtsi | 38 #clock-cells = <0>; 46 #clock-cells = <0>; 52 #size-cells = <0>; 54 cpu0: cpu@0 { 57 reg = <0x0 0x0>; 58 clocks = <&cpufreq_hw 0>; 61 qcom,freq-domain = <&cpufreq_hw 0>; 81 reg = <0x0 0x100>; 82 clocks = <&cpufreq_hw 0>; 85 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
|
H A D | sm8150.dtsi | 34 #clock-cells = <0>; 41 #clock-cells = <0>; 49 #size-cells = <0>; 51 cpu0: cpu@0 { 54 reg = <0x0 0x0>; 55 clocks = <&cpufreq_hw 0>; 60 qcom,freq-domain = <&cpufreq_hw 0>; 62 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 83 reg = <0x0 0x100>; 84 clocks = <&cpufreq_hw 0>; [all …]
|
H A D | sm8550.dtsi | 38 #clock-cells = <0>; 43 #clock-cells = <0>; 47 #clock-cells = <0>; 55 #clock-cells = <0>; 65 #size-cells = <0>; 67 cpu0: cpu@0 { 70 reg = <0 0>; 71 clocks = <&cpufreq_hw 0>; 76 qcom,freq-domain = <&cpufreq_hw 0>; 96 reg = <0 0x100>; [all …]
|
H A D | sa8775p.dtsi | 29 #clock-cells = <0>; 34 #clock-cells = <0>; 40 #size-cells = <0>; 42 cpu0: cpu@0 { 45 reg = <0x0 0x0>; 47 qcom,freq-domain = <&cpufreq_hw 0>; 67 reg = <0x0 0x100>; 69 qcom,freq-domain = <&cpufreq_hw 0>; 84 reg = <0x0 0x200>; 86 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
|
H A D | sm8650.dtsi | 40 #clock-cells = <0>; 45 #clock-cells = <0>; 50 #clock-cells = <0>; 59 #clock-cells = <0>; 69 #size-cells = <0>; 71 cpu0: cpu@0 { 74 reg = <0 0>; 76 clocks = <&cpufreq_hw 0>; 86 qcom,freq-domain = <&cpufreq_hw 0>; 107 reg = <0 0x100>; [all …]
|
H A D | x1e80100.dtsi | 36 #clock-cells = <0>; 42 #clock-cells = <0>; 47 #clock-cells = <0>; 56 #clock-cells = <0>; 66 #size-cells = <0>; 68 cpu0: cpu@0 { 71 reg = <0x0 0x0>; 88 reg = <0x0 0x100>; 99 reg = <0x0 0x200>; 110 reg = <0x0 0x300>; [all …]
|
H A D | sm8250.dtsi | 80 #clock-cells = <0>; 88 #clock-cells = <0>; 94 #size-cells = <0>; 96 cpu0: cpu@0 { 99 reg = <0x0 0x0>; 100 clocks = <&cpufreq_hw 0>; 107 qcom,freq-domain = <&cpufreq_hw 0>; 109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 115 cache-size = <0x20000>; 121 cache-size = <0x400000>; [all …]
|