Searched +full:0 +full:x088ea000 (Results 1 – 9 of 9) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | qcom,qmp-usb3-dp-phy.yaml | 83 "^usb3-phy@[0-9a-f]+$": 113 const: 0 116 const: 0 124 "^dp-phy@[0-9a-f]+$": 143 const: 0 181 reg = <0x088e9000 0x18c>, 182 <0x088e8000 0x10>, 183 <0x088ea000 0x40>; 187 ranges = <0x0 0x088e9000 0x2000>; 203 reg = <0x200 0x128>, [all …]
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H A D | qcom,sc7180-qmp-usb3-dp-phy.yaml | 92 "^usb3-phy@[0-9a-f]+$": 122 const: 0 125 const: 0 133 "^dp-phy@[0-9a-f]+$": 152 const: 0 237 reg = <0x088e9000 0x18c>, 238 <0x088e8000 0x10>, 239 <0x088ea000 0x40>; 243 ranges = <0x0 0x088e9000 0x2000>; 261 reg = <0x200 0x128>, [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sa8775p.dtsi | 25 #clock-cells = <0>; 30 #clock-cells = <0>; 36 #size-cells = <0>; 38 CPU0: cpu@0 { 41 reg = <0x0 0x0>; 43 qcom,freq-domain = <&cpufreq_hw 0>; 61 reg = <0x0 0x100>; 63 qcom,freq-domain = <&cpufreq_hw 0>; [all...] |
H A D | sc8180x.dtsi | 28 #clock-cells = <0>; 34 #clock-cells = <0>; 42 #size-cells = <0>; 44 CPU0: cpu@0 { 47 reg = <0x0 0x0>; 51 qcom,freq-domain = <&cpufreq_hw 0>; 58 clocks = <&cpufreq_hw 0>; 76 reg = <0x0 0x10 [all...] |
H A D | sc7180.dtsi | 66 #clock-cells = <0>; 72 #clock-cells = <0>; 78 #size-cells = <0>; 80 CPU0: cpu@0 { 83 reg = <0x0 0x0>; 84 clocks = <&cpufreq_hw 0>; 95 qcom,freq-domain = <&cpufreq_hw 0>; 112 reg = <0x0 0x10 [all...] |
H A D | sc8280xp.dtsi | 33 #clock-cells = <0>; 38 #clock-cells = <0>; 45 #size-cells = <0>; 47 CPU0: cpu@0 { 50 reg = <0x0 0x0>; 51 clocks = <&cpufreq_hw 0>; 57 qcom,freq-domain = <&cpufreq_hw 0>; 77 reg = <0x0 0x10 [all...] |
H A D | sdm845.dtsi | 77 #clock-cells = <0>; 84 #clock-cells = <0>; 91 #size-cells = <0>; 93 CPU0: cpu@0 { 96 reg = <0x0 0x0>; 97 clocks = <&cpufreq_hw 0>; 101 qcom,freq-domain = <&cpufreq_hw 0>; 125 reg = <0x0 0x10 [all...] |
H A D | sm8250.dtsi | 82 #clock-cells = <0>; 90 #clock-cells = <0>; 96 #size-cells = <0>; 98 CPU0: cpu@0 { 101 reg = <0x0 0x0>; 102 clocks = <&cpufreq_hw 0>; 109 qcom,freq-domain = <&cpufreq_hw 0>; 111 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, [all...] |
H A D | sc7280.dtsi | 80 #clock-cells = <0>; 86 #clock-cells = <0>; 97 reg = <0x0 0x004cd000 0x0 0x1000>; 101 reg = <0x0 0x80000000 0x0 0x60000 [all...] |