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/linux/drivers/of/unittest-data/
H A Dtests-address.dtsi17 ranges = <0x70000000 0x70000000 0x50000000>,
18 <0x00000000 0xd0000000 0x20000000>;
19 dma-ranges = <0x0 0x20000000 0x40000000>;
22 reg = <0x70000000 0x1000>;
28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>;
29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>;
32 reg = <0x0 0x1000 0x0 0x1000>;
40 reg = <0x90000000 0x1000>;
41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>;
42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>,
[all …]
/linux/tools/perf/pmu-events/arch/riscv/sifive/u74/
H A Dinstructions.json
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq8064-rb3011.dts25 pinctrl-0 = <&buttons_pins>;
39 pinctrl-0 = <&leds_pins>;
42 led-0 {
51 reg = <0x42000000 0x3e000000>;
55 mdio0: mdio-0 {
59 <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
61 #size-cells = <0>;
63 pinctrl-0 = <&mdio0_pins>;
69 dsa,member = <0 0>;
71 pinctrl-0 = <&sw0_reset_pin>;
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dmicrochip,lan966x-switch.yaml20 pattern: "^(ethernet-)?switch@[0-9a-f]+$"
68 const: 0
73 "^(ethernet-)?port@[0-9a-f]+$":
83 const: 0
143 reg = <0xe0000000 0x0100000>,
144 <0xe2000000 0x0800000>;
148 resets = <&switch_reset 0>;
152 #size-cells = <0>;
154 port0: ethernet-port@0 {
155 reg = <0>;
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-topkick.dts13 reg = <0x00000000 0x10000000>;
34 pinctrl-0 = <&pmx_sw_left &pmx_sw_right
103 pinctrl-0 = <&pmx_sdio>;
125 pinctrl-0 = <&pmx_led_disk_yellow &pmx_led_sys_red
156 #size-cells = <0>;
157 pinctrl-0 = <&pmx_sata0_pwr_enable>;
169 gpio = <&gpio1 4 0>;
177 partition@0 {
179 reg = <0x0000000 0x180000>;
184 reg = <0x0180000 0x20000>;
[all …]
H A Dkirkwood-netgear_readynas_nv+_v2.dts19 reg = <0x00000000 0x10000000>;
83 #clock-cells = <0>;
93 reg = <0x32>;
98 reg = <0x3e>;
100 fan_gear_mode = <0>;
102 pwm_polarity = <0>;
132 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_backup
171 pinctrl-0 = <&pmx_button_power &pmx_button_backup
196 pinctrl-0 = <&pmx_poweroff>;
204 #size-cells = <0>;
[all …]
H A Darmada-370-netgear-rn102.dts22 memory@0 {
24 reg = <0x00000000 0x20000000>; /* 512 MB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
50 pinctrl-0 = <&ge1_rgmii_pins>;
64 pinctrl-0 = <&i2c0_pins>;
71 reg = <0x68>;
77 reg = <0x3e>;
79 fan_gear_mode = <0>;
[all …]
H A Darmada-370-netgear-rn104.dts22 memory@0 {
24 reg = <0x00000000 0x20000000>; /* 512 MB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
44 pinctrl-0 = <&ge0_rgmii_pins>;
52 pinctrl-0 = <&ge1_rgmii_pins>;
66 pinctrl-0 = <&i2c0_pins>;
73 reg = <0x68>;
79 reg = <0x3e>;
[all …]
H A Darmada-xp-netgear-rn2120.dts22 memory@0 {
24 reg = <0 0x00000000 0 0x80000000>; /* 2GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
30 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
31 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
48 reg = <0x3e>;
50 fan_gear_mode = <0>;
52 pwm_polarity = <0>;
58 reg = <0x48>;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Ddra7-evm-common.dtsi90 #size-cells = <0>;
123 <&dra7_pmx_core 0x3e0>;
138 flash@0 {
141 reg = <0>;
152 partition@0 {
154 reg = <0x00000000 0x00010000>;
158 reg = <0x00010000 0x00010000>;
162 reg = <0x00020000 0x00010000>;
166 reg = <0x00030000 0x00010000>;
170 reg = <0x00040000 0x00100000>;
[all …]
H A Ddra72-evm-common.dtsi129 #size-cells = <0>;
131 port@0 {
132 reg = <0>;
194 #clock-cells = <0>;
202 DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
203 DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
209 DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
210 DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
221 reg = <0x20>;
230 reg = <0x21>;
[all …]
/linux/arch/arm/mach-versatile/
H A Dintegrator-hardware.h14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
40 #define INTEGRATOR_SSRAM_BASE 0x00000000
41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
44 #define INTEGRATOR_FLASH_BASE 0x24000000
47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
53 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
/linux/arch/mips/include/asm/sn/sn0/
H A Dkldir.h28 * 0x2000000 (32M) +-----------------------------------------+
30 * 0x1F80000 (31.5M) +-----------------------------------------+
32 * 0x1C00000 (30M) +-----------------------------------------+
34 * 0x0800000 (28M) +-----------------------------------------+
36 * 0x1B00000 (27M) +-----------------------------------------+
38 * 0x1A00000 (26M) +-----------------------------------------+
40 * 0x1800000 (24M) +-----------------------------------------+
42 * 0x1600000 (22M) +-----------------------------------------+
48 * 0x190000 (2M--) +-----------------------------------------+
51 * 0x34000 (208K) +-----------------------------------------+
[all …]
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2g-ice.dts18 reg = <0x00000008 0x00000000 0x00000000 0x20000000>;
28 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
128 <&pca9536 0 GPIO_ACTIVE_HIGH>;
129 linux,axis = <0>; /* ABS_X */
136 pinctrl-0 = <&user_leds>;
223 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
224 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
230 K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */
231 K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */
232 K2G_CORE_IOPAD(0x120c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d0.qspi_d0 */
[all …]
H A Dkeystone-k2g-evm.dts17 reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
27 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
72 #clock-cells = <0>;
76 sound0: sound@0 {
88 simple-audio-card,dai-link@0 {
94 clocks = <&k2g_clks 0x6 1>;
110 clocks = <&k2g_clks 0x6 1>;
125 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
126 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
132 K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */
[all …]
/linux/arch/microblaze/kernel/
H A Dhead.S55 #if CONFIG_KERNEL_BASE_ADDR == 0
57 .org 0x100
64 addi r8, r0, 0xFFFFFFFF
70 * r8 == 0 - msr instructions are implemented
71 * r8 != 0 - msr instructions are not implemented
74 msrclr r8, 0 /* clear nothing - just read msr for test */
84 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
97 ori r3, r0, (0x10000 - 4)
124 addik r5, r4, 0 /* add new space for command line */
178 or r9, r0, r0 /* TLB0 = 0 */
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dlan966x.dtsi27 #size-cells = <0>;
29 cpu@0 {
33 reg = <0x0>;
40 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
68 reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>;
90 reg = <0x00200000 0x80000>,
91 <0xe0808000 0x400>;
[all …]
/linux/drivers/infiniband/hw/hfi1/
H A Dchip_registers.h9 #define CORE 0x000000000000
10 #define CCE (CORE + 0x000000000000)
11 #define ASIC (CORE + 0x000000400000)
12 #define MISC (CORE + 0x000000500000)
13 #define DC_TOP_CSRS (CORE + 0x000000600000)
14 #define CHIP_DEBUG (CORE + 0x000000700000)
15 #define RXE (CORE + 0x000001000000)
16 #define TXE (CORE + 0x000001800000)
17 #define DCC_CSRS (DC_TOP_CSRS + 0x000000000000)
18 #define DC_LCB_CSRS (DC_TOP_CSRS + 0x000000001000)
[all …]
/linux/include/linux/greybus/
H A Dgreybus_protocols.h15 #define GB_SVC_DEVICE_ID_SVC 0
20 #define GB_SVC_CPORT_ID 0
21 #define GB_CONTROL_BUNDLE_ID 0
22 #define GB_CONTROL_CPORT_ID 0
32 * (0x80) of the operation type field is used to indicate whether
56 #define GB_REQUEST_TYPE_CPORT_SHUTDOWN 0x00
57 #define GB_REQUEST_TYPE_INVALID 0x7f
67 #define GB_CONTROL_TYPE_VERSION 0x01
68 #define GB_CONTROL_TYPE_PROBE_AP 0x02
69 #define GB_CONTROL_TYPE_GET_MANIFEST_SIZE 0x03
[all …]
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x.h42 #define DRV_MODULE_VERSION "1.713.36-0"
43 #define BNX2X_BC_VER 0x040200
77 #define BNX2X_MSG_OFF 0x0
78 #define BNX2X_MSG_MCP 0x0010000 /* was: NETIF_MSG_HW */
79 #define BNX2X_MSG_STATS 0x0020000 /* was: NETIF_MSG_TIMER */
80 #define BNX2X_MSG_NVM 0x0040000 /* was: NETIF_MSG_HW */
81 #define BNX2X_MSG_DMAE 0x0080000 /* was: NETIF_MSG_HW */
82 #define BNX2X_MSG_SP 0x0100000 /* was: NETIF_MSG_INTR */
83 #define BNX2X_MSG_FP 0x0200000 /* was: NETIF_MSG_INTR */
84 #define BNX2X_MSG_IOV 0x0800000
[all …]
/linux/sound/pci/rme9652/
H A Dhdspm.c39 * :1098.7654:3210.9876:5432.1098:7654.3210: 0..31
44 * : . : . : . : x. : HDSPM_ClockModeMaster - 1: Master, 0: Slave
46 * : . : . : . : . : 0:64, 1:128, 2:256, 3:512,
49 … . : . : . :10 . : HDSPM_Frequency1|HDSPM_Frequency0: 1=32K,2=44.1K,3=48K,0=??
57 * : . : . 10: . : . : <MADI> sync ref: 0:WC, 1:Madi, 2:TCO, 3:SyncIn
58 * : . 3 : . 10: 2 . : . : <AES32> 0:WC, 1:AES1 ... 8:AES8, 9: TCO, 10:SyncIn?
60 * : . : . : x . : . : <MADI> HDSPM_InputSelect0 : 0=optical,1=coax
86 * :1098.7654:3210.9876:5432.1098:7654.3210: 0..31
98 * :7654.3210:7654.3210:7654.3210:7654.3210: 0..31
101 * : . : . : . : . x: HDSPM_c0Master 1: Master, 0: Slave
[all …]
/linux/drivers/scsi/qla4xxx/
H A Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]
/linux/drivers/net/ethernet/nvidia/
H A Dforcedeth.c66 #define DEV_NEED_TIMERIRQ 0x0000001 /* set the timer irq flag in the irq mask */
67 #define DEV_NEED_LINKTIMER 0x0000002 /* poll link settings. Relies on the timer irq */
68 #define DEV_HAS_LARGEDESC 0x0000004 /* device supports jumbo frames and needs packet form…
69 #define DEV_HAS_HIGH_DMA 0x0000008 /* device supports 64bit dma */
70 #define DEV_HAS_CHECKSUM 0x0000010 /* device supports tx and rx checksum offloads */
71 #define DEV_HAS_VLAN 0x0000020 /* device supports vlan tagging and striping */
72 #define DEV_HAS_MSI 0x0000040 /* device supports MSI */
73 #define DEV_HAS_MSI_X 0x0000080 /* device supports MSI-X */
74 #define DEV_HAS_POWER_CNTRL 0x0000100 /* device supports power savings */
75 #define DEV_HAS_STATISTICS_V1 0x0000200 /* device supports hw statistics version 1 */
[all …]