Searched +full:0 +full:x05e94400 (Results  1 – 6 of 6) sorted by relevance
| /linux/Documentation/devicetree/bindings/display/msm/ | 
| H A D | qcom,qcm2290-mdss.yaml | 49   "^display-controller@[0-9a-f]+$": 57   "^dsi@[0-9a-f]+$": 67   "^phy@[0-9a-f]+$": 93         reg = <0x05e00000 0x1000>; 110         iommus = <&apps_smmu 0x420 0x2>, 111                  <&apps_smmu 0x421 0x0>; 116             reg = <0x05e01000 0x8f000>, 117                   <0x05eb0000 0x2008>; 131             interrupts = <0>; 135                 #size-cells = <0>; [all …] 
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| H A D | qcom,sm6115-mdss.yaml | 43   "^display-controller@[0-9a-f]+$": 51   "^dsi@[0-9a-f]+$": 65   "^phy@[0-9a-f]+$": 90         reg = <0x05e00000 0x1000>; 101         iommus = <&apps_smmu 0x420 0x2>, 102                  <&apps_smmu 0x421 0x0>; 107             reg = <0x05e01000 0x8f000>, 108                   <0x05eb0000 0x2008>; 123             interrupts = <0>; 127                 #size-cells = <0>; [all …] 
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| H A D | qcom,sm6125-mdss.yaml | 48   "^display-controller@[0-9a-f]+$": 56   "^dsi@[0-9a-f]+$": 66   "^phy@[0-9a-f]+$": 86         reg = <0x05e00000 0x1000>; 102         iommus = <&apps_smmu 0x400 0x0>; 110             reg = <0x05e01000 0x83208>, 111                   <0x05eb0000 0x2008>; 115             interrupts = <0>; 139                 #size-cells = <0>; 141                 port@0 { [all …] 
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| H A D | qcom,sm6375-mdss.yaml | 48   "^display-controller@[0-9a-f]+$": 56   "^dsi@[0-9a-f]+$": 66   "^phy@[0-9a-f]+$": 86         reg = <0x05e00000 0x1000>; 100         iommus = <&apps_smmu 0x820 0x2>; 107             reg = <0x05e01000 0x8e030>, 108                   <0x05eb0000 0x2008>; 133             interrupts = <0>; 137                 #size-cells = <0>; 139                 port@0 { [all …] 
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| /linux/arch/arm64/boot/dts/qcom/ | 
| H A D | sm6125.dtsi | 25 			#clock-cells = <0>; 31 			#clock-cells = <0>; 39 		#size-cells = <0>; 41 		cpu0: cpu@0 { 44 			reg = <0x0 0x0>; 58 			reg = <0x0 0x1>; 67 			reg = <0x0 0x2>; 76 			reg = <0x0 0x3>; 85 			reg = <0x0 0x100>; 99 			reg = <0x0 0x101>; [all …] 
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| H A D | sm6115.dtsi | 34 			#clock-cells = <0>; 39 			#clock-cells = <0>; 45 		#size-cells = <0>; 47 		cpu0: cpu@0 { 50 			reg = <0x0 0x0>; 51 			clocks = <&cpufreq_hw 0>; 56 			qcom,freq-domain = <&cpufreq_hw 0>; 69 			reg = <0x0 0x1>; 70 			clocks = <&cpufreq_hw 0>; 75 			qcom,freq-domain = <&cpufreq_hw 0>; [all …] 
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