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/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-herobrine-lte-sku.dtsi12 reg = <0x0 0x9c700000 0x0 0x200000>;
17 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
18 size = <0x0 0x4000>;
31 reg = <0 0x04080000 0 0x10000>, <0 0x04180000 0 0x48>;
41 iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
42 interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
51 qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>;
52 qcom,ext-regs = <&tcsr_2 0x10000 0x10004 &tcsr_1 0x6004 0x6008>;
53 qcom,qaccept-regs = <&tcsr_1 0x3030 0x3040 0x3020>;
60 reg = <0x0 0x9c900000 0x0 0x800000>;
H A Dsc7180-idp.dts51 reg = <0x0 0x94600000 0x0 0x800000>;
57 reg = <0x0 0x80b00000 0x0 0x100000>;
62 reg = <0x0 0x86000000 0x0 0x8c00000>;
67 reg = <0x0 0x8ec00000 0x0 0x500000>;
72 reg = <0 0x8f600000 0 0x500000>;
77 reg = <0x0 0x94100000 0x0 0x200000>;
82 reg = <0x0 0x94400000 0x0 0x200000>;
87 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
88 size = <0x0 0x4000>;
95 regulators-0 {
[all …]
H A Dsc7180-trogdor.dtsi24 thermal-sensors = <&pm6150_adc_tm 0>;
54 reg = <0x0 0x94600000 0x0 0x800000>;
60 reg = <0x0 0x80b00000 0x0 0x100000>;
65 reg = <0x0 0x86000000 0x0 0x2000000>;
70 reg = <0 0x8f600000 0 0x500000>;
75 reg = <0x0 0x94100000 0x0 0x200000>;
80 reg = <0x0 0x94400000 0x0 0x200000>;
85 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
86 size = <0x0 0x4000>;
185 pinctrl-0 = <&uf_cam_en>;
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sc7180-pas.yaml155 reg = <0x04080000 0x4040>;
161 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
177 qcom,smem-states = <&modem_smp2p_out 0>;
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx65.dtsi20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
25 reg = <0 0>;
33 #clock-cells = <0>;
40 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0>;
115 reg = <0x8fcad000 0x40000>;
120 reg = <0x8fcfd000 0x1000>;
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/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h27 #define mmCP_HYP_MEC1_UCODE_ADDR 0xf81a
28 #define mmCP_HYP_MEC1_UCODE_DATA 0xf81b
29 #define mmCP_HYP_MEC2_UCODE_ADDR 0xf81c
30 #define mmCP_HYP_MEC2_UCODE_DATA 0xf81d
49 { 0x00000000, mmRLC_CNTL },
50 { 0x00000002, mmRLC_SRM_CNTL },
51 { 0x15000000, mmCP_ME_CNTL },
52 { 0x50000000, mmCP_MEC_CNTL },
53 { 0x80000004, mmCP_DFY_CNTL },
54 { 0x0840800a, mmCP_RB0_CNTL },
[all …]
/linux/drivers/scsi/
H A Dipr.c28 * - RAID Levels 0, 5, 10
80 static unsigned int ipr_fastfail = 0;
81 static unsigned int ipr_transop_timeout = 0;
82 static unsigned int ipr_debug = 0;
92 .mailbox = 0x0042C,
94 .cache_line_size = 0x20,
96 .iopoll_weight = 0,
98 .set_interrupt_mask_reg = 0x0022C,
99 .clr_interrupt_mask_reg = 0x00230,
100 .clr_interrupt_mask_reg32 = 0x00230,
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