Home
last modified time | relevance | path

Searched +full:0 +full:x04080000 (Results 1 – 11 of 11) sorted by relevance

/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-herobrine-lte-sku.dtsi12 reg = <0x0 0x9c700000 0x0 0x200000>;
17 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
18 size = <0x0 0x4000>;
31 reg = <0 0x04080000 0 0x10000>, <0 0x04180000 0 0x48>;
41 iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
42 interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
51 qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>;
52 qcom,ext-regs = <&tcsr_2 0x10000 0x10004 &tcsr_1 0x6004 0x6008>;
53 qcom,qaccept-regs = <&tcsr_1 0x3030 0x3040 0x3020>;
60 reg = <0x0 0x9c900000 0x0 0x800000>;
H A Dsc7180-trogdor.dtsi24 thermal-sensors = <&pm6150_adc_tm 0>;
53 reg = <0x0 0x94600000 0x0 0x800000>;
59 reg = <0x0 0x80b00000 0x0 0x100000>;
64 reg = <0x0 0x86000000 0x0 0x2000000>;
69 reg = <0 0x8f600000 0 0x500000>;
74 reg = <0x0 0x94100000 0x0 0x200000>;
79 reg = <0x0 0x94400000 0x0 0x200000>;
84 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
85 size = <0x0 0x4000>;
184 pinctrl-0 = <&uf_cam_en>;
[all …]
H A Dsdx75.dtsi32 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #size-cells = <0>;
46 cpu0: cpu@0 {
49 reg = <0x0 0x0>;
50 clocks = <&cpufreq_hw 0>;
54 qcom,freq-domain = <&cpufreq_hw 0>;
75 reg = <0x0 0x100>;
76 clocks = <&cpufreq_hw 0>;
80 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsdm630.dtsi36 #clock-cells = <0>;
43 #clock-cells = <0>;
51 #size-cells = <0>;
56 reg = <0x0 0x100>;
76 reg = <0x0 0x101>;
91 reg = <0x0 0x102>;
106 reg = <0x0 0x103>;
118 cpu4: cpu@0 {
121 reg = <0x0 0x0>;
141 reg = <0x0 0x1>;
[all …]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sdx55-pas.yaml80 reg = <0x04080000 0x4040>;
86 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
99 qcom,smem-states = <&modem_smp2p_out 0>;
H A Dqcom,sc7180-pas.yaml155 reg = <0x04080000 0x4040>;
161 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
177 qcom,smem-states = <&modem_smp2p_out 0>;
H A Dqcom,sc7180-mss-pil.yaml198 reg = <0x04080000 0x10000>, <0x04180000 0x48>;
201 iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;
204 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
231 qcom,smem-states = <&modem_smp2p_out 0>;
238 qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
239 qcom,spare-regs = <&tcsr_regs 0xb3e4>;
H A Dqcom,sc7280-mss-pil.yaml216 reg = <0x04080000 0x10000>, <0x04180000 0x48>;
219 iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
221 interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
224 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
248 qcom,smem-states = <&modem_smp2p_out 0>;
255 qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
256 qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>;
257 qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx65.dtsi20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
25 reg = <0 0>;
33 #clock-cells = <0>;
40 #clock-cells = <0>;
46 #clock-cells = <0>;
52 #size-cells = <0>;
54 cpu0: cpu@0 {
57 reg = <0x0>;
115 reg = <0x8fcad000 0x40000>;
120 reg = <0x8fcfd000 0x1000>;
[all …]
/linux/drivers/scsi/
H A Dpmcraid.h33 #define PMCRAID_FW_VERSION_1 0x002
38 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */
44 #define PCI_VENDOR_ID_PMC 0x11F8
45 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220
92 #define PMCRAID_IOA_BUS_ID 0xfe
93 #define PMCRAID_IOA_TARGET_ID 0xff
94 #define PMCRAID_IOA_LUN_ID 0xff
95 #define PMCRAID_VSET_BUS_ID 0x1
96 #define PMCRAID_VSET_LUN_ID 0x0
97 #define PMCRAID_PHYS_BUS_ID 0x0
[all …]
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h27 #define mmCP_HYP_MEC1_UCODE_ADDR 0xf81a
28 #define mmCP_HYP_MEC1_UCODE_DATA 0xf81b
29 #define mmCP_HYP_MEC2_UCODE_ADDR 0xf81c
30 #define mmCP_HYP_MEC2_UCODE_DATA 0xf81d
49 { 0x00000000, mmRLC_CNTL },
50 { 0x00000002, mmRLC_SRM_CNTL },
51 { 0x15000000, mmCP_ME_CNTL },
52 { 0x50000000, mmCP_MEC_CNTL },
53 { 0x80000004, mmCP_DFY_CNTL },
54 { 0x0840800a, mmCP_RB0_CNTL },
[all …]