Home
last modified time | relevance | path

Searched +full:0 +full:x03500000 (Results 1 – 25 of 25) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,sc7180-pinctrl.yaml64 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
116 reg = <0x03500000 0x300000>,
117 <0x03900000 0x300000>,
118 <0x03d0000
[all...]
H A Dqcom,sc8180x-tlmm.yaml61 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
108 reg = <0x03100000 0x300000>,
109 <0x03500000 0x700000>,
110 <0x03d0000
[all...]
H A Dqcom,sm7150-tlmm.yaml67 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"
115 reg = <0x03500000 0x300000>,
116 <0x03900000 0x300000>,
117 <0x03d0000
[all...]
H A Dqcom,sc8180x-pinctrl.yaml72 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
120 pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
132 reg = <0x03100000 0x300000>,
133 <0x03500000 0x700000>,
134 <0x03d00000 0x300000>;
141 gpio-ranges = <&tlmm 0 0 190>;
H A Dqcom,sm8150-pinctrl.yaml65 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
117 reg = <0x03100000 0x300000>,
118 <0x03500000 0x30000
[all...]
H A Dqcom,sdm630-pinctrl.yaml69 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-3])$"
133 reg = <0x03100000 0x400000>,
134 <0x03500000 0x400000>,
135 <0x0390000
[all...]
H A Dqcom,sm8150-pinctrl.txt178 reg = <0x03100000 0x300000>,
179 <0x03500000 0x300000>,
180 <0x03900000 0x300000>,
181 <0x03D00000 0x300000>;
186 gpio-ranges = <&tlmm 0 0 175>;
187 gpio-reserved-ranges = <0 4>, <126 4>;
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls2088a.dtsi23 cpu0: cpu@0 {
26 reg = <0x0>;
27 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
36 reg = <0x1>;
37 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
46 reg = <0x100>;
56 reg = <0x101>;
66 reg = <0x200>;
76 reg = <0x201>;
86 reg = <0x300>;
[all …]
H A Dfsl-ls2080a.dtsi23 cpu0: cpu@0 {
26 reg = <0x0>;
27 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
36 reg = <0x1>;
37 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
46 reg = <0x100>;
56 reg = <0x101>;
66 reg = <0x200>;
76 reg = <0x201>;
86 reg = <0x300>;
[all …]
H A Dfsl-ls1088a.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
42 reg = <0x1>;
43 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
51 reg = <0x2>;
52 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
60 reg = <0x3>;
61 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1046a.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0>;
44 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
53 reg = <0x1>;
54 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
63 reg = <0x2>;
64 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
73 reg = <0x3>;
74 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1028a.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
31 i-cache-size = <0xc000>;
34 d-cache-size = <0x8000>;
45 reg = <0x1>;
47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
48 i-cache-size = <0xc000>;
51 d-cache-size = <0x8000>;
[all …]
H A Dfsl-ls1043a.dtsi37 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0>;
49 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
58 reg = <0x1>;
59 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
68 reg = <0x2>;
69 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
78 reg = <0x3>;
79 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-lx2160a.dtsi12 /memreserve/ 0x80000000 0x00010000;
26 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
35 d-cache-size = <0x8000>;
38 i-cache-size = <0xC000>;
50 reg = <0x1>;
51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
52 d-cache-size = <0x8000>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dc293pcie.dts46 reg = <0xf 0xffe1e000 0 0x2000>;
47 ranges = <0x0 0x0 0xf 0xec000000 0x04000000
48 0x1 0x0 0xf 0xff800000 0x00010000
49 0x2 0x0 0xf 0xffdf0000 0x00010000>;
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
58 reg = <0xf 0xffe0a000 0 0x1000>;
59 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0x80000000
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dqcom,ath11k.yaml270 reg = <0xc000000 0x2000000>;
271 interrupts = <0 320 1>,
272 <0 319 1>,
273 <0 318 1>,
274 <0 317 1>,
275 <0 316 1>,
276 <0 315 1>,
277 <0 314 1>,
278 <0 311 1>,
279 <0 310 1>,
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a.dtsi31 #size-cells = <0>;
36 reg = <0xf00>;
37 clocks = <&clockgen 1 0>;
44 reg = <0xf01>;
45 clocks = <&clockgen 1 0>;
50 memory@0 {
52 reg = <0x0 0x0 0x0 0x0>;
57 #clock-cells = <0>;
80 offset = <0xb0>;
81 mask = <0x02>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra186.dtsi20 reg = <0x0 0x00100000 0x0 0xf000>,
21 <0x0 0x0010f000 0x0 0x1000>;
27 reg = <0x0 0x220000
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm630.dtsi35 #clock-cells = <0>;
42 #clock-cells = <0>;
50 #size-cells = <0>;
55 reg = <0x0 0x100>;
75 reg = <0x0 0x101>;
90 reg = <0x0 0x102>;
105 reg = <0x0 0x103>;
117 CPU4: cpu@0 {
120 reg = <0x0 0x0>;
140 reg = <0x0 0x1>;
[all …]
H A Dsc8180x.dtsi29 #clock-cells = <0>;
35 #clock-cells = <0>;
43 #size-cells = <0>;
45 CPU0: cpu@0 {
48 reg = <0x0 0x0>;
52 qcom,freq-domain = <&cpufreq_hw 0>;
59 clocks = <&cpufreq_hw 0>;
77 reg = <0x0 0x100>;
81 qcom,freq-domain = <&cpufreq_hw 0>;
88 clocks = <&cpufreq_hw 0>;
[all …]
H A Dsc7180.dtsi66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #size-cells = <0>;
80 CPU0: cpu@0 {
83 reg = <0x0 0x0>;
84 clocks = <&cpufreq_hw 0>;
95 qcom,freq-domain = <&cpufreq_hw 0>;
112 reg = <0x0 0x100>;
113 clocks = <&cpufreq_hw 0>;
124 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8150.dtsi34 #clock-cells = <0>;
41 #clock-cells = <0>;
49 #size-cells = <0>;
51 CPU0: cpu@0 {
54 reg = <0x0 0x0>;
55 clocks = <&cpufreq_hw 0>;
60 qcom,freq-domain = <&cpufreq_hw 0>;
62 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
83 reg = <0x0 0x100>;
84 clocks = <&cpufreq_hw 0>;
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
39 #define AlignPC(pc_val) (pc_val & 0xFFFFFFFC) in LLDB_PLUGIN_DEFINE_ADV()
47 ::memset(&reg_info, 0, sizeof(RegisterInfo)); in LLDB_PLUGIN_DEFINE_ADV()
234 // FPA Registers 0-7 in LLDB_PLUGIN_DEFINE_ADV()
260 // Intel wireless MMX general purpose registers 0 - 7 XScale accumulator in LLDB_PLUGIN_DEFINE_ADV()
261 // register 0 - 7 (they do overlap with wCGR0 - wCGR7) in LLDB_PLUGIN_DEFINE_ADV()
287 // Intel wireless MMX data registers 0 - 15 in LLDB_PLUGIN_DEFINE_ADV()
423 // Intel wireless MMX control register in co-processor 0 - 7 in LLDB_PLUGIN_DEFINE_ADV()
604 // Valid return values are {1, 2, 3, 4}, with 0 signifying an error condition.
609 return 0; in CountITSize()
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]