Home
last modified time | relevance | path

Searched +full:0 +full:x0334 (Results 1 – 25 of 40) sorted by relevance

12

/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-pinfunc.h13 #define MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x0014 0x02a0 0x0000 5 0
14 #define MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x0018 0x02a4 0x0000 5 0
16 #define MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x001c 0x02a8 0x0000 5 0
17 #define MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0020 0x02ac 0x0000 5 0
18 #define MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0024 0x02b0 0x0000 5 0
19 #define MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0028 0x02b4 0x0000 5 0
20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0
21 #define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0030 0x02bc 0x0000 5 0
22 #define MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0034 0x02c0 0x0000 5 0
23 #define MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0038 0x02c4 0x0000 5 0
[all …]
H A Dimx6sll-pinfunc.h15 #define MX6SLL_PAD_WDOG_B__WDOG1_B 0x0014 0x02DC 0x0000 0x0 0x0
16 #define MX6SLL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x0014 0x02DC 0x0000 0x1 0x0
17 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0
18 #define MX6SLL_PAD_WDOG_B__GPIO3_IO18 0x0014 0x02DC 0x0000 0x5 0x0
19 #define MX6SLL_PAD_REF_CLK_24M__XTALOSC_REF_CLK_24M 0x0018 0x02E0 0x0000 0x0 0x0
20 #define MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x0018 0x02E0 0x068C 0x1 0x0
21 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0
22 #define MX6SLL_PAD_REF_CLK_24M__USB_OTG2_ID 0x0018 0x02E0 0x0560 0x3 0x0
23 #define MX6SLL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x0018 0x02E0 0x05AC 0x4 0x0
24 #define MX6SLL_PAD_REF_CLK_24M__GPIO3_IO21 0x0018 0x02E0 0x0000 0x5 0x0
[all …]
H A Dimx7d-pinfunc.h14 #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0000 0x0030 0x0000 0x0 0x0
15 #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT 0x0000 0x0030 0x0000 0x1 0x0
16 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0
17 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0
18 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0
19 #define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x0004 0x0034 0x0000 0x0 0x0
20 #define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x0004 0x0034 0x0000 0x1 0x0
21 #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3 0x0004 0x0034 0x0000 0x2 0x0
22 #define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK 0x0004 0x0034 0x0000 0x3 0x0
23 #define MX7D_PAD_LPSR_GPIO1_IO01__ANATOP_24M_OUT 0x0004 0x0034 0x0000 0x4 0x0
[all …]
H A Dimx7ulp-pinfunc.h15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0
16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0
17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1
18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1
19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1
20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0
21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0
22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0
23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0
24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmarvell,mvebu-sata-phy.yaml28 const: 0
43 reg = <0x84000 0x0334>;
46 #phy-cells = <0>;
H A Dphy-mvebu.txt17 reg = <0x84000 0x0334>;
20 #phy-cells = <0>;
40 reg = <0x18400 0x4>;
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dkirkwood.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
37 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */
38 MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */
39 MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */
42 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
43 pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
48 cle = <0>;
52 reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
[all …]
H A Ddove.dtsi22 #size-cells = <0>;
24 cpu0: cpu@0 {
28 reg = <0>;
34 marvell,tauros2-cache-features = <0>;
46 #size-cells = <0>;
51 pinctrl-0 = <&pmx_i2cmux_0>;
55 i2c0: i2c@0 {
56 reg = <0>;
58 #size-cells = <0>;
65 #size-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93-pinfunc.h13 #define MX93_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x01B0 0x03D8 0x0 0x0
14 #define MX93_PAD_DAP_TDI__MQS2_LEFT 0x0000 0x01B0 0x0000 0x1 0x0
15 #define MX93_PAD_DAP_TDI__CAN2_TX 0x0000 0x01B0 0x0000 0x3 0x0
16 #define MX93_PAD_DAP_TDI__FLEXIO2_FLEXIO30 0x0000 0x01B0 0x0000 0x4 0x0
17 #define MX93_PAD_DAP_TDI__GPIO3_IO28 0x0000 0x01B0 0x0000 0x5 0x0
18 #define MX93_PAD_DAP_TDI__LPUART5_RX 0x0000 0x01B0 0x0430 0x6 0x0
19 #define MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x01B4 0x03DC 0x0 0x0
20 #define MX93_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31 0x0004 0x01B4 0x0000 0x4 0x0
21 #define MX93_PAD_DAP_TMS_SWDIO__GPIO3_IO29 0x0004 0x01B4 0x0000 0x5 0x0
22 #define MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x0004 0x01B4 0x0000 0x6 0x0
[all …]
H A Dimx94-pinfunc.h10 #define IMX94_DSE_X1 0x2
11 #define IMX94_DSE_X2 0x6
12 #define IMX94_DSE_X3 0xe
13 #define IMX94_DSE_X4 0x1e
14 #define IMX94_DSE_X5 0x3e
15 #define IMX94_DSE_X6 0x7e
18 #define IMX94_FSEL_FAST 0x180
19 #define IMX94_FSEL_SLOW 0x100
22 #define IMX94_PU_ENABLE 0x200
23 #define IMX94_PU_DISABLE 0x0
[all …]
H A Dimx95-pinfunc.h13 #define IMX95_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x0204 0x0610 0x00 0x00
14 #define IMX95_PAD_DAP_TDI__NETCMIX_TOP_MQS2_LEFT 0x0000 0x0204 0x0000 0x01 0x00
15 #define IMX95_PAD_DAP_TDI__NETCMIX_TOP_NETC_TMR_1588_ALARM1 0x0000 0x0204 0x0000 0x02 0x00
16 #define IMX95_PAD_DAP_TDI__CAN2_TX 0x0000 0x0204 0x0000 0x03 0x00
17 #define IMX95_PAD_DAP_TDI__FLEXIO2_FLEXIO_BIT30 0x0000 0x0204 0x0000 0x04 0x00
18 #define IMX95_PAD_DAP_TDI__GPIO3_IO_BIT28 0x0000 0x0204 0x0000 0x05 0x00
19 #define IMX95_PAD_DAP_TDI__LPUART5_RX 0x0000 0x0204 0x0570 0x06 0x00
21 #define IMX95_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x0208 0x0614 0x00 0x00
22 #define IMX95_PAD_DAP_TMS_SWDIO__CAN4_TX 0x0004 0x0208 0x0000 0x02 0x00
23 #define IMX95_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO_BIT31 0x0004 0x0208 0x0000 0x04 0x00
[all …]
/freebsd/contrib/tcpdump/
H A Dchecksum.c40 if accum & 0x400:
41 accum ^= 0x633
46 sys.stdout.write("0x%04x, " % crc_table[i*8+j])
52 0x0000, 0x0233, 0x0255, 0x0066, 0x0299, 0x00aa, 0x00cc, 0x02ff,
53 0x0301, 0x0132, 0x0154, 0x0367, 0x0198, 0x03ab, 0x03cd, 0x01fe,
54 0x0031, 0x0202, 0x0264, 0x0057, 0x02a8, 0x009b, 0x00fd, 0x02ce,
55 0x0330, 0x0103, 0x0165, 0x0356, 0x01a9, 0x039a, 0x03fc, 0x01cf,
56 0x0062, 0x0251, 0x0237, 0x0004, 0x02fb, 0x00c8, 0x00ae, 0x029d,
57 0x0363, 0x0150, 0x0136, 0x0305, 0x01fa, 0x03c9, 0x03af, 0x019c,
58 0x0053, 0x0260, 0x0206, 0x0035, 0x02ca, 0x00f9, 0x009f, 0x02ac,
[all …]
/freebsd/share/i18n/csmapper/JIS/
H A DUCS@BMP%JISX0213-1.src5 SRC_ZONE 0x007E - 0xFF60
7 DST_INVALID 0xFFFF
30 0x00A0 = 0x2922
31 0x00A1 = 0x2923
32 0x00A4 = 0x2924
33 0x00A6 = 0x2925
34 0x00A9 = 0x2926
35 0x00AA = 0x2927
36 0x00AB = 0x2928
37 0x00AD = 0x2929
[all …]
H A DJISX0213-1%UCS@BMP.src5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_INVALID 0xFFFE
34 0x222F = 0xFF07 # 0x0027
35 0x2230 = 0xFF02 # 0x0022
36 0x2231 = 0xFF0D # 0x002D
37 0x2232 = 0xFF5E # 0x007E
38 0x2233 = 0x3033
39 0x2234 = 0x3034
40 0x2235 = 0x3035
41 0x2236 = 0x303B
[all …]
/freebsd/contrib/bc/src/
H A Ddata.c173 { NULL, 0, 0 },
286 "divide by 0",
346 "POSIX requires 0 or 1 comparison operators per condition",
417 { 0x1100, 0x115F }, { 0x231A, 0x231B }, { 0x2329, 0x232A },
418 { 0x23E9, 0x23EC }, { 0x23F0, 0x23F0 }, { 0x23F3, 0x23F3 },
419 { 0x25FD, 0x25FE }, { 0x2614, 0x2615 }, { 0x2648, 0x2653 },
420 { 0x267F, 0x267F }, { 0x2693, 0x2693 }, { 0x26A1, 0x26A1 },
421 { 0x26AA, 0x26AB }, { 0x26BD, 0x26BE }, { 0x26C4, 0x26C5 },
422 { 0x26CE, 0x26CE }, { 0x26D4, 0x26D4 }, { 0x26EA, 0x26EA },
423 { 0x26F2, 0x26F3 }, { 0x26F5, 0x26F5 }, { 0x26FA, 0x26FA },
[all …]
/freebsd/sys/dev/bge/
H A Dif_bgereg.h54 * device register space at offset 0x8000 to read any 32K chunk
60 * accessed directly. NIC memory addresses are offset by 0x01000000.
64 #define BGE_PAGE_ZERO 0x00000000
65 #define BGE_PAGE_ZERO_END 0x000000FF
66 #define BGE_SEND_RING_RCB 0x00000100
67 #define BGE_SEND_RING_RCB_END 0x000001FF
68 #define BGE_RX_RETURN_RING_RCB 0x00000200
69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF
70 #define BGE_STATS_BLOCK 0x00000300
71 #define BGE_STATS_BLOCK_END 0x00000AFF
[all …]
/freebsd/sys/dev/drm2/
H A Ddrm_pciids.h14 {0, 0, 0, NULL}
17 {0x3D3D, 0x0008, 0, "3DLabs GLINT Gamma G1"}, \
18 {0, 0, 0, NULL}
21 {0x8086, 0x1132, 0, "Intel i815 GMCH"}, \
22 {0x8086, 0x7121, 0, "Intel i810 GMCH"}, \
23 {0x8086, 0x7123, 0, "Intel i810-DC100 GMCH"}, \
24 {0x8086, 0x7125, 0, "Intel i810E GMCH"}, \
25 {0, 0, 0, NULL}
28 {0x8086, 0x2562, 0, "Intel i845G GMCH"}, \
29 {0x8086, 0x2572, 0, "Intel i865G GMCH"}, \
[all …]
/freebsd/sys/dev/usb/wlan/
H A Dif_urtw.c67 static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
70 int urtw_debug = 0;
71 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0,
74 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
75 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */
76 URTW_DEBUG_RESET = 0x00000004, /* reset processing */
77 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */
78 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */
79 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */
80 URTW_DEBUG_STAT = 0x00000040, /* statistic */
[all …]
/freebsd/tools/test/iconv/ref/
H A DEUC-JIS-20041 0x0000 = 0x0000
2 0x0001 = 0x0001
3 0x0002 = 0x0002
4 0x0003 = 0x0003
5 0x0004 = 0x0004
6 0x0005 = 0x0005
7 0x0006 = 0x0006
8 0x0007 = 0x0007
9 0x0008 = 0x0008
10 0x0009 = 0x0009
[all …]
H A DEUC-JIS-2004-rev1 0x0000 = 0x0000
2 0x0001 = 0x0001
3 0x0002 = 0x0002
4 0x0003 = 0x0003
5 0x0004 = 0x0004
6 0x0005 = 0x0005
7 0x0006 = 0x0006
8 0x0007 = 0x0007
9 0x0008 = 0x0008
10 0x0009 = 0x0009
[all …]
H A DUTF-16BE-rev1 0x00 = 0x0000
2 0x01 = 0x0100
3 0x02 = 0x0200
4 0x03 = 0x0300
5 0x04 = 0x0400
6 0x05 = 0x0500
7 0x06 = 0x0600
8 0x07 = 0x0700
9 0x08 = 0x0800
10 0x09 = 0x0900
[all …]
/freebsd/share/i18n/csmapper/CNS/
H A DCNS11643-5%UCS@SIP.src5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
13 # Unicode version: 5.0.0
47 0x2121 = 0x00D1
48 0x2122 = 0x00CB
49 0x2123 = 0x00C9
50 0x2124 = 0x010C
51 0x2125 = 0x0000
52 0x2126 = 0x0087
53 0x2127 = 0x010D
[all …]
H A DUCS@SIP%CNS11643-5.src5 SRC_ZONE 0x0000 - 0xFA1A
7 DST_INVALID 0xFFFF
13 # Unicode version: 5.0.0
47 0x0000 = 0x2125
48 0x0009 = 0x2133
49 0x0014 = 0x214D
50 0x0022 = 0x232F
51 0x0041 = 0x3072
52 0x0043 = 0x3323
53 0x006B = 0x2521
[all …]
/freebsd/tools/tools/locale/etc/charmaps/
H A DSJIS.TXT5 0x00 0x0000
6 0x01 0x0001
7 0x02 0x0002
8 0x03 0x0003
9 0x04 0x0004
10 0x05 0x0005
11 0x06 0x0006
12 0x07 0x0007
13 0x08 0x0008
14 0x09 0x0009
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Dreg.h8 #define R_AX_SYS_WL_EFUSE_CTRL 0x000A
11 #define R_AX_SYS_ISO_CTRL 0x0000
17 #define R_AX_SYS_FUNC_EN 0x0002
19 #define B_AX_FEN_BBRSTB BIT(0)
21 #define R_AX_SYS_PW_CTRL 0x0004
37 #define R_AX_SYS_CLK_CTRL 0x0008
40 #define R_AX_SYS_SWR_CTRL1 0x0010
43 #define R_AX_SYS_ADIE_PAD_PWR_CTRL 0x0018
47 #define R_AX_RSV_CTRL 0x001C
51 #define R_AX_AFE_LDO_CTRL 0x0020
[all …]

12