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/linux/Documentation/devicetree/bindings/ata/
H A Dceva,ahci-1v84.yaml43 OOB timing value for COMINIT parameter for port 0.
55 OOB timing value for COMWAKE parameter for port 0.
67 Burst timing value for COM parameter for port 0.
79 Retry interval timing value for port 0.
172 reg = <0xfd0c0000 0x200>;
174 interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
176 ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
177 ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
178 ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
179 ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
[all …]
/linux/drivers/net/can/spi/mcp251xfd/
H A Dmcp251xfd-crc16.c24 0x0000, 0x8005, 0x800f, 0x000a, 0x801b, 0x001e, 0x0014, 0x8011,
25 0x8033, 0x0036, 0x003c, 0x8039, 0x0028, 0x802d, 0x8027, 0x0022,
26 0x8063, 0x0066, 0x006c, 0x8069, 0x0078, 0x807d, 0x8077, 0x0072,
27 0x0050, 0x8055, 0x805f, 0x005a, 0x804b, 0x004e, 0x0044, 0x8041,
28 0x80c3, 0x00c6, 0x00cc, 0x80c9, 0x00d8, 0x80dd, 0x80d7, 0x00d2,
29 0x00f0, 0x80f5, 0x80ff, 0x00fa, 0x80eb, 0x00ee, 0x00e4, 0x80e1,
30 0x00a0, 0x80a5, 0x80af, 0x00aa, 0x80bb, 0x00be, 0x00b4, 0x80b1,
31 0x8093, 0x0096, 0x009c, 0x8099, 0x0088, 0x808d, 0x8087, 0x0082,
32 0x8183, 0x0186, 0x018c, 0x8189, 0x0198, 0x819d, 0x8197, 0x0192,
33 0x01b0, 0x81b5, 0x81bf, 0x01ba, 0x81ab, 0x01ae, 0x01a4, 0x81a1,
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
H A Dgpcgk208.fuc5.h3 /* 0x0000: gpc_mmio_list_head */
4 0x0000006c,
5 /* 0x0004: gpc_mmio_list_tail */
6 /* 0x0004: tpc_mmio_list_head */
7 0x0000006c,
8 /* 0x0008: tpc_mmio_list_tail */
9 /* 0x0008: unk_mmio_list_head */
10 0x0000006c,
11 /* 0x000c: unk_mmio_list_tail */
12 0x0000006c,
[all …]
H A Dgpcgm107.fuc5.h3 /* 0x0000: gpc_mmio_list_head */
4 0x0000006c,
5 /* 0x0004: gpc_mmio_list_tail */
6 /* 0x0004: tpc_mmio_list_head */
7 0x0000006c,
8 /* 0x0008: tpc_mmio_list_tail */
9 /* 0x0008: unk_mmio_list_head */
10 0x0000006c,
11 /* 0x000c: unk_mmio_list_tail */
12 0x0000006c,
[all …]
H A Dhubgm107.fuc5.h3 /* 0x0000: hub_mmio_list_head */
4 0x00000300,
5 /* 0x0004: hub_mmio_list_tail */
6 0x00000304,
7 /* 0x0008: gpc_count */
8 0x00000000,
9 /* 0x000c: rop_count */
10 0x00000000,
11 /* 0x0010: cmd_queue */
12 0x00000000,
[all …]
H A Dhubgk208.fuc5.h3 /* 0x0000: hub_mmio_list_head */
4 0x00000300,
5 /* 0x0004: hub_mmio_list_tail */
6 0x00000304,
7 /* 0x0008: gpc_count */
8 0x00000000,
9 /* 0x000c: rop_count */
10 0x00000000,
11 /* 0x0010: cmd_queue */
12 0x00000000,
[all …]
/linux/include/linux/mfd/mt6397/
H A Dregisters.h11 #define MT6397_CID 0x0100
12 #define MT6397_TOP_CKPDN 0x0102
13 #define MT6397_TOP_CKPDN_SET 0x0104
14 #define MT6397_TOP_CKPDN_CLR 0x0106
15 #define MT6397_TOP_CKPDN2 0x0108
16 #define MT6397_TOP_CKPDN2_SET 0x010A
17 #define MT6397_TOP_CKPDN2_CLR 0x010C
18 #define MT6397_TOP_GPIO_CKPDN 0x010E
19 #define MT6397_TOP_RST_CON 0x0114
20 #define MT6397_WRP_CKPDN 0x011A
[all …]
/linux/include/linux/mfd/mt6323/
H A Dregisters.h10 #define MT6323_CHR_CON0 0x0000
11 #define MT6323_CHR_CON1 0x0002
12 #define MT6323_CHR_CON2 0x0004
13 #define MT6323_CHR_CON3 0x0006
14 #define MT6323_CHR_CON4 0x0008
15 #define MT6323_CHR_CON5 0x000A
16 #define MT6323_CHR_CON6 0x000C
17 #define MT6323_CHR_CON7 0x000E
18 #define MT6323_CHR_CON8 0x0010
19 #define MT6323_CHR_CON9 0x0012
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
H A Dgt215.fuc3.h3 /* 0x0000: ctx_object */
4 0x00000000,
5 /* 0x0004: ctx_dma */
6 /* 0x0004: ctx_dma_query */
7 0x00000000,
8 /* 0x0008: ctx_dma_src */
9 0x00000000,
10 /* 0x000c: ctx_dma_dst */
11 0x00000000,
12 /* 0x0010: ctx_query_address_high */
[all …]
/linux/sound/soc/codecs/
H A Dzl38060.c37 #define HBI_FIRMWARE_PAGE 0xFF
38 #define ZL38_MAX_RAW_XFER 0x100
40 #define REG_TDMA_CFG_CLK 0x0262
42 #define CFG_CLK_PCLK_MASK (0x7ff << CFG_CLK_PCLK_SHIFT)
45 #define CFG_CLK_FSRATE_MASK 0x7
46 #define CFG_CLK_FSRATE_8KHZ 0x1
47 #define CFG_CLK_FSRATE_16KHZ 0x2
48 #define CFG_CLK_FSRATE_48KHZ 0x6
50 #define REG_CLK_CFG 0x0016
53 #define REG_CLK_STATUS 0x0014
[all …]
H A Drt5663.h15 #define RT5663_RESET 0x0000
16 #define RT5663_VENDOR_ID 0x00fd
17 #define RT5663_VENDOR_ID_1 0x00fe
18 #define RT5663_VENDOR_ID_2 0x00ff
20 #define RT5663_LOUT_CTRL 0x0001
21 #define RT5663_HP_AMP_2 0x0003
22 #define RT5663_MONO_OUT 0x0004
23 #define RT5663_MONO_GAIN 0x0007
25 #define RT5663_AEC_BST 0x000b
26 #define RT5663_IN1_IN2 0x000c
[all …]
/linux/drivers/scsi/fnic/
H A Dfnic.h59 #define FNIC_NO_FLAGS 0
60 #define FNIC_IO_INITIALIZED BIT(0)
86 #define FNIC_FC_RP_FLAGS_RETRY 0x1
89 #define PCI_VENDOR_ID_CISCO 0x1137
90 #define PCI_DEVICE_ID_CISCO_VIC_FC 0x0045 /* fc vnic */
93 #define PCI_DEVICE_ID_CISCO_SERENO 0x004e
94 #define PCI_DEVICE_ID_CISCO_CRUZ 0x007a /* Cruz */
95 #define PCI_DEVICE_ID_CISCO_BODEGA 0x0131 /* Bodega */
96 #define PCI_DEVICE_ID_CISCO_BEVERLY 0x025f /* Beverly */
99 #define PCI_SUBDEVICE_ID_CISCO_VASONA 0x004f /* vasona mezz */
[all …]
/linux/include/linux/mfd/mt6328/
H A Dregisters.h10 #define MT6328_STRUP_CON0 0x0000
11 #define MT6328_STRUP_CON2 0x0002
12 #define MT6328_STRUP_CON3 0x0004
13 #define MT6328_STRUP_CON4 0x0006
14 #define MT6328_STRUP_CON5 0x0008
15 #define MT6328_STRUP_CON6 0x000a
16 #define MT6328_STRUP_CON7 0x000c
17 #define MT6328_STRUP_CON8 0x000e
18 #define MT6328_STRUP_CON9 0x0010
19 #define MT6328_STRUP_CON10 0x0012
[all …]
/linux/fs/smb/client/
H A Dnterr.h26 #define NT_STATUS_MORE_ENTRIES 0x0105
27 #define NT_ERROR_INVALID_PARAMETER 0x0057
28 #define NT_ERROR_INSUFFICIENT_BUFFER 0x007a
29 #define NT_STATUS_1804 0x070c
30 #define NT_STATUS_NOTIFY_ENUM_DIR 0x010c
37 #define NT_STATUS_OK 0x0000
38 #define NT_STATUS_SOME_UNMAPPED 0x0107
39 #define NT_STATUS_BUFFER_OVERFLOW 0x80000005
40 #define NT_STATUS_NO_MORE_ENTRIES 0x8000001a
41 #define NT_STATUS_MEDIA_CHANGED 0x8000001c
[all …]
/linux/Documentation/driver-api/media/drivers/ccs/
H A Dccs-regs.asc19 module_model_id 0x0000 16
20 module_revision_number_major 0x0002 8
21 frame_count 0x0005 8
22 pixel_order 0x0006 8
23 - e GRBG 0
27 MIPI_CCS_version 0x0007 8
28 - e v1_0 0x10
29 - e v1_1 0x11
31 - f minor 0 3
32 data_pedestal 0x0008 16
[all …]
/linux/drivers/scsi/
H A D3w-9xxx.h58 {0x0000, "AEN queue empty"},
59 {0x0001, "Controller reset occurred"},
60 {0x0002, "Degraded unit detected"},
61 {0x0003, "Controller error occurred"},
62 {0x0004, "Background rebuild failed"},
63 {0x0005, "Background rebuild done"},
64 {0x0006, "Incomplete unit detected"},
65 {0x0007, "Background initialize done"},
66 {0x0008, "Unclean shutdown detected"},
67 {0x0009, "Drive timeout detected"},
[all …]
/linux/fs/exfat/
H A Dnls.c16 #define UTBL_COUNT (0x10000)
24 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007,
25 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f,
26 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017,
27 0x0018, 0x0019, 0x001a, 0x001b, 0x001c, 0x001d, 0x001e, 0x001f,
28 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027,
29 0x0028, 0x0029, 0x002a, 0x002b, 0x002c, 0x002d, 0x002e, 0x002f,
30 0x0030, 0x0031, 0x0032, 0x0033, 0x0034, 0x0035, 0x0036, 0x0037,
31 0x0038, 0x0039, 0x003a, 0x003b, 0x003c, 0x003d, 0x003e, 0x003f,
32 0x0040, 0x0041, 0x0042, 0x0043, 0x0044, 0x0045, 0x0046, 0x0047,
[all …]
/linux/fs/smb/server/
H A Dnterr.h16 #define NT_STATUS_MORE_ENTRIES 0x0105
17 #define NT_ERROR_INVALID_PARAMETER 0x0057
18 #define NT_ERROR_INSUFFICIENT_BUFFER 0x007a
19 #define NT_STATUS_1804 0x070c
20 #define NT_STATUS_NOTIFY_ENUM_DIR 0x010c
21 #define NT_STATUS_INVALID_LOCK_RANGE (0xC0000000 | 0x01a1)
27 #define NT_STATUS_OK 0x0000
28 #define NT_STATUS_SOME_UNMAPPED 0x0107
29 #define NT_STATUS_BUFFER_OVERFLOW 0x80000005
30 #define NT_STATUS_NO_MORE_ENTRIES 0x8000001a
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_4_1_0_offset.h29 // base address: 0x68000
30 …DAGB0_RDCLI0 0x0000
31 …e regDAGB0_RDCLI0_BASE_IDX 0
32 …DAGB0_RDCLI1 0x0001
33 …e regDAGB0_RDCLI1_BASE_IDX 0
34 …DAGB0_RDCLI2 0x0002
35 …e regDAGB0_RDCLI2_BASE_IDX 0
36 …DAGB0_RDCLI3 0x0003
37 …e regDAGB0_RDCLI3_BASE_IDX 0
38 …DAGB0_RDCLI4 0x0004
[all …]
H A Dmmhub_2_0_0_offset.h27 // base address: 0x68000
28 …DAGB0_RDCLI0 0x0000
29 …ne mmDAGB0_RDCLI0_BASE_IDX 0
30 …DAGB0_RDCLI1 0x0001
31 …ne mmDAGB0_RDCLI1_BASE_IDX 0
32 …DAGB0_RDCLI2 0x0002
33 …ne mmDAGB0_RDCLI2_BASE_IDX 0
34 …DAGB0_RDCLI3 0x0003
35 …ne mmDAGB0_RDCLI3_BASE_IDX 0
36 …DAGB0_RDCLI4 0x0004
[all …]
/linux/drivers/hid/
H A Dhid-ids.h17 #define USB_VENDOR_ID_258A 0x258a
18 #define USB_DEVICE_ID_258A_6A88 0x6a88
20 #define USB_VENDOR_ID_3M 0x0596
21 #define USB_DEVICE_ID_3M1968 0x0500
22 #define USB_DEVICE_ID_3M2256 0x0502
23 #define USB_DEVICE_ID_3M3266 0x0506
25 #define USB_VENDOR_ID_A4TECH 0x09da
26 #define USB_DEVICE_ID_A4TECH_WCP32PU 0x0006
27 #define USB_DEVICE_ID_A4TECH_X5_005D 0x000a
28 #define USB_DEVICE_ID_A4TECH_RP_649 0x001a
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/vpe/
H A Dvpe_6_1_0_offset.h29 // base address: 0x46000
30 …VPEC_DEC_START 0x0000
31 …e regVPEC_DEC_START_BASE_IDX 0
32 …VPEC_UCODE_ADDR 0x0001
33 …e regVPEC_UCODE_ADDR_BASE_IDX 0
34 …VPEC_UCODE_DATA 0x0002
35 …e regVPEC_UCODE_DATA_BASE_IDX 0
36 …VPEC_F32_CNTL 0x0003
37 …e regVPEC_F32_CNTL_BASE_IDX 0
38 …VPEC_VPEP_CTRL 0x0010
[all …]
/linux/drivers/media/i2c/ccs/
H A Dccs-regs.h20 #define CCS_R_MODULE_MODEL_ID CCI_REG16(0x0000)
21 #define CCS_R_MODULE_REVISION_NUMBER_MAJOR CCI_REG8(0x0002)
22 #define CCS_R_FRAME_COUNT CCI_REG8(0x0005)
23 #define CCS_R_PIXEL_ORDER CCI_REG8(0x0006)
24 #define CCS_PIXEL_ORDER_GRBG 0U
28 #define CCS_R_MIPI_CCS_VERSION CCI_REG8(0x0007)
29 #define CCS_MIPI_CCS_VERSION_V1_0 0x10
30 #define CCS_MIPI_CCS_VERSION_V1_1 0x11
32 #define CCS_MIPI_CCS_VERSION_MAJOR_MASK 0xf0
33 #define CCS_MIPI_CCS_VERSION_MINOR_SHIFT 0U
[all …]
/linux/drivers/input/mouse/
H A Dappletouch.c26 * 0 <= x <= (xsensors - 1) * xfact
27 * 0 <= y <= (ysensors - 1) * yfact
73 .fuzz = 0,
83 .fuzz = 0,
93 .fuzz = 0,
101 .idVendor = 0x05ac, /* Apple */ \
103 .bInterfaceClass = 0x03, \
104 .bInterfaceProtocol = 0x02, \
116 ATP_DEVICE(0x020e, fountain_info), /* FOUNTAIN ANSI */
117 ATP_DEVICE(0x020f, fountain_info), /* FOUNTAIN ISO */
[all …]
/linux/drivers/media/dvb-frontends/
H A Dlg2160.c33 __ret = (ret < 0); \
56 u8 buf[] = { reg >> 8, reg & 0xff, val }; in lg216x_write_reg()
58 .addr = state->cfg->i2c_addr, .flags = 0, in lg216x_write_reg()
62 lg_reg("reg: 0x%04x, val: 0x%02x\n", reg, val); in lg216x_write_reg()
68 msg.buf[0], msg.buf[1], msg.buf[2], ret); in lg216x_write_reg()
69 if (ret < 0) in lg216x_write_reg()
74 return 0; in lg216x_write_reg()
80 u8 reg_buf[] = { reg >> 8, reg & 0xff }; in lg216x_read_reg()
83 .flags = 0, .buf = reg_buf, .len = 2 }, in lg216x_read_reg()
88 lg_reg("reg: 0x%04x\n", reg); in lg216x_read_reg()
[all …]

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