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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos54xx.dtsi42 <7 0>,
60 reg = <0x02020000 0x54000>;
63 ranges = <0 0x02020000 0x54000>;
65 smp-sram@0 {
67 reg = <0x0 0x1000>;
72 reg = <0x53000 0x1000>;
79 reg = <0x101c0000 0xb00>;
96 reg = <0x101d0000 0x100>;
102 reg = <0x12d10000 0x100>;
111 reg = <0x12ca0000 0x1000>;
[all …]
H A Dexynos4210.dtsi178 #size-cells = <0>;
194 reg = <0x900>;
213 reg = <0x901>;
230 bus_leftbus_opp_table: opp-table-0 {
249 reg = <0x02020000 0x20000>;
252 ranges = <0 0x02020000
[all...]
H A Dexynos4x12.dtsi70 #interconnect-cells = <0>;
80 #interconnect-cells = <0>;
120 #interconnect-cells = <0>;
211 reg = <0x11400000 0x1000>;
217 reg = <0x11000000 0x1000>;
229 reg = <0x03860000 0x1000>;
231 interrupts = <10 0>;
[all...]
H A Dexynos3250.dtsi199 #size-cells = <0>;
212 cpu0: cpu@0 {
215 reg = <0>;
259 xusbxti: clock-0 {
261 clock-frequency = <0>;
262 #clock-cells = <0>;
268 clock-frequency = <0>;
269 #clock-cells = <0>;
275 clock-frequency = <0>;
276 #clock-cells = <0>;
[all …]
H A Dexynos5250.dtsi47 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
80 cpu0_opp_table: opp-table-0 {
176 reg = <0x02020000 0x30000>;
179 ranges = <0 0x02020000 0x30000>;
181 smp-sram@0 {
183 reg = <0x0 0x1000>;
188 reg = <0x2f000 0x1000>;
194 reg = <0x10044000 0x20>;
[all …]
/freebsd/sys/dev/ispfw/
H A Dasm_2400.h33 0x0401f1be, 0x00112000, 0x00100000, 0x0000c79b,
34 0x00000008, 0x00000007, 0x00000000, 0x00009496,
35 0x00000003, 0x00000000, 0x20434f50, 0x59524947,
36 0x48542032, 0x30313720, 0x514c4f47, 0x49432043,
37 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350,
38 0x32347878, 0x20466972, 0x6d776172, 0x65202020,
39 0x56657273, 0x696f6e20, 0x2020382e, 0x30372e30,
40 0x30202024, 0x00000000, 0x00000000, 0x00000000,
41 0x00000000, 0x00000000, 0x00000000, 0x00000000,
42 0x00000000, 0x00000000, 0x00000000, 0x00000000,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sram/
H A Dsram.yaml165 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
169 ranges = <0 0x5c000000 0x40000>;
172 reg = <0x100 0x50>;
176 reg = <0x1000 0x1000>;
181 reg = <0x20000 0x20000>;
196 reg = <0x02020000 0x54000>;
199 ranges = <0 0x02020000 0x54000>;
201 smp-sram@0 {
203 reg = <0x0 0x1000>;
208 reg = <0x53000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/cavium/
H A Dthunder2-99xx.dtsi21 #address-cells = <0x2>;
22 #size-cells = <0x0>;
24 cpu@0 {
27 reg = <0x0 0x0>;
34 reg = <0x0 0x1>;
41 reg = <0x0 0x2>;
48 reg = <0x0 0x3>;
66 reg = <0x04 0x00080000 0x0 0x20000>, /* GICD */
67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
73 reg = <0x04 0x00100000 0x0 0x20000>; /* GIC ITS */
[all …]
/freebsd/crypto/krb5/src/lib/crypto/builtin/des/
H A Df_sched.c44 0x00000000, 0x00000010, 0x00001000, 0x00001010,
45 0x00100000, 0x00100010, 0x00101000, 0x00101010
49 0x00000000, 0x00100000, 0x00001000, 0x00101000,
50 0x00000010, 0x00100010, 0x00001010, 0x00101010,
51 0x00000001, 0x00100001, 0x00001001, 0x00101001,
52 0x00000011, 0x00100011, 0x00001011, 0x00101011
56 0x00000000, 0x00000001, 0x00000100, 0x00000101,
57 0x00010000, 0x00010001, 0x00010100, 0x00010101,
58 0x01000000, 0x01000001, 0x01000100, 0x01000101,
59 0x01010000, 0x01010001, 0x01010100, 0x01010101
[all …]
H A Df_tables.c65 * ((left & 0x55555555) << 1) | (right & 0x55555555) for left half
66 * (left & 0xaaaaaaaa) | ((right & 0xaaaaaaaa) >> 1) for right half
76 0x00000000, 0x00000010, 0x00000001, 0x00000011,
77 0x00001000, 0x00001010, 0x00001001, 0x00001011,
78 0x00000100, 0x00000110, 0x00000101, 0x00000111,
79 0x00001100, 0x00001110, 0x00001101, 0x00001111,
80 0x00100000, 0x00100010, 0x00100001, 0x00100011,
81 0x00101000, 0x00101010, 0x00101001, 0x00101011,
82 0x00100100, 0x00100110, 0x00100101, 0x00100111,
83 0x00101100, 0x00101110, 0x00101101, 0x00101111,
[all …]
/freebsd/contrib/bearssl/src/symcipher/
H A Ddes_ct.c46 17, 0, 22, 3, 6, 20, 27, 24
50 28, 28, 14, 11, 28, 28, 25, 0,
82 for (i = 0; i < 16; i ++) { in keysched_unit()
86 kl = skey[(i << 1) + 0]; in keysched_unit()
88 sk0 = 0; in keysched_unit()
89 sk1 = 0; in keysched_unit()
90 for (j = 0; j < 16; j ++) { in keysched_unit()
99 skey[(i << 1) + 0] = sk0; in keysched_unit()
103 #if 0 in keysched_unit()
108 sk0 = kl & (uint32_t)0x00100000; in keysched_unit()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6sll.dtsi47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
97 clock-frequency = <0>;
103 #clock-cells = <0>;
104 clock-frequency = <0>;
117 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6sl.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
86 #clock-cells = <0>;
92 #clock-cells = <0>;
100 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
105 #phy-cells = <0>;
117 reg = <0x00900000 0x20000>;
118 ranges = <0 0x00900000 0x20000>;
128 reg = <0x00a01000 0x1000>,
[all …]
H A Dimx6ul.dtsi58 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
108 #clock-cells = <0>;
115 #clock-cells = <0>;
122 #clock-cells = <0>;
123 clock-frequency = <0>;
129 #clock-cells = <0>;
130 clock-frequency = <0>;
149 reg = <0x00900000 0x20000>;
[all …]
H A Dimx6qdl.dtsi59 #clock-cells = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #clock-cells = <0>;
78 #size-cells = <0>;
83 lvds-channel@0 {
85 #size-cells = <0>;
86 reg = <0>;
89 port@0 {
90 reg = <0>;
[all …]
H A Dimx6sx.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
66 reg = <0>;
100 #clock-cells = <0>;
107 #clock-cells = <0>;
114 #clock-cells = <0>;
115 clock-frequency = <0>;
121 #clock-cells = <0>;
122 clock-frequency = <0>;
128 #clock-cells = <0>;
[all …]
/freebsd/sys/dev/mfi/
H A Dmfireg.h72 #define MFI_IMSG0 0x10 /* Inbound message 0 */
73 #define MFI_IMSG1 0x14 /* Inbound message 1 */
74 #define MFI_OMSG0 0x18 /* Outbound message 0 */
75 #define MFI_OMSG1 0x1c /* Outbound message 1 */
76 #define MFI_IDB 0x20 /* Inbound doorbell */
77 #define MFI_ISTS 0x24 /* Inbound interrupt status */
78 #define MFI_IMSK 0x28 /* Inbound interrupt mask */
79 #define MFI_ODB 0x2c /* Outbound doorbell */
80 #define MFI_OSTS 0x30 /* Outbound interrupt status */
81 #define MFI_OMSK 0x34 /* Outbound interrupt mask */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j721s2-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
22 reg = <0x0 0x70000000 0x0 0x400000>;
25 ranges = <0x0 0x0 0x70000000 0x400000>;
27 atf-sram@0 {
28 reg = <0x0 0x20000>;
32 reg = <0x1f0000 0x10000>;
36 reg = <0x200000 0x200000>;
42 reg = <0x00 0x00104000 0x00 0x18000>;
45 ranges = <0x00 0x00 0x00104000 0x18000>;
[all …]
H A Dk3-j784s4-j742s2-main-common.dtsi16 #clock-cells = <0>;
30 reg = <0x00 0x70000000 0x00 0x800000>;
33 ranges = <0x00 0x00 0x70000000 0x800000>;
35 atf-sram@0 {
36 reg = <0x00 0x20000>;
40 reg = <0x1f0000 0x10000>;
44 reg = <0x200000 0x200000>;
50 reg = <0x00 0x00100000 0x00 0x1c000>;
53 ranges = <0x00 0x00 0x00100000 0x1c000>;
57 reg = <0x4034 0x4>;
[all …]
/freebsd/sys/dev/mrsas/
H A Dmrsas.h78 #define MRSAS_TBOLT 0x005b
79 #define MRSAS_INVADER 0x005d
80 #define MRSAS_FURY 0x005f
81 #define MRSAS_INTRUDER 0x00ce
82 #define MRSAS_INTRUDER_24 0x00cf
83 #define MRSAS_CUTLASS_52 0x0052
84 #define MRSAS_CUTLASS_53 0x0053
86 #define MRSAS_VENTURA 0x0014
87 #define MRSAS_CRUSADER 0x0015
88 #define MRSAS_HARPOON 0x0016
[all …]
/freebsd/sys/dev/bce/
H A Dif_bcefw.h40 int bce_COM_b06FwReleaseMajor = 0x6;
41 int bce_COM_b06FwReleaseMinor = 0x0;
42 int bce_COM_b06FwReleaseFix = 0xf;
43 u32 bce_COM_b06FwStartAddr = 0x08000118;
44 u32 bce_COM_b06FwTextAddr = 0x08000000;
45 int bce_COM_b06FwTextLen = 0x4a68;
46 u32 bce_COM_b06FwDataAddr = 0x00000000;
47 int bce_COM_b06FwDataLen = 0x0;
48 u32 bce_COM_b06FwRodataAddr = 0x08004a68;
49 int bce_COM_b06FwRodataLen = 0x14;
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]