/freebsd/sys/contrib/device-tree/src/powerpc/ |
H A D | pcm032.dts | 23 memory@0 { 24 reg = <0x00000000 0x08000000>; // 128MB 30 cell-index = <0>; 61 phy0: ethernet-phy@0 { 62 reg = <0>; 69 reg = <0x51>; 73 reg = <0x52>; 80 interrupt-map-mask = <0xf800 0 0 7>; 81 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 82 0xc000 0 0 2 &mpc5200_pic 1 1 3 [all …]
|
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
H A D | cyrus_p5020.dts | 30 size = <0 0x1000000>; 31 alignment = <0 0x1000000>; 34 size = <0 0x400000>; 35 alignment = <0 0x400000>; 38 size = <0 0x2000000>; 39 alignment = <0 0x2000000>; 44 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 48 ranges = <0x0 0xf 0xf4000000 0x200000>; 52 ranges = <0x0 0xf 0xf4200000 0x200000>; 56 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
|
H A D | mpc8536ds.dts | 17 #size-cells = <0>; 19 PowerPC,8536@0 { 21 reg = <0>; 28 reg = <0 0 0 0>; // Filled by U-Boot 32 reg = <0 0xffe05000 0 0x1000>; 34 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 35 0x2 0x0 0x0 0xffa00000 0x00040000 36 0x3 0x0 0x0 0xffdf0000 0x00008000>; 40 ranges = <0x0 0 0xffe00000 0x100000>; 44 reg = <0 0xffe08000 0 0x1000>; [all …]
|
H A D | mpc8536ds_36b.dts | 17 #size-cells = <0>; 19 PowerPC,8536@0 { 21 reg = <0>; 28 reg = <0 0 0 0>; // Filled by U-Boot 32 reg = <0xf 0xffe05000 0 0x1000>; 34 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 35 0x2 0x0 0xf 0xffa00000 0x00040000 36 0x3 0x0 0xf 0xffdf0000 0x00008000>; 40 ranges = <0x0 0xf 0xffe00000 0x100000>; 44 reg = <0xf 0xffe08000 0 0x1000>; [all …]
|
H A D | t208xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
|
H A D | kmcent2.dts | 27 size = <0 0x1000000>; 28 alignment = <0 0x1000000>; 31 size = <0 0x400000>; 32 alignment = <0 0x400000>; 35 size = <0 0x2000000>; 36 alignment = <0 0x2000000>; 41 reg = <0xf 0xfe124000 0 0x2000>; 42 ranges = <0 0 0xf 0xe8000000 0x04000000 43 1 0 0xf 0xfa000000 0x00010000 44 2 0 0xf 0xfb000000 0x00010000 [all …]
|
H A D | t104xd4rdb.dtsi | 42 size = <0 0x1000000>; 43 alignment = <0 0x1000000>; 46 size = <0 0x400000>; 47 alignment = <0 0x400000>; 50 size = <0 0x2000000>; 51 alignment = <0 0x2000000>; 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; [all …]
|
H A D | t104xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
|
H A D | p5020ds.dts | 68 size = <0 0x1000000>; 69 alignment = <0 0x1000000>; 72 size = <0 0x400000>; 73 alignment = <0 0x400000>; 76 size = <0 0x2000000>; 77 alignment = <0 0x2000000>; 82 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 86 ranges = <0x0 0xf 0xf4000000 0x200000>; 90 ranges = <0x0 0xf 0xf4200000 0x200000>; 94 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
|
H A D | p3041ds.dts | 68 size = <0 0x1000000>; 69 alignment = <0 0x1000000>; 72 size = <0 0x400000>; 73 alignment = <0 0x400000>; 76 size = <0 0x200000 [all...] |
H A D | t208xqds.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
|
H A D | t4240rdb.dts | 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; 61 nor@0,0 { 65 reg = <0x0 0x0 0x8000000>; 71 nand@2,0 { 75 reg = <0x2 0x0 0x10000>; 89 size = <0 0x1000000>; 90 alignment = <0 0x1000000>; [all …]
|
H A D | p2041rdb.dts | 67 size = <0 0x1000000>; 68 alignment = <0 0x1000000>; 71 size = <0 0x400000>; 72 alignment = <0 0x400000>; 75 size = <0 0x2000000>; 76 alignment = <0 0x2000000>; 81 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 85 ranges = <0x0 0xf 0xf4000000 0x200000>; 89 ranges = <0x0 0xf 0xf4200000 0x200000>; 93 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
|
H A D | t1023rdb.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 1 0 0xf 0xff800000 0x00010000>; 70 nor@0,0 { [all …]
|
H A D | t104xqds.dtsi | 74 size = <0 0x1000000>; 75 alignment = <0 0x1000000>; 78 size = <0 0x400000>; 79 alignment = <0 0x400000>; 82 size = <0 0x2000000>; 83 alignment = <0 0x2000000>; 88 reg = <0xf 0xfe124000 0 0x2000>; 89 ranges = <0 0 0xf 0xe8000000 0x08000000 90 2 0 0xf 0xff800000 0x00010000 91 3 0 0xf 0xffdf0000 0x00008000>; [all …]
|
H A D | t1024qds.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 2 0 0xf 0xff800000 0x00010000 69 3 0 0xf 0xffdf0000 0x00008000>; [all …]
|
H A D | t1024rdb.dts | 54 size = <0 0x1000000>; 55 alignment = <0 0x1000000>; 59 size = <0 0x400000>; 60 alignment = <0 0x400000>; 64 size = <0 0x2000000>; 65 alignment = <0 0x2000000>; 70 reg = <0xf 0xfe124000 0 0x2000>; 71 ranges = <0 0 0xf 0xe8000000 0x08000000 72 2 0 0xf 0xff800000 0x00010000 73 3 0 0xf 0xffdf0000 0x00008000>; [all …]
|
H A D | p5040ds.dts | 80 size = <0 0x1000000>; 81 alignment = <0 0x1000000>; 84 size = <0 0x400000>; 85 alignment = <0 0x400000>; 88 size = <0 0x200000 [all...] |
H A D | sbc8641d.dts | 20 reg = <0x00000000 0x20000000>; // 512M at 0x0 24 reg = <0xf8005000 0x1000>; 26 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash 27 1 0 0xf0000000 0x00010000 // 64KB EEPROM 28 2 0 0xf1000000 0x00100000 // EPLD (1MB) 29 3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3) 30 4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4) 31 6 0 0xf4000000 0x00100000 // LCD display (1MB) 32 7 0 0xe8000000 0x04000000>; // 64MB OneNAND 34 flash@0,0 { [all …]
|
H A D | kmcoge4.dts | 30 size = <0 0x1000000>; 31 alignment = <0 0x1000000>; 34 size = <0 0x400000>; 35 alignment = <0 0x400000>; 38 size = <0 0x2000000>; 39 alignment = <0 0x2000000>; 44 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 48 ranges = <0x0 0xf 0xf4000000 0x200000>; 52 ranges = <0x0 0xf 0xf4200000 0x200000>; 56 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
|
H A D | p4080ds.dts | 68 size = <0 0x1000000>; 69 alignment = <0 0x1000000>; 72 size = <0 0x400000>; 73 alignment = <0 0x400000>; 76 size = <0 0x2000000>; 77 alignment = <0 0x2000000>; 82 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 86 ranges = <0x0 0xf 0xf4000000 0x200000>; 90 ranges = <0x0 0xf 0xf4200000 0x200000>; 94 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | mtd-physmap.txt | 65 fs@0 { 67 reg = <0 f80000>; 78 flash@f0000000,0 { 82 reg = <0 0x00000000 0x02000000 83 0 0x02000000 0x02000000>; 85 partition@0 { 87 reg = <0 0x04000000>; 93 sram@2,0 { 95 reg = <2 0 0x00200000>; 105 reg = <0x20000000 0x02000000>; [all …]
|
H A D | mtd-physmap.yaml | 154 reg = <0xff000000 0x01000000>; 160 ranges = <0 0xff000000 0x01000000>; 162 fs@0 { 164 reg = <0 0xf80000>; 168 reg = <0xf80000 0x80000>; 176 flash@0 { 178 reg = <0x00000000 0x02000000>, 179 <0x02000000 0x02000000>; 184 ranges = <0 0 0x04000000>; 186 partition@0 { [all …]
|
/freebsd/sys/dts/powerpc/ |
H A D | p3041ds.dts | 60 reg = <0x00000000 0x00000000 0x00000000 0x80000000>; 64 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 68 bman-portal@0 { 93 buffer-pool@0 { 95 fsl,bpid = <0>; 96 fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; 101 qportal0: qman-portal@0 { 188 flash@0 { 192 reg = <0>; 196 reg = <0x00000000 0x00100000>; [all …]
|
H A D | p5020ds.dts | 60 reg = <0x00000000 0x00000000 0x00000000 0x80000000>; 64 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 68 bman-portal@0 { 91 buffer-pool@0 { 93 fsl,bpid = <0>; 94 fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; 99 qportal0: qman-portal@0 { 184 flash@0 { 188 reg = <0>; 192 reg = <0x00000000 0x00100000>; [all …]
|