Searched +full:0 +full:x01e20000 (Results 1 – 6 of 6) sorted by relevance
27 #define DA8XX_TPCC_BASE 0x01c0000028 #define DA8XX_TPTC0_BASE 0x01c0800029 #define DA8XX_TPTC1_BASE 0x01c0840030 #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */31 #define DA8XX_I2C0_BASE 0x01c2200032 #define DA8XX_RTC_BASE 0x01c2300033 #define DA8XX_PRUSS_MEM_BASE 0x01c3000034 #define DA8XX_MMCSD0_BASE 0x01c4000035 #define DA8XX_SPI0_BASE 0x01c4100036 #define DA830_SPI1_BASE 0x01e12000[all …]
111 #size-cells = <0>;112 cpu0: cpu@0 {115 reg = <0x0>;166 #clock-cells = <0>;173 #clock-cells = <0>;199 size = <0x6000000>;200 alloc-ranges = <0x40000000 0x10000000>;214 reg = <0x01c00000 0x30>;219 sram_a: sram@0 {221 reg = <0x00000000 0xc000>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;213 #clock-cells = <0>;221 #clock-cells = <0>;238 #clock-cells = <0>;245 #clock-cells = <0>;252 #clock-cells = <0>;254 reg = <0x01c200d0 0x4>;274 reg = <0x01c02000 0x1000>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;181 size = <0x6000000>;182 alloc-ranges = <0x40000000 0x10000000>;208 #clock-cells = <0>;215 #clock-cells = <0>;231 #clock-cells = <0>;238 #clock-cells = <0>;245 #clock-cells = <0>;[all …]
26 #clock-cells = <0>;32 #size-cells = <0>;34 cpu0: cpu@0 {37 reg = <0x0>;48 reg = <0x1>;59 reg = <0x2>;70 reg = <0x3>;81 reg = <0x100>;92 reg = <0x101>;103 reg = <0x102>;[all …]
25 #clock-cells = <0>;31 #clock-cells = <0>;39 #size-cells = <0>;41 cpu0: cpu@0 {44 reg = <0x0>;54 reg = <0x1>;64 reg = <0x2>;74 reg = <0x3>;84 reg = <0x100>;94 reg = <0x101>;[all …]