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/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-x1e80100.yaml94 reg = <0 0x01c08000 0 0x3000>,
95 <0 0x7c000000 0 0xf1d>,
96 <0 0x7c000f40 0 0xa8>,
97 <0 0x7c001000 0 0x1000>,
98 <0 0x7c100000 0 0x100000>,
99 <0 0x01c0b000 0 0x1000>;
101 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
102 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
104 bus-range = <0x00 0xff>;
106 linux,pci-domain = <0>;
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i.dtsi56 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0>;
97 #clock-cells = <0>;
104 #clock-cells = <0>;
119 size = <0x6000000>;
120 alloc-ranges = <0x40000000 0x10000000>;
135 reg = <0x01c00000 0x30>;
140 sram_a: sram@0 {
142 reg = <0x00000000 0xc000>;
[all …]
H A Dsun4i-a10.dtsi111 #size-cells = <0>;
112 cpu0: cpu@0 {
115 reg = <0x0>;
166 #clock-cells = <0>;
173 #clock-cells = <0>;
199 size = <0x6000000>;
200 alloc-ranges = <0x40000000 0x10000000>;
214 reg = <0x01c00000 0x30>;
219 sram_a: sram@0 {
221 reg = <0x00000000 0xc000>;
[all …]
H A Dsun7i-a20.dtsi101 #size-cells = <0>;
103 cpu0: cpu@0 {
106 reg = <0>;
181 size = <0x6000000>;
182 alloc-ranges = <0x40000000 0x10000000>;
208 #clock-cells = <0>;
215 #clock-cells = <0>;
231 #clock-cells = <0>;
238 #clock-cells = <0>;
245 #clock-cells = <0>;
[all …]