Searched +full:0 +full:x01c03000 (Results 1 – 15 of 15) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | allwinner,sun4i-a10-nand.yaml | 55 minimum: 0 74 minimum: 0 97 reg = <0x01c03000 0x1000>; 106 pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>; 108 #size-cells = <0>;
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | qcom,pcie-sa8775p.yaml | 101 reg = <0x0 0x01c00000 0x0 0x3000>, 102 <0x0 0x40000000 0x0 0xf20>, 103 <0x0 0x40000f20 0x0 0xa8>, 104 <0x0 0x40001000 0x0 0x4000>, 105 <0x0 0x40100000 0x0 0x100000>, 106 <0x0 0x01c03000 0x0 0x1000>; 108 ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, 109 <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; 111 bus-range = <0x00 0xff>; 113 linux,pci-domain = <0>; [all …]
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| H A D | qcom,pcie-sm8250.yaml | 104 reg = <0 0x01c00000 0 0x3000>, 105 <0 0x60000000 0 0xf1d>, 106 <0 0x60000f20 0 0xa8>, 107 <0 0x60001000 0 0x1000>, 108 <0 0x60100000 0 0x100000>, 109 <0 0x01c03000 0 0x1000>; 111 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, 112 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; 114 bus-range = <0x00 0xff>; 116 linux,pci-domain = <0>; [all …]
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| H A D | qcom,pcie-ep.yaml | 295 reg = <0x01c00000 0x3000>, 296 <0x40000000 0xf1d>, 297 <0x40000f20 0xc8>, 298 <0x40001000 0x1000>, 299 <0x40002000 0x1000>, 300 <0x01c03000 0x3000>; 314 qcom,perst-regs = <&tcsr 0xb258 0xb270>; 331 linux,pci-domain = <0>;
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| /freebsd/sys/contrib/device-tree/src/arm/qcom/ |
| H A D | qcom-sdx55.dtsi | 20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>; 25 reg = <0 0>; 31 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #clock-cells = <0>; 51 #size-cells = <0>; 53 cpu0: cpu@0 { 56 reg = <0x0>; 108 reg = <0x8fc00000 0x80000>; 113 reg = <0x8fc80000 0x40000>; [all …]
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| H A D | qcom-sdx65.dtsi | 20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>; 25 reg = <0 0>; 33 #clock-cells = <0>; 40 #clock-cells = <0>; 46 #clock-cells = <0>; 52 #size-cells = <0>; 54 cpu0: cpu@0 { 57 reg = <0x0>; 115 reg = <0x8fcad000 0x40000>; 120 reg = <0x8fcfd000 0x1000>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/allwinner/ |
| H A D | sun5i.dtsi | 56 #size-cells = <0>; 58 cpu0: cpu@0 { 61 reg = <0x0>; 97 #clock-cells = <0>; 104 #clock-cells = <0>; 119 size = <0x6000000>; 120 alloc-ranges = <0x40000000 0x10000000>; 135 reg = <0x01c00000 0x30>; 140 sram_a: sram@0 { 142 reg = <0x00000000 0xc000>; [all …]
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| H A D | sun8i-a23-a33.dtsi | 91 #size-cells = <0>; 93 cpu0: cpu@0 { 96 reg = <0>; 112 #clock-cells = <0>; 120 #clock-cells = <0>; 136 reg = <0x01c00000 0x30>; 143 reg = <0x01d00000 0x80000>; 146 ranges = <0 0x01d00000 0x80000>; 148 ve_sram: sram-section@0 { 151 reg = <0x000000 0x80000>; [all …]
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| H A D | sun4i-a10.dtsi | 111 #size-cells = <0>; 112 cpu0: cpu@0 { 115 reg = <0x0>; 166 #clock-cells = <0>; 173 #clock-cells = <0>; 199 size = <0x6000000>; 200 alloc-ranges = <0x40000000 0x10000000>; 214 reg = <0x01c00000 0x30>; 219 sram_a: sram@0 { 221 reg = <0x00000000 0xc000>; [all …]
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| H A D | sun7i-a20.dtsi | 101 #size-cells = <0>; 103 cpu0: cpu@0 { 106 reg = <0>; 181 size = <0x6000000>; 182 alloc-ranges = <0x40000000 0x10000000>; 208 #clock-cells = <0>; 215 #clock-cells = <0>; 231 #clock-cells = <0>; 238 #clock-cells = <0>; 245 #clock-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sa8775p.dtsi | 33 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #size-cells = <0>; 46 cpu0: cpu@0 { 49 reg = <0x0 0x0>; 53 qcom,freq-domain = <&cpufreq_hw 0>; 78 reg = <0x0 0x100>; 82 qcom,freq-domain = <&cpufreq_hw 0>; 102 reg = <0x0 0x200>; 106 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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| H A D | sc8280xp.dtsi | 33 #clock-cells = <0>; 38 #clock-cells = <0>; 45 #size-cells = <0>; 47 cpu0: cpu@0 { 50 reg = <0x0 0x0>; 51 clocks = <&cpufreq_hw 0>; 58 qcom,freq-domain = <&cpufreq_hw 0>; 78 reg = <0x0 0x100>; 79 clocks = <&cpufreq_hw 0>; 86 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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| H A D | sm8250.dtsi | 81 #clock-cells = <0>; 89 #clock-cells = <0>; 95 #size-cells = <0>; 97 cpu0: cpu@0 { 100 reg = <0x0 0x0>; 101 clocks = <&cpufreq_hw 0>; 108 qcom,freq-domain = <&cpufreq_hw 0>; 110 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, 116 cache-size = <0x20000>; 122 cache-size = <0x400000>; [all …]
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| H A D | x1e80100.dtsi | 37 #clock-cells = <0>; 43 #clock-cells = <0>; 48 #clock-cells = <0>; 57 #clock-cells = <0>; 67 #size-cells = <0>; 69 cpu0: cpu@0 { 72 reg = <0x0 0x0>; 75 power-domains = <&cpu_pd0>, <&scmi_dvfs 0>; 89 reg = <0x0 0x100>; 92 power-domains = <&cpu_pd1>, <&scmi_dvfs 0>; [all …]
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| /freebsd/sys/dev/qlnx/qlnxe/ |
| H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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