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/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dqcom,x1e80100-rpmh.yaml72 clk_virt: interconnect-0 {
80 reg = <0x016e0000 0x14400>;
H A Dqcom,sc7280-rpmh.yaml111 reg = <0x9100000 0xe2200>;
118 reg = <0x016e0000 0x1c080>;
H A Dqcom,milos-rpmh.yaml123 interconnect-0 {
131 reg = <0x016e0000 0x16400>;
H A Dqcom,sm8550-rpmh.yaml126 clk_virt: interconnect-0 {
134 reg = <0x016e0000 0x14400>;
H A Dqcom,sm8650-rpmh.yaml124 clk_virt: interconnect-0 {
132 reg = <0x016e0000 0x14400>;
H A Dqcom,sm8750-rpmh.yaml124 clk_virt: interconnect-0 {
132 reg = <0x016e0000 0x16400>;
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm670.dtsi37 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0 0x0>;
59 qcom,freq-domain = <&cpufreq_hw 0>;
82 reg = <0x0 0x100>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
104 reg = <0x0 0x200>;
108 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm6350.dtsi35 #clock-cells = <0>;
43 #clock-cells = <0>;
49 #size-cells = <0>;
51 cpu0: cpu@0 {
54 reg = <0x0 0x0>;
55 clocks = <&cpufreq_hw 0>;
60 qcom,freq-domain = <&cpufreq_hw 0>;
84 reg = <0x0 0x100>;
85 clocks = <&cpufreq_hw 0>;
90 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8750.dtsi29 #size-cells = <0>;
31 cpu0: cpu@0 {
34 reg = <0x0 0x0>;
50 reg = <0x0 0x100>;
60 reg = <0x0 0x200>;
70 reg = <0x0 0x300>;
80 reg = <0x0 0x400>;
90 reg = <0x0 0x500>;
100 reg = <0x0 0x10000>;
116 reg = <0x0 0x10100>;
[all …]
H A Dsc8180x.dtsi31 #clock-cells = <0>;
37 #clock-cells = <0>;
45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0 0x0>;
54 qcom,freq-domain = <&cpufreq_hw 0>;
61 clocks = <&cpufreq_hw 0>;
79 reg = <0x0 0x100>;
83 qcom,freq-domain = <&cpufreq_hw 0>;
90 clocks = <&cpufreq_hw 0>;
[all …]
H A Dsm8350.dtsi40 #clock-cells = <0>;
48 #clock-cells = <0>;
54 #size-cells = <0>;
56 cpu0: cpu@0 {
59 reg = <0x0 0x0>;
60 clocks = <&cpufreq_hw 0>;
63 qcom,freq-domain = <&cpufreq_hw 0>;
83 reg = <0x0 0x100>;
84 clocks = <&cpufreq_hw 0>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsc7180.dtsi67 #clock-cells = <0>;
73 #clock-cells = <0>;
79 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0x0 0x0>;
85 clocks = <&cpufreq_hw 0>;
96 qcom,freq-domain = <&cpufreq_hw 0>;
113 reg = <0x0 0x100>;
114 clocks = <&cpufreq_hw 0>;
125 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8150.dtsi35 #clock-cells = <0>;
42 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0 0x0>;
56 clocks = <&cpufreq_hw 0>;
61 qcom,freq-domain = <&cpufreq_hw 0>;
63 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
84 reg = <0x0 0x100>;
85 clocks = <&cpufreq_hw 0>;
[all …]
H A Dsm8450.dtsi40 #clock-cells = <0>;
46 #clock-cells = <0>;
53 #size-cells = <0>;
55 cpu0: cpu@0 {
58 reg = <0x0 0x0>;
63 qcom,freq-domain = <&cpufreq_hw 0>;
65 clocks = <&cpufreq_hw 0>;
82 reg = <0x0 0x100>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
89 clocks = <&cpufreq_hw 0>;
[all …]
H A Dsdm845.dtsi79 #clock-cells = <0>;
86 #clock-cells = <0>;
93 #size-cells = <0>;
95 cpu0: cpu@0 {
98 reg = <0x0 0x0>;
99 clocks = <&cpufreq_hw 0>;
103 qcom,freq-domain = <&cpufreq_hw 0>;
127 reg = <0x0 0x100>;
128 clocks = <&cpufreq_hw 0>;
132 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8250.dtsi81 #clock-cells = <0>;
89 #clock-cells = <0>;
95 #size-cells = <0>;
97 cpu0: cpu@0 {
100 reg = <0x0 0x0>;
101 clocks = <&cpufreq_hw 0>;
108 qcom,freq-domain = <&cpufreq_hw 0>;
110 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
116 cache-size = <0x20000>;
122 cache-size = <0x400000>;
[all …]
H A Dsm8550.dtsi40 #clock-cells = <0>;
45 #clock-cells = <0>;
49 #clock-cells = <0>;
57 #clock-cells = <0>;
67 #size-cells = <0>;
69 cpu0: cpu@0 {
72 reg = <0 0>;
73 clocks = <&cpufreq_hw 0>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
98 reg = <0 0x100>;
[all …]
H A Dsc7280.dtsi83 #clock-cells = <0>;
89 #clock-cells = <0>;
100 reg = <0x0 0x004cd000 0x0 0x1000>;
104 reg = <0x0 0x80000000 0x0 0x600000>;
109 reg = <0x0 0x80600000 0x0 0x200000>;
114 reg = <0x0 0x80800000 0x0 0x60000>;
119 reg = <0x0 0x80860000 0x0 0x20000>;
125 reg = <0x0 0x80884000 0x0 0x10000>;
130 reg = <0x0 0x808ff000 0x0 0x1000>;
135 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
H A Dx1e80100.dtsi37 #clock-cells = <0>;
43 #clock-cells = <0>;
48 #clock-cells = <0>;
57 #clock-cells = <0>;
67 #size-cells = <0>;
69 cpu0: cpu@0 {
72 reg = <0x0 0x0>;
75 power-domains = <&cpu_pd0>, <&scmi_dvfs 0>;
89 reg = <0x0 0x100>;
92 power-domains = <&cpu_pd1>, <&scmi_dvfs 0>;
[all …]
H A Dsm8650.dtsi42 #clock-cells = <0>;
47 #clock-cells = <0>;
52 #clock-cells = <0>;
61 #clock-cells = <0>;
71 #size-cells = <0>;
73 cpu0: cpu@0 {
76 reg = <0 0>;
78 clocks = <&cpufreq_hw 0>;
88 qcom,freq-domain = <&cpufreq_hw 0>;
118 reg = <0 0x100>;
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]