| /linux/drivers/usb/storage/ | 
| H A D | unusual_alauda.h | 9 UNUSUAL_DEV(  0x0584, 0x0008, 0x0102, 0x0102,12 		USB_SC_SCSI, USB_PR_ALAUDA, init_alauda, 0),
 14 UNUSUAL_DEV(  0x07b4, 0x010a, 0x0102, 0x0102,
 17 		USB_SC_SCSI, USB_PR_ALAUDA, init_alauda, 0),
 
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| /linux/sound/soc/codecs/ | 
| H A D | rt712-sdca-dmic.h | 34 #define CH_01	0x0135 #define CH_02	0x02
 36 #define CH_03	0x03
 37 #define CH_04	0x04
 40 	{ 0x201a, 0x00 },
 41 	{ 0x201b, 0x00 },
 42 	{ 0x201c, 0x00 },
 43 	{ 0x201d, 0x00 },
 44 	{ 0x201e, 0x00 },
 45 	{ 0x201f, 0x00 },
 [all …]
 
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| H A D | rt722-sdca-sdw.h | 15 	{ 0x202d, 0x00 },16 	{ 0x2f01, 0x00 },
 17 	{ 0x2f02, 0x09 },
 18 	{ 0x2f03, 0x00 },
 19 	{ 0x2f04, 0x00 },
 20 	{ 0x2f05, 0x0b },
 21 	{ 0x2f06, 0x01 },
 22 	{ 0x2f08, 0x00 },
 23 	{ 0x2f09, 0x00 },
 24 	{ 0x2f0a, 0x00 },
 [all …]
 
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| H A D | rt1019.h | 11 #define RT1019_DEVICE_ID_VAL			0x101912 #define RT1019_DEVICE_ID_VAL2			0x6731
 14 #define RT1019_RESET				0x0000
 15 #define RT1019_IDS_CTRL				0x0011
 16 #define RT1019_ASEL_CTRL			0x0013
 17 #define RT1019_PWR_STRP_2			0x0019
 18 #define RT1019_BEEP_TONE			0x001b
 19 #define RT1019_VER_ID				0x005c
 20 #define RT1019_VEND_ID_1			0x005e
 21 #define RT1019_VEND_ID_2			0x005f
 [all …]
 
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| H A D | max98373-sdw.h | 10 #define MAX98373_R0040_SCP_INIT_STAT_1		0x004011 #define MAX98373_R0041_SCP_INIT_MASK_1		0x0041
 12 #define MAX98373_R0042_SCP_INIT_STAT_2		0x0042
 13 #define MAX98373_R0044_SCP_CTRL			0x0044
 14 #define MAX98373_R0045_SCP_SYSTEM_CTRL		0x0045
 15 #define MAX98373_R0046_SCP_DEV_NUMBER		0x0046
 16 #define MAX98373_R0050_SCP_DEV_ID_0		0x0050
 17 #define MAX98373_R0051_SCP_DEV_ID_1		0x0051
 18 #define MAX98373_R0052_SCP_DEV_ID_2		0x0052
 19 #define MAX98373_R0053_SCP_DEV_ID_3		0x0053
 [all …]
 
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| H A D | rt1015.h | 17 #define RT1015_DEVICE_ID_VAL			0x101118 #define RT1015_DEVICE_ID_VAL2			0x1015
 20 #define RT1015_RESET				0x0000
 21 #define RT1015_CLK2				0x0004
 22 #define RT1015_CLK3				0x0006
 23 #define RT1015_PLL1				0x000a
 24 #define RT1015_PLL2				0x000c
 25 #define RT1015_DUM_RW1				0x000e
 26 #define RT1015_DUM_RW2				0x0010
 27 #define RT1015_DUM_RW3				0x0012
 [all …]
 
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| /linux/arch/sh/include/mach-common/mach/ | 
| H A D | highlander.h | 6 #define PA_NORFLASH_ADDR	0x000000007 #define PA_NORFLASH_SIZE	0x04000000
 10 #define PA_BCR          0xa4000000      /* FPGA */
 13 #define PA_IRLMSK       (PA_BCR+0x0000) /* Interrupt Mask control */
 14 #define PA_IRLMON       (PA_BCR+0x0002) /* Interrupt Status control */
 15 #define PA_IRLPRI1      (PA_BCR+0x0004) /* Interrupt Priorty 1 */
 16 #define PA_IRLPRI2      (PA_BCR+0x0006) /* Interrupt Priorty 2 */
 17 #define PA_IRLPRI3      (PA_BCR+0x0008) /* Interrupt Priorty 3 */
 18 #define PA_IRLPRI4      (PA_BCR+0x000a) /* Interrupt Priorty 4 */
 19 #define PA_RSTCTL       (PA_BCR+0x000c) /* Reset Control */
 [all …]
 
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| /linux/include/uapi/linux/ | 
| H A D | v4l2-common.h | 27 #define V4L2_SEL_TGT_CROP		0x000029 #define V4L2_SEL_TGT_CROP_DEFAULT	0x0001
 31 #define V4L2_SEL_TGT_CROP_BOUNDS	0x0002
 33 #define V4L2_SEL_TGT_NATIVE_SIZE	0x0003
 35 #define V4L2_SEL_TGT_COMPOSE		0x0100
 37 #define V4L2_SEL_TGT_COMPOSE_DEFAULT	0x0101
 39 #define V4L2_SEL_TGT_COMPOSE_BOUNDS	0x0102
 41 #define V4L2_SEL_TGT_COMPOSE_PADDED	0x0103
 44 #define V4L2_SEL_FLAG_GE		(1 << 0)
 
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| /linux/Documentation/userspace-api/media/v4l/ | 
| H A D | v4l2-selection-targets.rst | 25     :stub-columns: 033       - 0x0000
 38       - 0x0001
 45       - 0x0002
 51       - 0x0003
 57       - 0x0100
 62       - 0x0101
 67       - 0x0102
 73       - 0x0103
 
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| /linux/include/pcmcia/ | 
| H A D | ciscode.h | 17 #define MANFID_3COM			0x010118 #define PRODID_3COM_3CXEM556		0x0035
 19 #define PRODID_3COM_3CCFEM556		0x0556
 20 #define PRODID_3COM_3C562		0x0562
 22 #define MANFID_ACCTON			0x01bf
 23 #define PRODID_ACCTON_EN2226		0x010a
 25 #define MANFID_ADAPTEC			0x012f
 26 #define PRODID_ADAPTEC_SCSI		0x0001
 28 #define MANFID_ATT			0xffff
 29 #define PRODID_ATT_KIT			0x0100
 [all …]
 
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| /linux/drivers/media/rc/keymaps/ | 
| H A D | rc-dvico-mce.c | 12 	{ 0x0102, KEY_TV },13 	{ 0x010e, KEY_MP3 },
 14 	{ 0x011a, KEY_DVD },
 15 	{ 0x011e, KEY_FAVORITES },
 16 	{ 0x0116, KEY_SETUP },
 17 	{ 0x0146, KEY_POWER2 },
 18 	{ 0x010a, KEY_EPG },
 19 	{ 0x0149, KEY_BACK },
 20 	{ 0x014d, KEY_MENU },
 21 	{ 0x0151, KEY_UP },
 [all …]
 
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| /linux/drivers/media/usb/gspca/ | 
| H A D | xirlink_cit.c | 29 module_param(ibm_netcam_pro, int, 0);44 #define CIT_MODEL0 0 /* bcd version 0.01 cams ie the xvp-500 */
 125 	{0, 0x0000, 0x010c},
 126 	{0, 0x0006, 0x012c},
 127 	{0, 0x0078, 0x012d},
 128 	{0, 0x0046, 0x012f},
 129 	{0, 0xd141, 0x0124},
 130 	{0, 0x0000, 0x0127},
 131 	{0, 0xfea8, 0x0124},
 132 	{1, 0x0000, 0x0116},
 [all …]
 
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| /linux/drivers/gpu/drm/amd/include/asic_reg/smuio/ | 
| H A D | smuio_11_0_0_offset.h | 27 // base address: 0x5a00028 …SMUSVI0_TEL_PLANE0                                                                           0x0004
 29 …ne mmSMUSVI0_TEL_PLANE0_BASE_IDX                                                                  0
 30 …SMUIO_MCM_CONFIG                                                                             0x0024
 31 …ne mmSMUIO_MCM_CONFIG_BASE_IDX                                                                    0
 32 …CKSVII2C_IC_CON                                                                              0x0040
 33 …ne mmCKSVII2C_IC_CON_BASE_IDX                                                                     0
 34 …CKSVII2C_IC_TAR                                                                              0x0041
 35 …ne mmCKSVII2C_IC_TAR_BASE_IDX                                                                     0
 36 …CKSVII2C_IC_SAR                                                                              0x0042
 [all …]
 
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| /linux/arch/powerpc/boot/ | 
| H A D | redboot.h | 20     unsigned int   bi_tag;        /* Should be 0x42444944 "BDID" */23     unsigned int   bi_bdate;      /* bootstrap date, i.e. 0x19971106 */
 53 #define BI_REV 0x0102    /* Version 1.02 */
 
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| /linux/arch/s390/include/asm/ | 
| H A D | ipl.h | 49 #define IPL_MAX_SUPPORTED_VERSION (0)147 	DIAG308_CLEAR_RESET = 0,
 162 	DIAG308_RC_OK		= 0x0001,
 163 	DIAG308_RC_NOCONFIG	= 0x0102,
 
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| H A D | pci_clp.h | 10 #define CLP_SLPC		0x000111 #define CLP_LIST_PCI		0x0002
 12 #define CLP_QUERY_PCI_FN	0x0003
 13 #define CLP_QUERY_PCI_FNGRP	0x0004
 14 #define CLP_SET_PCI_FN		0x0005
 26 #define CLP_RC_SETPCIFN_FH	0x0101	/* Invalid PCI fn handle */
 27 #define CLP_RC_SETPCIFN_FHOP	0x0102	/* Fn handle not valid for op */
 28 #define CLP_RC_SETPCIFN_DMAAS	0x0103	/* Invalid DMA addr space */
 29 #define CLP_RC_SETPCIFN_RES	0x0104	/* Insufficient resources */
 30 #define CLP_RC_SETPCIFN_ALRDY	0x0105	/* Fn already in requested state */
 [all …]
 
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| /linux/drivers/net/ethernet/wangxun/ngbe/ | 
| H A D | ngbe_type.h | 12 #define NGBE_DEV_ID_EM_WX1860AL_W		0x010013 #define NGBE_DEV_ID_EM_WX1860A2			0x0101
 14 #define NGBE_DEV_ID_EM_WX1860A2S		0x0102
 15 #define NGBE_DEV_ID_EM_WX1860A4			0x0103
 16 #define NGBE_DEV_ID_EM_WX1860A4S		0x0104
 17 #define NGBE_DEV_ID_EM_WX1860AL2		0x0105
 18 #define NGBE_DEV_ID_EM_WX1860AL2S		0x0106
 19 #define NGBE_DEV_ID_EM_WX1860AL4		0x0107
 20 #define NGBE_DEV_ID_EM_WX1860AL4S		0x0108
 21 #define NGBE_DEV_ID_EM_WX1860LC			0x0109
 [all …]
 
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| /linux/include/scsi/fc/ | 
| H A D | fc_ms.h | 25 #define	FC_FDMI_SUBTYPE	    0x10 /* fs_ct_hdr.ct_fs_subtype */37 	FC_FDMI_GRHL = 0x0100,	/* Get Registered HBA List */
 38 	FC_FDMI_GHAT = 0x0101,	/* Get HBA Attributes */
 39 	FC_FDMI_GRPL = 0x0102,	/* Get Registered Port List */
 40 	FC_FDMI_GPAT = 0x0110,	/* Get Port Attributes */
 41 	FC_FDMI_RHBA = 0x0200,	/* Register HBA */
 42 	FC_FDMI_RHAT = 0x0201,	/* Register HBA Attributes */
 43 	FC_FDMI_RPRT = 0x0210,	/* Register Port */
 44 	FC_FDMI_RPA = 0x0211,	/* Register Port Attributes */
 45 	FC_FDMI_DHBA = 0x0300,	/* Deregister HBA */
 [all …]
 
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| /linux/drivers/gpu/drm/amd/include/asic_reg/hdp/ | 
| H A D | hdp_5_0_0_offset.h | 27 // base address: 0x3c8028 …HDP_MMHUB_TLVL                                                                               0x0000
 29 …ne mmHDP_MMHUB_TLVL_BASE_IDX                                                                      0
 30 …HDP_MMHUB_UNITID                                                                             0x0001
 31 …ne mmHDP_MMHUB_UNITID_BASE_IDX                                                                    0
 32 …HDP_NONSURFACE_BASE                                                                          0x0040
 33 …ne mmHDP_NONSURFACE_BASE_BASE_IDX                                                                 0
 34 …HDP_NONSURFACE_INFO                                                                          0x0041
 35 …ne mmHDP_NONSURFACE_INFO_BASE_IDX                                                                 0
 36 …HDP_NONSURFACE_BASE_HI                                                                       0x0042
 [all …]
 
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| H A D | hdp_7_0_0_offset.h | 29 // base address: 0x3c8030 …HDP_MMHUB_TLVL                                                                               0x0008
 31 …e regHDP_MMHUB_TLVL_BASE_IDX                                                                      0
 32 …HDP_MMHUB_UNITID                                                                             0x0009
 33 …e regHDP_MMHUB_UNITID_BASE_IDX                                                                    0
 34 …HDP_NONSURFACE_BASE                                                                          0x0040
 35 …e regHDP_NONSURFACE_BASE_BASE_IDX                                                                 0
 36 …HDP_NONSURFACE_INFO                                                                          0x0041
 37 …e regHDP_NONSURFACE_INFO_BASE_IDX                                                                 0
 38 …HDP_NONSURFACE_BASE_HI                                                                       0x0042
 [all …]
 
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| H A D | hdp_4_4_2_offset.h | 29 // base address: 0x3c8030 …HDP_MMHUB_TLVL                                                                               0x0000
 31 …e regHDP_MMHUB_TLVL_BASE_IDX                                                                      0
 32 …HDP_MMHUB_UNITID                                                                             0x0001
 33 …e regHDP_MMHUB_UNITID_BASE_IDX                                                                    0
 34 …HDP_NONSURFACE_BASE                                                                          0x0040
 35 …e regHDP_NONSURFACE_BASE_BASE_IDX                                                                 0
 36 …HDP_NONSURFACE_INFO                                                                          0x0041
 37 …e regHDP_NONSURFACE_INFO_BASE_IDX                                                                 0
 38 …HDP_NONSURFACE_BASE_HI                                                                       0x0042
 [all …]
 
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| H A D | hdp_5_2_1_offset.h | 29 // base address: 0x3c8030 …HDP_MMHUB_TLVL                                                                               0x0000
 31 …e regHDP_MMHUB_TLVL_BASE_IDX                                                                      0
 32 …HDP_MMHUB_UNITID                                                                             0x0001
 33 …e regHDP_MMHUB_UNITID_BASE_IDX                                                                    0
 34 …HDP_NONSURFACE_BASE                                                                          0x0040
 35 …e regHDP_NONSURFACE_BASE_BASE_IDX                                                                 0
 36 …HDP_NONSURFACE_INFO                                                                          0x0041
 37 …e regHDP_NONSURFACE_INFO_BASE_IDX                                                                 0
 38 …HDP_NONSURFACE_BASE_HI                                                                       0x0042
 [all …]
 
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| H A D | hdp_4_0_offset.h | 27 // base address:	0x3c8028 #define mmHDP_MMHUB_TLVL	0x0000
 29 #define mmHDP_MMHUB_TLVL_BASE_IDX	0
 30 #define mmHDP_MMHUB_UNITID	0x0001
 31 #define mmHDP_MMHUB_UNITID_BASE_IDX	0
 32 #define mmHDP_NONSURFACE_BASE	0x0040
 33 #define mmHDP_NONSURFACE_BASE_BASE_IDX	0
 34 #define mmHDP_NONSURFACE_INFO	0x0041
 35 #define mmHDP_NONSURFACE_INFO_BASE_IDX	0
 36 #define mmHDP_NONSURFACE_BASE_HI	0x0042
 [all …]
 
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| H A D | hdp_6_0_0_offset.h | 29 // base address: 0x3c8030 …HDP_NONSURFACE_BASE                                                                          0x0040
 31 …e regHDP_NONSURFACE_BASE_BASE_IDX                                                                 0
 32 …HDP_NONSURFACE_INFO                                                                          0x0041
 33 …e regHDP_NONSURFACE_INFO_BASE_IDX                                                                 0
 34 …HDP_NONSURFACE_BASE_HI                                                                       0x0042
 35 …e regHDP_NONSURFACE_BASE_HI_BASE_IDX                                                              0
 36 …HDP_SURFACE_WRITE_FLAGS                                                                      0x00c4
 37 …e regHDP_SURFACE_WRITE_FLAGS_BASE_IDX                                                             0
 38 …HDP_SURFACE_READ_FLAGS                                                                       0x00c5
 [all …]
 
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| /linux/drivers/usb/misc/ | 
| H A D | ehset.c | 13 #define TEST_SE0_NAK_PID			0x010114 #define TEST_J_PID				0x0102
 15 #define TEST_K_PID				0x0103
 16 #define TEST_PACKET_PID				0x0104
 17 #define TEST_HS_HOST_PORT_SUSPEND_RESUME	0x0106
 18 #define TEST_SINGLE_STEP_GET_DEV_DESC		0x0107
 19 #define TEST_SINGLE_STEP_SET_FEATURE		0x0108
 29 	{ USB_DEVICE(0x0424, 0x4502) },
 30 	{ USB_DEVICE(0x0424, 0x4913) },
 31 	{ USB_DEVICE(0x0451, 0x8027) },
 [all …]
 
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