| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_default.h | 26 #define mmGRBM_CNTL_DEFAULT 0x00000018
27 #define mmGRBM_SKEW_CNTL_DEFAULT 0x00000020
28 #define mmGRBM_STATUS2_DEFAULT 0x00000000
29 #define mmGRBM_PWR_CNTL_DEFAULT 0x00000000
30 #define mmGRBM_STATUS_DEFAULT 0x00000000
31 #define mmGRBM_STATUS_SE0_DEFAULT 0x00000000
32 #define mmGRBM_STATUS_SE1_DEFAULT 0x00000000
33 #define mmGRBM_SOFT_RESET_DEFAULT 0x00000000
34 #define mmGRBM_CGTT_CLK_CNTL_DEFAULT 0x00000100
35 #define mmGRBM_GFX_CLKEN_CNTL_DEFAULT 0x00001008
[all …]
|
| H A D | gc_10_1_0_default.h | 26 #define mmSDMA0_DEC_START_DEFAULT 0x00000000
27 #define mmSDMA0_PG_CNTL_DEFAULT 0x00000000
28 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x00000000
29 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x00000000
30 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x00000000
31 #define mmSDMA0_POWER_CNTL_DEFAULT 0x40000050
32 #define mmSDMA0_CLK_CTRL_DEFAULT 0x00000100
33 #define mmSDMA0_CNTL_DEFAULT 0x000000c2
34 #define mmSDMA0_CHICKEN_BITS_DEFAULT 0x01af0107
35 #define mmSDMA0_GB_ADDR_CONFIG_DEFAULT 0x00000044
[all …]
|
| H A D | gc_10_3_0_default.h | 27 #define mmSDMA0_DEC_START_DEFAULT 0x00000000
28 #define mmSDMA0_GLOBAL_TIMESTAMP_LO_DEFAULT 0x00000000
29 #define mmSDMA0_GLOBAL_TIMESTAMP_HI_DEFAULT 0x00000000
30 #define mmSDMA0_PG_CNTL_DEFAULT 0x00000000
31 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x00000000
32 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x00000000
33 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x00000000
34 #define mmSDMA0_POWER_CNTL_DEFAULT 0x40000050
35 #define mmSDMA0_CLK_CTRL_DEFAULT 0x00000100
36 #define mmSDMA0_CNTL_DEFAULT 0x000000c2
[all …]
|
| H A D | gc_11_0_0_default.h | 28 #define regSDMA0_DEC_START_DEFAULT 0x00000000
29 #define regSDMA0_F32_MISC_CNTL_DEFAULT 0x00000000
30 #define regSDMA0_GLOBAL_TIMESTAMP_LO_DEFAULT 0x00000000
31 #define regSDMA0_GLOBAL_TIMESTAMP_HI_DEFAULT 0x00000000
32 #define regSDMA0_POWER_CNTL_DEFAULT 0x00000000
33 #define regSDMA0_CNTL_DEFAULT 0x00002440
34 #define regSDMA0_CHICKEN_BITS_DEFAULT 0x0107d186
35 #define regSDMA0_GB_ADDR_CONFIG_DEFAULT 0x00000545
36 #define regSDMA0_GB_ADDR_CONFIG_READ_DEFAULT 0x00000545
37 #define regSDMA0_RB_RPTR_FETCH_DEFAULT 0x00000000
[all …]
|
| /linux/Documentation/devicetree/bindings/input/ |
| H A D | google,cros-ec-keyb.yaml | 43 (((row) & 0xFF) << 24) | (((column) & 0xFF) << 16)
77 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
78 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
79 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
80 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
81 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
82 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
83 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
84 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
85 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
[all …]
|
| /linux/arch/m68k/ifpsp060/ |
| H A D | isp.sa | 1 .long 0x60ff0000,0x02360000,0x60ff0000,0x16260000
2 .long 0x60ff0000,0x12dc0000,0x60ff0000,0x11ea0000
3 .long 0x60ff0000,0x10de0000,0x60ff0000,0x12a40000
4 .long 0x60ff0000,0x12560000,0x60ff0000,0x122a0000
5 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xfefc487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afeea,0x487b0930
[all …]
|
| /linux/crypto/ |
| H A D | seed.c | 37 0x2989a1a8, 0x05858184, 0x16c6d2d4, 0x13c3d3d0,
38 0x14445054, 0x1d0d111c, 0x2c8ca0ac, 0x25052124,
39 0x1d4d515c, 0x03434340, 0x18081018, 0x1e0e121c,
40 0x11415150, 0x3cccf0fc, 0x0acac2c8, 0x23436360,
41 0x28082028, 0x04444044, 0x20002020, 0x1d8d919c,
42 0x20c0e0e0, 0x22c2e2e0, 0x08c8c0c8, 0x17071314,
43 0x2585a1a4, 0x0f8f838c, 0x03030300, 0x3b4b7378,
44 0x3b8bb3b8, 0x13031310, 0x12c2d2d0, 0x2ecee2ec,
45 0x30407070, 0x0c8c808c, 0x3f0f333c, 0x2888a0a8,
46 0x32023230, 0x1dcdd1dc, 0x36c6f2f4, 0x34447074,
[all …]
|
| H A D | camellia_generic.c | 21 0x70707000, 0x82828200, 0x2c2c2c00, 0xececec00,
22 0xb3b3b300, 0x27272700, 0xc0c0c000, 0xe5e5e500,
23 0xe4e4e400, 0x85858500, 0x57575700, 0x35353500,
24 0xeaeaea00, 0x0c0c0c00, 0xaeaeae00, 0x41414100,
25 0x23232300, 0xefefef00, 0x6b6b6b00, 0x93939300,
26 0x45454500, 0x19191900, 0xa5a5a500, 0x21212100,
27 0xededed00, 0x0e0e0e00, 0x4f4f4f00, 0x4e4e4e00,
28 0x1d1d1d00, 0x65656500, 0x92929200, 0xbdbdbd00,
29 0x86868600, 0xb8b8b800, 0xafafaf00, 0x8f8f8f00,
30 0x7c7c7c00, 0xebebeb00, 0x1f1f1f00, 0xcecece00,
[all …]
|
| /linux/include/crypto/ |
| H A D | aria.h | 42 0x00636363, 0x007c7c7c, 0x00777777, 0x007b7b7b,
43 0x00f2f2f2, 0x006b6b6b, 0x006f6f6f, 0x00c5c5c5,
44 0x00303030, 0x00010101, 0x00676767, 0x002b2b2b,
45 0x00fefefe, 0x00d7d7d7, 0x00ababab, 0x00767676,
46 0x00cacaca, 0x00828282, 0x00c9c9c9, 0x007d7d7d,
47 0x00fafafa, 0x00595959, 0x00474747, 0x00f0f0f0,
48 0x00adadad, 0x00d4d4d4, 0x00a2a2a2, 0x00afafaf,
49 0x009c9c9c, 0x00a4a4a4, 0x00727272, 0x00c0c0c0,
50 0x00b7b7b7, 0x00fdfdfd, 0x00939393, 0x00262626,
51 0x00363636, 0x003f3f3f, 0x00f7f7f7, 0x00cccccc,
[all …]
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8365.dtsi | 24 #size-cells = <0>;
26 cluster0_opp: opp-table-0 {
128 cpu0: cpu@0 {
131 reg = <0x0>;
135 i-cache-size = <0x8000>;
138 d-cache-size = <0x8000>;
151 reg = <0x1>;
155 i-cache-size = <0x8000>;
158 d-cache-size = <0x8000>;
171 reg = <0x2>;
[all …]
|
| H A D | mt8183.dtsi | 293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
[all …]
|
| H A D | mt8186.dtsi | 35 reg = <0 0x1000ce00 0 0x200>;
336 #size-cells = <0>;
374 cpu0: cpu@0 {
377 reg = <0x000>;
401 reg = <0x100>;
425 reg = <0x200>;
449 reg = <0x300>;
473 reg = <0x400>;
497 reg = <0x500>;
521 reg = <0x600>;
[all …]
|
| /linux/arch/m68k/ifpsp060/src/ |
| H A D | isp.S | 42 set _off_chk, 0x00
43 set _off_divbyzero, 0x04
44 set _off_trace, 0x08
45 set _off_access, 0x0c
46 set _off_done, 0x10
48 set _off_cas, 0x14
49 set _off_cas2, 0x18
50 set _off_lock, 0x1c
51 set _off_unlock, 0x20
53 set _off_imr, 0x40
[all …]
|