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/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dcpuctrl.yaml33 "^clock@[0-9a-f]+$":
65 reg = <0x00a22000 0x2000>;
66 ranges = <0 0x00a22000 0x2000>;
68 clock: clock@0 {
70 reg = <0 0x2000>;
/linux/arch/arm/boot/dts/hisilicon/
H A Dhisi-x5hd2.dtsi20 #address-cells = <0>;
23 reg = <0xf8a01000 0x1000>, <0xf8a00100 0x100>;
31 ranges = <0 0xf8000000 0x8000000>;
41 reg = <0x00002000 0x1000>;
43 interrupts = <0 24 4>;
55 reg = <0x00a29000 0x1000>;
57 interrupts = <0 25 4>;
64 reg = <0x00a2a000 0x1000>;
66 interrupts = <0 26 4>;
73 reg = <0x00a2b000 0x1000>;
[all …]