Searched +full:0 +full:x00884000 (Results 1 – 13 of 13) sorted by relevance
/freebsd/contrib/ntp/sntp/libopts/ |
H A D | ag-char-map.h | 51 #if 0 /* mapping specification source (from autogen.map) */ 81 // oct-digit "0-7" 111 #endif /* 0 -- mapping spec. source */ 116 #define IS_NEWLINE_CHAR( _c) is_ag_char_map_char((char)(_c), 0x00000001) 117 #define SPN_NEWLINE_CHARS(_s) spn_ag_char_map_chars(_s, 0) 118 #define BRK_NEWLINE_CHARS(_s) brk_ag_char_map_chars(_s, 0) 119 #define SPN_NEWLINE_BACK(s,e) spn_ag_char_map_back(s, e, 0) 120 #define BRK_NEWLINE_BACK(s,e) brk_ag_char_map_back(s, e, 0) 121 #define IS_NUL_BYTE_CHAR( _c) is_ag_char_map_char((char)(_c), 0x00000002) 126 #define IS_DIR_SEP_CHAR( _c) is_ag_char_map_char((char)(_c), 0x00000004) [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | qcom,spi-geni-qcom.yaml | 87 reg = <0x00880000 0x4000>; 91 pinctrl-0 = <&qup_spi0_default>; 94 #size-cells = <0>; 97 interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, 98 <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>; 107 reg = <0x00884000 0x4000>; 110 dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>, 114 pinctrl-0 = <&qup_spi1_default>; 117 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sc8180x.dtsi | 28 #clock-cells = <0>; 34 #clock-cells = <0>; 42 #size-cells = <0>; 44 CPU0: cpu@0 { 47 reg = <0x0 0x0>; 51 qcom,freq-domain = <&cpufreq_hw 0>; 58 clocks = <&cpufreq_hw 0>; 76 reg = <0x0 0x10 [all...] |
H A D | sc7180.dtsi | 66 #clock-cells = <0>; 72 #clock-cells = <0>; 78 #size-cells = <0>; 80 CPU0: cpu@0 { 83 reg = <0x0 0x0>; 84 clocks = <&cpufreq_hw 0>; 95 qcom,freq-domain = <&cpufreq_hw 0>; 112 reg = <0x0 0x10 [all...] |
H A D | sdm670.dtsi | 33 #size-cells = <0>; 35 CPU0: cpu@0 { 38 reg = <0x0 0x0>; 42 qcom,freq-domain = <&cpufreq_hw 0>; 65 reg = <0x0 0x100>; 69 qcom,freq-domain = <&cpufreq_hw 0>; 87 reg = <0x0 0x20 [all...] |
H A D | sc8280xp.dtsi | 33 #clock-cells = <0>; 38 #clock-cells = <0>; 45 #size-cells = <0>; 47 CPU0: cpu@0 { 50 reg = <0x0 0x0>; 51 clocks = <&cpufreq_hw 0>; 57 qcom,freq-domain = <&cpufreq_hw 0>; 77 reg = <0x0 0x10 [all...] |
H A D | sdm845.dtsi | 77 #clock-cells = <0>; 84 #clock-cells = <0>; 91 #size-cells = <0>; 93 CPU0: cpu@0 { 96 reg = <0x0 0x0>; 97 clocks = <&cpufreq_hw 0>; 101 qcom,freq-domain = <&cpufreq_hw 0>; 125 reg = <0x0 0x10 [all...] |
H A D | sm8350.dtsi | 37 #clock-cells = <0>; 45 #clock-cells = <0>; 51 #size-cells = <0>; 53 CPU0: cpu@0 { 56 reg = <0x0 0x0>; 57 clocks = <&cpufreq_hw 0>; 60 qcom,freq-domain = <&cpufreq_hw 0>; 80 reg = <0x0 0x10 [all...] |
H A D | sm6350.dtsi | 31 #clock-cells = <0>; 39 #clock-cells = <0>; 45 #size-cells = <0>; 47 CPU0: cpu@0 { 50 reg = <0x0 0x0>; 51 clocks = <&cpufreq_hw 0>; 56 qcom,freq-domain = <&cpufreq_hw 0>; 80 reg = <0x0 0x10 [all...] |
H A D | sm8150.dtsi | 32 #clock-cells = <0>; 39 #clock-cells = <0>; 47 #size-cells = <0>; 49 CPU0: cpu@0 { 52 reg = <0x0 0x0>; 53 clocks = <&cpufreq_hw 0>; 58 qcom,freq-domain = <&cpufreq_hw 0>; 60 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, [all...] |
H A D | sm8550.dtsi | 38 #clock-cells = <0>; 43 #clock-cells = <0>; 47 #clock-cells = <0>; 55 #clock-cells = <0>; 64 #clock-cells = <0>; 70 #size-cells = <0>; 72 CPU0: cpu@0 { 75 reg = <0 0>; 76 clocks = <&cpufreq_hw 0>; [all...] |
H A D | sm8450.dtsi | 39 #clock-cells = <0>; 45 #clock-cells = <0>; 52 #size-cells = <0>; 54 CPU0: cpu@0 { 57 reg = <0x0 0x0>; 62 qcom,freq-domain = <&cpufreq_hw 0>; 64 clocks = <&cpufreq_hw 0>; 81 reg = <0x0 0x10 [all...] |
H A D | sm8250.dtsi | 82 #clock-cells = <0>; 90 #clock-cells = <0>; 96 #size-cells = <0>; 98 CPU0: cpu@0 { 101 reg = <0x0 0x0>; 102 clocks = <&cpufreq_hw 0>; 109 qcom,freq-domain = <&cpufreq_hw 0>; 111 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, [all...] |