Searched +full:0 +full:x00880000 (Results  1 – 7 of 7) sorted by relevance
| /linux/Documentation/devicetree/bindings/media/ | 
| H A D | raspberrypi,pispbe.yaml | 58              reg = <0x10 0x00880000 0x0 0x4000>;
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| /linux/drivers/hid/ | 
| H A D | hid-ite.c | 14 #define QUIRK_TOUCHPAD_ON_OFF_REPORT		BIT(0)22 		if (*rsize == 188 && rdesc[162] == 0x81 && rdesc[163] == 0x02) {  in ite_report_fixup()
 27 		if (*rsize == 188 && rdesc[185] == 0x81 && rdesc[186] == 0x02) {  in ite_report_fixup()
 32 		if (*rsize == 210 && rdesc[184] == 0x81 && rdesc[185] == 0x02) {  in ite_report_fixup()
 50 	    (usage->hid & HID_USAGE_PAGE) == 0x00880000) {  in ite_input_mapping()
 51 		if (usage->hid == 0x00880078) {  in ite_input_mapping()
 56 		if (usage->hid == 0x00880079) {  in ite_input_mapping()
 64 	return 0;  in ite_input_mapping()
 73 		return 0;  in ite_event()
 78 	 * The ITE8595 always reports 0 as value for the rfkill button. Luckily  in ite_event()
 [all …]
 
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| /linux/drivers/net/ethernet/qlogic/qed/ | 
| H A D | qed_init_ops.c | 26 	0,27 	0,
 28 	0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */
 29 	0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */
 30 	0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */
 31 	0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */
 32 	0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */
 33 	0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */
 34 	0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */
 35 	0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */
 [all …]
 
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| /linux/drivers/gpu/drm/radeon/ | 
| H A D | radeon_combios.c | 135 	uint16_t offset = 0, check_offset;  in combios_get_table_offset()138 		return 0;  in combios_get_table_offset()
 143 		check_offset = 0xc;  in combios_get_table_offset()
 146 		check_offset = 0x14;  in combios_get_table_offset()
 149 		check_offset = 0x2a;  in combios_get_table_offset()
 152 		check_offset = 0x2c;  in combios_get_table_offset()
 155 		check_offset = 0x2e;  in combios_get_table_offset()
 158 		check_offset = 0x30;  in combios_get_table_offset()
 161 		check_offset = 0x32;  in combios_get_table_offset()
 164 		check_offset = 0x34;  in combios_get_table_offset()
 [all …]
 
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| H A D | radeon_reg.h | 62 #define RADEON_MC_AGP_LOCATION		0x014c63 #define		RADEON_MC_AGP_START_MASK	0x0000FFFF
 64 #define		RADEON_MC_AGP_START_SHIFT	0
 65 #define		RADEON_MC_AGP_TOP_MASK		0xFFFF0000
 67 #define RADEON_MC_FB_LOCATION		0x0148
 68 #define		RADEON_MC_FB_START_MASK		0x0000FFFF
 69 #define		RADEON_MC_FB_START_SHIFT	0
 70 #define		RADEON_MC_FB_TOP_MASK		0xFFFF0000
 72 #define RADEON_AGP_BASE_2		0x015c /* r200+ only */
 73 #define RADEON_AGP_BASE			0x0170
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| /linux/arch/arm64/boot/dts/qcom/ | 
| H A D | sdm670.dtsi | 37 			#clock-cells = <0>;43 			#clock-cells = <0>;
 50 		#size-cells = <0>;
 52 		cpu0: cpu@0 {
 55 			reg = <0x0 0x0>;
 59 			qcom,freq-domain = <&cpufreq_hw 0>;
 82 			reg = <0x0 0x100>;
 86 			qcom,freq-domain = <&cpufreq_hw 0>;
 104 			reg = <0x0 0x200>;
 108 			qcom,freq-domain = <&cpufreq_hw 0>;
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/ | 
| H A D | ctxnv50.c | 23 #define CP_FLAG_CLEAR                 025 #define CP_FLAG_SWAP_DIRECTION        ((0 * 32) + 0)
 26 #define CP_FLAG_SWAP_DIRECTION_LOAD   0
 28 #define CP_FLAG_UNK01                 ((0 * 32) + 1)
 29 #define CP_FLAG_UNK01_CLEAR           0
 31 #define CP_FLAG_UNK03                 ((0 * 32) + 3)
 32 #define CP_FLAG_UNK03_CLEAR           0
 34 #define CP_FLAG_USER_SAVE             ((0 * 32) + 5)
 35 #define CP_FLAG_USER_SAVE_NOT_PENDING 0
 37 #define CP_FLAG_USER_LOAD             ((0 * 32) + 6)
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