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Searched +full:0 +full:x00880000 (Results 1 – 8 of 8) sorted by relevance

/linux/Documentation/devicetree/bindings/media/
H A Draspberrypi,pispbe.yaml58 reg = <0x10 0x00880000 0x0 0x4000>;
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_init_ops.c26 0,
27 0,
28 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */
29 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */
30 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */
31 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */
32 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */
33 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */
34 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */
35 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */
[all …]
/linux/arch/arm64/boot/dts/broadcom/
H A Dbcm2712.dtsi17 #clock-cells = <0>;
24 #clock-cells = <0>;
31 #clock-cells = <0>;
38 #clock-cells = <0>;
45 #clock-cells = <0>;
53 #size-cells = <0>;
62 cpu0: cpu@0 {
65 reg = <0x000>;
67 d-cache-size = <0x10000>;
70 i-cache-size = <0x10000>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc8280xp.dtsi38 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0 0x0>;
56 clocks = <&cpufreq_hw 0>;
63 qcom,freq-domain = <&cpufreq_hw 0>;
83 reg = <0x0 0x100>;
84 clocks = <&cpufreq_hw 0>;
91 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsm8650.dtsi42 #clock-cells = <0>;
47 #clock-cells = <0>;
52 #clock-cells = <0>;
61 #clock-cells = <0>;
71 #size-cells = <0>;
73 cpu0: cpu@0 {
76 reg = <0 0>;
83 clocks = <&cpufreq_hw 0>;
93 qcom,freq-domain = <&cpufreq_hw 0>;
127 reg = <0 0x100>;
[all …]
H A Dglymur.dtsi41 #size-cells = <0>;
43 cpu0: cpu@0 {
46 reg = <0x0 0x0>;
49 power-domains = <&cpu_pd0>, <&scmi_perf 0>;
64 reg = <0x0 0x100>;
67 power-domains = <&cpu_pd1>, <&scmi_perf 0>;
76 reg = <0x0 0x200>;
79 power-domains = <&cpu_pd2>, <&scmi_perf 0>;
88 reg = <0x0 0x300>;
91 power-domains = <&cpu_pd3>, <&scmi_perf 0>;
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dradeon_reg.h62 #define RADEON_MC_AGP_LOCATION 0x014c
63 #define RADEON_MC_AGP_START_MASK 0x0000FFFF
64 #define RADEON_MC_AGP_START_SHIFT 0
65 #define RADEON_MC_AGP_TOP_MASK 0xFFFF0000
67 #define RADEON_MC_FB_LOCATION 0x0148
68 #define RADEON_MC_FB_START_MASK 0x0000FFFF
69 #define RADEON_MC_FB_START_SHIFT 0
70 #define RADEON_MC_FB_TOP_MASK 0xFFFF0000
72 #define RADEON_AGP_BASE_2 0x015c /* r200+ only */
73 #define RADEON_AGP_BASE 0x0170
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxnv50.c23 #define CP_FLAG_CLEAR 0
25 #define CP_FLAG_SWAP_DIRECTION ((0 * 32) + 0)
26 #define CP_FLAG_SWAP_DIRECTION_LOAD 0
28 #define CP_FLAG_UNK01 ((0 * 32) + 1)
29 #define CP_FLAG_UNK01_CLEAR 0
31 #define CP_FLAG_UNK03 ((0 * 32) + 3)
32 #define CP_FLAG_UNK03_CLEAR 0
34 #define CP_FLAG_USER_SAVE ((0 * 32) + 5)
35 #define CP_FLAG_USER_SAVE_NOT_PENDING 0
37 #define CP_FLAG_USER_LOAD ((0 * 32) + 6)
[all …]