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/freebsd/sys/dev/sis/
H A Dif_sisreg.h45 #define SIS_CSR 0x00
46 #define SIS_CFG 0x04
47 #define SIS_EECTL 0x08
48 #define SIS_PCICTL 0x0C
49 #define SIS_ISR 0x10
50 #define SIS_IMR 0x14
51 #define SIS_IER 0x18
52 #define SIS_PHYCTL 0x1C
53 #define SIS_TX_LISTPTR 0x20
54 #define SIS_TX_CFG 0x24
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dp1024rdb.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
H A Dp2020rdb-pc.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
H A Dp1020rdb-pc.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
H A Dp1020rdb.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
61 reg = <0x00080000 0x00380000>;
68 reg = <0x00400000 0x00b00000>;
76 reg = <0x00f00000 0x00100000>;
82 nand@1,0 {
87 reg = <0x1 0x0 0x40000>;
[all …]
H A Dp2020rdb.dts29 reg = <0 0xffe05000 0 0x1000>;
32 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
33 0x1 0x0 0x0 0xffa00000 0x00040000
34 0x2 0x0 0x0 0xffb00000 0x00020000>;
36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
61 reg = <0x00080000 0x00380000>;
[all …]
H A Dp1021rdb-pc.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00ac0000>;
73 reg = <0x00ec0000 0x00040000>;
82 reg = <0x00f00000 0x00100000>;
87 nand@1,0 {
[all …]
H A Dp1010rdb-pa.dtsi36 partition@0 {
39 reg = <0x0 0x00100000>;
46 reg = <0x00100000 0x00100000>;
52 reg = <0x00200000 0x00400000>;
58 reg = <0x00600000 0x00400000>;
64 reg = <0x00a00000 0x00f00000>;
70 reg = <0x01900000 0x00700000>;
76 interrupts = <1 1 0 0>;
80 interrupts = <2 1 0 0>;
84 interrupts = <4 1 0 0>;
H A Dp1025rdb.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
/freebsd/sys/dev/nge/
H A Dif_ngereg.h36 #define NGE_CSR 0x00
37 #define NGE_CFG 0x04
38 #define NGE_MEAR 0x08
39 #define NGE_PCITST 0x0C
40 #define NGE_ISR 0x10
41 #define NGE_IMR 0x14
42 #define NGE_IER 0x18
43 #define NGE_IHR 0x1C
44 #define NGE_TX_LISTPTR_LO 0x20
45 #define NGE_TX_LISTPTR_HI 0x24
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j721s2.dtsi29 #size-cells = <0>;
42 cpu0: cpu@0 {
44 reg = <0x000>;
47 i-cache-size = <0xc000>;
50 d-cache-size = <0x8000>;
58 reg = <0x001>;
61 i-cache-size = <0xc000>;
64 d-cache-size = <0x8000>;
75 cache-size = <0x100000>;
118 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j7200.dtsi25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xc000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
113 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j721e.dtsi25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xC000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xC000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
114 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j784s4.dtsi26 #size-cells = <0>;
65 cpu0: cpu@0 {
67 reg = <0x000>;
70 i-cache-size = <0xc000>;
73 d-cache-size = <0x8000>;
81 reg = <0x001>;
84 i-cache-size = <0xc000>;
87 d-cache-size = <0x8000>;
95 reg = <0x002>;
98 i-cache-size = <0xc000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Dqfprom.txt17 reg = <0x00700000 0x8000>;
21 reg = <0x4404 0x10>;
H A Dnvmem.yaml39 when it's driven low (logical '0') to allow writing.
59 reg = <0x00700000 0x100000>;
72 reg = <0x404 0x10>;
76 reg = <0x504 0x11>;
81 reg = <0x6 0x
[all...]
/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9287an.h22 #define AR9287_AN_RF2G3_CH0 0x7808
23 #define AR9287_AN_RF2G3_CH1 0x785c
24 #define AR9287_AN_RF2G3_DB1 0xE0000000
26 #define AR9287_AN_RF2G3_DB2 0x1C000000
28 #define AR9287_AN_RF2G3_OB_CCK 0x03800000
30 #define AR9287_AN_RF2G3_OB_PSK 0x00700000
32 #define AR9287_AN_RF2G3_OB_QAM 0x000E0000
34 #define AR9287_AN_RF2G3_OB_PAL_OFF 0x0001C000
37 #define AR9287_AN_TXPC0 0x7898
38 #define AR9287_AN_TXPC0_TXPCMODE 0x0000C000
[all …]
H A Dar9285an.h25 #define AR9285_AN_RF2G1 0x7820
27 #define AR9285_AN_RF2G1_ENPACAL 0x00000800
29 #define AR9285_AN_RF2G1_PDPADRV1 0x02000000
31 #define AR9285_AN_RF2G1_PDPADRV2 0x01000000
33 #define AR9285_AN_RF2G1_PDPAOUT 0x00800000
36 #define AR9285_AN_RF2G2 0x7824
38 #define AR9285_AN_RF2G2_OFFCAL 0x00001000
41 #define AR9285_AN_RF2G3 0x7828
43 #define AR9285_AN_RF2G3_PDVCCOMP 0x02000000
45 #define AR9285_AN_RF2G3_OB_0 0x00E00000
[all …]
H A Dar9285phy.h31 #define AR9285_AN_RF2G1 0x7820
32 #define AR9285_AN_RF2G1_ENPACAL 0x00000800
34 #define AR9285_AN_RF2G1_PDPADRV1 0x02000000
36 #define AR9285_AN_RF2G1_PDPADRV2 0x01000000
38 #define AR9285_AN_RF2G1_PDPAOUT 0x00800000
41 #define AR9285_AN_RF2G2 0x7824
42 #define AR9285_AN_RF2G2_OFFCAL 0x00001000
45 #define AR9285_AN_RF2G3 0x7828
46 #define AR9285_AN_RF2G3_PDVCCOMP 0x02000000
48 #define AR9285_AN_RF2G3_OB_0 0x00E00000
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/
H A Dr92c_rx_desc.h26 #define R92C_RXDW0_PKTLEN_M 0x00003fff
27 #define R92C_RXDW0_PKTLEN_S 0
28 #define R92C_RXDW0_CRCERR 0x00004000
29 #define R92C_RXDW0_ICVERR 0x00008000
30 #define R92C_RXDW0_INFOSZ_M 0x000f0000
32 #define R92C_RXDW0_CIPHER_M 0x00700000
34 #define R92C_RXDW0_QOS 0x00800000
35 #define R92C_RXDW0_SHIFT_M 0x03000000
37 #define R92C_RXDW0_PHYST 0x04000000
38 #define R92C_RXDW0_SWDEC 0x08000000
[all …]
H A Dr92c_tx_desc.h28 #define R92C_FLAGS0_BMCAST 0x01
29 #define R92C_FLAGS0_LSG 0x04
30 #define R92C_FLAGS0_FSG 0x08
31 #define R92C_FLAGS0_OWN 0x80
34 #define R92C_TXDW1_MACID_M 0x0000001f
35 #define R92C_TXDW1_MACID_S 0
36 #define R92C_TXDW1_AGGEN 0x00000020
37 #define R92C_TXDW1_AGGBK 0x00000040
39 #define R92C_TXDW1_QSEL_M 0x00001f00
42 #define R92C_TXDW1_QSEL_BE 0x00 /* or 0x03 */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm953012hr.dts50 reg = <0x80000000 0x10000000>;
55 partition@0 {
57 reg = <0x00000000 0x00200000>;
62 reg = <0x00200000 0x00400000>;
66 reg = <0x00600000 0x00a00000>;
70 reg = <0x01000000 0x07000000>;
82 partition@0 {
84 reg = <0x00000000 0x000d0000>;
88 reg = <0x000d0000 0x00030000>;
92 reg = <0x00100000 0x00600000>;
[all …]
H A Dbcm953012k.dts48 reg = <0x80000000 0x10000000>;
53 nand@0 {
55 reg = <0>;
64 partition@0 {
66 reg = <0x00000000 0x00200000>;
71 reg = <0x00200000 0x00400000>;
75 reg = <0x00600000 0x00a00000>;
79 reg = <0x01000000 0x07000000>;
92 partition@0 {
94 reg = <0x00000000 0x000d0000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Datmel,lcdc.txt31 reg = <0x00500000 0x1000>;
32 interrupts = <23 3 0>;
34 pinctrl-0 = <&pinctrl_fb>;
45 reg = <0x00700000 0x1000 0x70000000 0x200000>;
68 atmel,dmacon = <0x1>;
69 atmel,lcdcon2 = <0x80008002>;
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Duc101.dts75 phy0: ethernet-phy@0 {
77 reg = <0>;
91 reg = <0x2c>;
95 reg = <0x51>;
105 ranges = <0 0 0xff800000 0x00800000
106 1 0 0x80000000 0x00800000
107 3 0 0x80000000 0x00800000>;
109 flash@0,0 {
111 reg = <0 0 0x00800000>;
117 partition@0 {
[all …]

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