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/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dqcom,msm8916.yaml54 reg = <0x00400000 0x62000>;
63 reg = <0x00500000 0x11000>;
72 reg = <0x00580000 0x14000>;
H A Dqcom,qcs404.yaml53 reg = <0x00400000 0x80000>;
62 reg = <0x00500000 0x15080>;
71 reg = <0x00580000 0x23080>;
H A Dqcom,msm8939.yaml70 reg = <0x00580000 0x14000>;
/freebsd/sys/contrib/ncsw/inc/flib/
H A Dfman_common.h40 #define NIA_ORDER_RESTOR 0x00800000
41 #define NIA_ENG_FM_CTL 0x00000000
42 #define NIA_ENG_PRS 0x00440000
43 #define NIA_ENG_KG 0x00480000
44 #define NIA_ENG_PLCR 0x004C0000
45 #define NIA_ENG_BMI 0x00500000
46 #define NIA_ENG_QMI_ENQ 0x00540000
47 #define NIA_ENG_QMI_DEQ 0x00580000
48 #define NIA_ENG_MASK 0x007C0000
50 #define NIA_FM_CTL_AC_CC 0x00000006
[all …]
H A Dfsl_fman_kg.h81 uint32_t kgse_dv0; /**< KeyGen Scheme Entry Default Value 0 */
99 #define FM_KG_KGAR_GO 0x80000000
100 #define FM_KG_KGAR_READ 0x40000000
101 #define FM_KG_KGAR_WRITE 0x00000000
102 #define FM_KG_KGAR_SEL_SCHEME_ENTRY 0x00000000
103 #define FM_KG_KGAR_SCM_WSEL_UPDATE_CNT 0x00008000
105 #define KG_SCH_PP_SHIFT_HIGH 0x80000000
106 #define KG_SCH_PP_NO_GEN 0x10000000
107 #define KG_SCH_PP_SHIFT_LOW 0x0000F000
108 #define KG_SCH_MODE_NIA_PLCR 0x40000000
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Da3m071.dts26 ranges = <0 0xf0000000 0x0000c000>;
27 reg = <0xf0000000 0x00000100>;
28 bus-frequency = <0>; /* From boot loader */
29 system-frequency = <0>; /* From boot loader */
41 reg = <0x2000 0x100>;
42 interrupts = <2 1 0>;
63 reg = <0x2c00 0x100>;
64 interrupts = <2 4 0>;
73 reg = <0x03>;
94 ranges = <0 0 0xfc000000 0x02000000
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dc293pcie.dts46 reg = <0xf 0xffe1e000 0 0x2000>;
47 ranges = <0x0 0x0 0xf 0xec000000 0x04000000
48 0x1 0x0 0xf 0xff800000 0x00010000
49 0x2 0x0 0xf 0xffdf0000 0x00010000>;
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
58 reg = <0xf 0xffe0a000 0 0x1000>;
59 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
60 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0x80000000
[all …]
H A Dp1010rdb.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x2000000>;
46 reg = <0x00040000 0x00040000>;
52 reg = <0x00080000 0x00700000>;
58 reg = <0x00800000 0x01400000>;
66 reg = <0x01f00000 0x00100000>;
72 ifc_nand: nand@1,0 {
76 reg = <0x1 0x0 0x10000>;
79 cpld@3,0 {
83 reg = <0x3 0x0 0x0000020>;
[all …]
H A Dp1025twr.dtsi43 nor@0,0 {
47 reg = <0x0 0x0 0x4000000>;
51 partition@0 {
54 reg = <0x0 0x00040000>;
61 reg = <0x00040000 0x00040000>;
67 reg = <0x00080000 0x00580000>;
73 reg = <0x00600000 0x038c0000>;
80 reg = <0x03ec0000 0x00040000>;
89 reg = <0x03f00000 0x00100000>;
96 display@2,0 {
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLBTInstrInfo.td3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
17 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, Predicates = [HasExtLBT] in {
19 def MOVGR2SCR : FmtGR2SCR<0x00000800>;
20 def MOVSCR2GR : FmtSCR2GR<0x00000c00>;
22 def JISCR0 : FmtJISCR<0x48000200>;
23 def JISCR1 : FmtJISCR<0x48000300>;
25 def ADDU12I_W : ALU_2RI5<0x00290000, simm5>;
27 def ADC_B : ALU_3R<0x00300000>;
28 def ADC_H : ALU_3R<0x00308000>;
29 def ADC_W : ALU_3R<0x00310000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr8a7791-koelsch.dts68 reg = <0 0x40000000 0 0x40000000>;
73 reg = <2 0x00000000 0 0x40000000>;
79 pinctrl-0 = <&keyboard_pins>;
83 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
111 gpios = <&gpio7 0 GPIO_ACTIVE_LO
[all...]
/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/aes/
H A Daestab2.h49 0x00000001, 0x00000002, 0x00000004, 0x00000008,
50 0x00000010, 0x00000020, 0x00000040, 0x00000080,
51 0x0000001b, 0x00000036
57 0x00000063, 0x0000007c, 0x00000077, 0x0000007b,
58 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5,
59 0x00000030, 0x00000001, 0x00000067, 0x0000002b,
60 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076,
61 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d,
62 0x000000fa, 0x00000059, 0x00000047, 0x000000f0,
63 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af,
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dqcs404.dtsi24 #clock-cells = <0>;
30 #clock-cells = <0>;
37 #size-cells = <0>;
42 reg = <0x100>;
56 reg = <0x101>;
70 reg = <0x102>;
84 reg = <0x103>;
104 CPU_SLEEP_0: cpu-sleep-0 {
107 arm,psci-suspend-param = <0x40000003>;
161 reg = <0 0x80000000 0 0>;
[all …]
H A Dmsm8939.dtsi30 #clock-cells = <0>;
36 #clock-cells = <0>;
43 #size-cells = <0>;
49 reg = <0x100>;
67 reg = <0x101>;
80 reg = <0x102>;
93 reg = <0x103>;
102 CPU4: cpu@0 {
106 reg = <0x0>;
124 reg = <0x1>;
[all …]
H A Dmsm8916.dtsi27 reg = <0 0x80000000 0 0>;
36 reg = <0x0 0x86000000 0x0 0x300000>;
42 reg = <0x0 0x86300000 0x0 0x100000>;
50 reg = <0x0 0x86400000 0x0 0x100000>;
55 reg = <0x0 0x86500000 0x0 0x180000>;
60 reg = <0x0 0x86680000 0x0 0x80000>;
66 reg = <0x0 0x86700000 0x0 0xe0000>;
73 reg = <0x0 0x867e0000 0x0 0x20000>;
85 * alignment = <0x0 0x400000>;
86 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
[all …]
/freebsd/sys/contrib/ncsw/Peripherals/FM/inc/
H A Dfm_common.h62 #define FM_MM_MURAM 0x00000000
63 #define FM_MM_BMI 0x00080000
64 #define FM_MM_QMI 0x00080400
65 #define FM_MM_PRS 0x000c7000
66 #define FM_MM_KG 0x000C1000
67 #define FM_MM_DMA 0x000C2000
68 #define FM_MM_FPM 0x000C3000
69 #define FM_MM_PLCR 0x000C0000
70 #define FM_MM_IMEM 0x000C4000
71 #define FM_MM_CGP 0x000DB000
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]
/freebsd/sys/dev/bxe/
H A D57712_init_values.c54 /* #define ATC_COMMON_START 0 */
55 {OP_WR, 0x1100b8, 0x1},
58 {OP_WR, 0x600dc, 0x1},
59 {OP_WR, 0x60050, 0x180},
60 {OP_SW, 0x61000, 0x1ff0000},
61 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
62 {OP_WR, 0x617fc, 0x3fe001},
63 {OP_IF_MODE_AND, 1, 0x10}, /* e3 */
64 {OP_SW, 0x617fc, 0x20101ff},
65 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
[all …]