Searched +full:0 +full:x004a8000 (Results 1 – 11 of 11) sorted by relevance
134 - pattern: '^s[0-9]+_p1$'135 - pattern: '^s[0-9]+_p2$'136 - pattern: '^s[0-9]+_p1$'137 - pattern: '^s[0-9]+_p2$'138 - pattern: '^s[0-9]+_p1$'139 - pattern: '^s[0-9]+_p2$'140 - pattern: '^s[0-9]+_p1$'141 - pattern: '^s[0-9]+_p2$'142 - pattern: '^s[0-9]+_p1$'143 - pattern: '^s[0-9]+_p2$'[all …]
21 #clock-cells = <0>;26 #clock-cells = <0>;32 #size-cells = <0>;34 cpu0: cpu@0 {37 reg = <0x0>;47 reg = <0x1>;57 reg = <0x2>;67 reg = <0x3>;84 qcom,dload-mode = <&tcsr 0x6100>;91 reg = <0x0 0x40000000 0x0 0x0>;[all …]
23 #clock-cells = <0>;28 #clock-cells = <0>;34 #size-cells = <0>;36 cpu0: cpu@0 {39 reg = <0x0>;60 reg = <0x100>;75 reg = <0x200>;90 reg = <0x300>;105 qcom,dload-mode = <&tcsr 0x25100>;112 reg = <0x0 0x80000000 0x0 0x0>;[all …]
23 #clock-cells = <0>;29 #clock-cells = <0>;35 #size-cells = <0>;37 cpu0: cpu@0 {40 reg = <0x0>;53 reg = <0x1>;65 reg = <0x2>;77 reg = <0x3>;95 qcom,dload-mode = <&tcsr 0x6100>;107 opp-supported-hw = <0xf>;[all …]
26 #clock-cells = <0>;31 #clock-cells = <0>;37 #clock-cells = <0>;42 #clock-cells = <0>;48 #size-cells = <0>;50 cpu0: cpu@0 {53 reg = <0x0>;66 reg = <0x1>;79 reg = <0x2>;92 reg = <0x3>;[all …]
27 #clock-cells = <0>;33 #size-cells = <0>;35 cpu0: cpu@0 {38 reg = <0x0>;49 reg = <0x1>;60 reg = <0x2>;71 reg = <0x3>;82 reg = <0x100>;93 reg = <0x101>;104 reg = <0x102>;[all …]
21 #clock-cells = <0>;26 #clock-cells = <0>;32 #size-cells = <0>;36 reg = <0x100>;55 reg = <0x101>;68 reg = <0x102>;81 reg = <0x103>;113 cluster_sleep_0: cluster-sleep-0 {115 arm,psci-suspend-param = <0x41000053>;125 cpu_sleep_0: cpu-sleep-0 {[all …]
28 #clock-cells = <0>;34 #clock-cells = <0>;42 #size-cells = <0>;44 cpu0: cpu@0 {47 reg = <0x0>;59 reg = <0x1>;71 reg = <0x2>;83 reg = <0x3>;95 reg = <0x100>;107 reg = <0x101>;[all …]
31 #clock-cells = <0>;37 #clock-cells = <0>;44 #size-cells = <0>;50 cpu-release-addr = /bits/ 64 <0>;51 reg = <0x100>;69 cpu-release-addr = /bits/ 64 <0>;70 reg = <0x101>;83 cpu-release-addr = /bits/ 64 <0>;84 reg = <0x102>;97 cpu-release-addr = /bits/ 64 <0>;[all …]
28 reg = <0 0x80000000 0 0>;37 reg = <0x0 0x86000000 0x0 0x300000>;43 reg = <0x0 0x86300000 0x0 0x100000>;51 reg = <0x0 0x86400000 0x0 0x100000>;56 reg = <0x0 0x86500000 0x0 0x180000>;61 reg = <0x0 0x86680000 0x0 0x80000>;67 reg = <0x0 0x86700000 0x0 0xe0000>;74 reg = <0x0 0x867e0000 0x0 0x20000>;86 * alignment = <0x0 0x400000>;87 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;[all …]
30 #clock-cells = <0>;37 #clock-cells = <0>;45 #size-cells = <0>;47 cpu0: cpu@0 {50 reg = <0x0 0x0>;54 clocks = <&kryocc 0>;69 reg = <0x0 0x1>;73 clocks = <&kryocc 0>;83 reg = <0x0 0x100>;102 reg = <0x0 0x101>;[all …]