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/linux/Documentation/devicetree/bindings/timer/
H A Dnvidia,tegra186-timer.yaml45 One per each timer channels 0 through 9.
57 One per each timer channels 0 through 15.
73 reg = <0x03010000 0x000e0000>;
74 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
92 reg = <0x02080000 0x00121000>;
93 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234.dtsi19 bus@0 {
24 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
28 reg = <0x0 0x00100000 0x0 0xf000>,
29 <0x0 0x0010f000 0x0 0x1000>;
35 reg = <0x0 0x02080000 0x0 0x00121000>;
36 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
58 reg = <0x0 0x02200000 0x0 0x10000>,
59 <0x0 0x02210000 0x0 0x10000>;
112 gpio-ranges = <&pinmux 0 0 164>;
117 reg = <0x0 0x2430000 0x0 0x19100>;
[all …]