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Searched +full:0 +full:x00084000 (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/bearssl/src/symcipher/
H A Ddes_tab.c30 * order (rightmost bit is 0).
36 4, 14, 18, 8, 17, 0, 19
46 24, 7, 13, 0, 21, 17, 1
53 0x00808200, 0x00000000, 0x00008000, 0x00808202,
54 0x00808002, 0x00008202, 0x00000002, 0x00008000,
55 0x00000200, 0x00808200, 0x00808202, 0x00000200,
56 0x00800202, 0x00808002, 0x00800000, 0x00000002,
57 0x00000202, 0x00800200, 0x00800200, 0x00008200,
58 0x00008200, 0x00808000, 0x00808000, 0x00800202,
59 0x00008002, 0x00800002, 0x00800002, 0x00008002,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dqcom,ipq8074-qmp-pcie-phy.yaml47 const: 0
53 const: 0
75 reg = <0x00084000 0x1000>;
85 #clock-cells = <0>;
87 #phy-cells = <0>;
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dsequoia.dts22 dcr-parent = <&{/cpus/cpu@0}>;
35 #size-cells = <0>;
37 cpu@0 {
40 reg = <0x00000000>;
41 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
54 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
60 cell-index = <0>;
61 dcr-reg = <0x0c0 0x009>;
62 #address-cells = <0>;
[all …]
/freebsd/sys/contrib/xen/
H A Dtrace.h34 #define TRC_GEN 0x0001f000 /* General trace */
35 #define TRC_SCHED 0x0002f000 /* Xen Scheduler trace */
36 #define TRC_DOM0OP 0x0004f000 /* Xen DOM0 operation trace */
37 #define TRC_HVM 0x0008f000 /* Xen HVM trace */
38 #define TRC_MEM 0x0010f000 /* Xen memory trace */
39 #define TRC_PV 0x0020f000 /* Xen PV traces */
40 #define TRC_SHADOW 0x0040f000 /* Xen shadow tracing */
41 #define TRC_HW 0x0080f000 /* Xen hardware-related traces */
42 #define TRC_GUEST 0x0800f000 /* Guest-generated traces */
43 #define TRC_ALL 0x0ffff000
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dipq6018.dtsi23 #clock-cells = <0>;
29 #clock-cells = <0>;
35 #size-cells = <0>;
37 CPU0: cpu@0 {
40 reg = <0x0>;
54 reg = <0x1>;
67 reg = <0x2>;
80 reg = <0x3>;
99 qcom,dload-mode = <&tcsr 0x6100>;
111 opp-supported-hw = <0xf>;
[all …]
H A Dipq8074.dtsi21 #clock-cells = <0>;
27 #clock-cells = <0>;
33 #size-cells = <0>;
35 CPU0: cpu@0 {
38 reg = <0x0>;
47 reg = <0x1>;
55 reg = <0x2>;
63 reg = <0x3>;
90 reg = <0x0 0x4a600000 0x0 0x400000>;
95 reg = <0x0 0x4aa00000 0x0 0x100000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
16 segment@0 { /* 0x4a000000 */
20 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
H A Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
/freebsd/sys/dev/ispfw/
H A Dasm_2500.h38 0x0501f06b, 0x00115000, 0x00100000, 0x0000c8ea,
39 0x00000008, 0x00000008, 0x000000cf, 0x00109095,
40 0x00000004, 0x00000000, 0x20434f50, 0x59524947,
41 0x48542032, 0x30313920, 0x514c4f47, 0x49432043,
42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350,
43 0x32357878, 0x20466972, 0x6d776172, 0x65202020,
44 0x56657273, 0x696f6e20, 0x2020382e, 0x30382e32,
45 0x30372020, 0x24000000, 0x00000000, 0x00000000,
46 0x00000000, 0x00000000, 0x00100000, 0x00100000,
47 0x0000c8ea, 0xffffffff, 0x00115004, 0x00020000,
[all …]
H A Dasm_2800.h38 0x0501f078, 0x00124000, 0x00100000, 0x00017380,
39 0x00000009, 0x0000000c, 0x00000001, 0x785ad0d5,
40 0x00000080, 0x0001f626, 0x20434f50, 0x59524947,
41 0x48542032, 0x30323320, 0x514c4f47, 0x49432043,
42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350,
43 0x32387878, 0x20466972, 0x6d776172, 0x65202020,
44 0x56657273, 0x696f6e20, 0x2020392e, 0x31322e30,
45 0x31202024, 0x00000000, 0x00000092, 0x00000000,
46 0x00000000, 0x00000000, 0x00000000, 0x00100000,
47 0x00100000, 0x00017380, 0xffffffff, 0x00124004,
[all …]
H A Dasm_2600.h38 0x0501f06c, 0x0011b000, 0x00100000, 0x00011c0f,
39 0x00000008, 0x00000008, 0x000000e7, 0x0078d0d5,
40 0x00000020, 0x00000006, 0x20434f50, 0x59524947,
41 0x48542032, 0x30313920, 0x514c4f47, 0x49432043,
42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350,
43 0x38337878, 0x20466972, 0x6d776172, 0x65202020,
44 0x56657273, 0x696f6e20, 0x2020382e, 0x30382e32,
45 0x33312020, 0x24000000, 0x00000026, 0x00000000,
46 0x00000000, 0x00000000, 0x00000000, 0x00100000,
47 0x00100000, 0x00011c0f, 0xffffffff, 0x0011b004,
[all …]
H A Dasm_2700.h38 0x0501f06c, 0x00122000, 0x00100000, 0x00014f80,
39 0x00000009, 0x0000000c, 0x00000000, 0x785ad0d5,
40 0x00000040, 0x0000f206, 0x20434f50, 0x59524947,
41 0x48542032, 0x30323220, 0x514c4f47, 0x49432043,
42 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350,
43 0x32377878, 0x20466972, 0x6d776172, 0x65202020,
44 0x56657273, 0x696f6e20, 0x2020392e, 0x31322e30,
45 0x30202024, 0x00000000, 0x0000002f, 0x00000000,
46 0x00000000, 0x00000000, 0x00000000, 0x00100000,
47 0x00100000, 0x00014f80, 0xffffffff, 0x00122004,
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]
/freebsd/sys/dev/bxe/
H A D57711_init_values.c55 {OP_WR, 0x600dc, 0x1},
56 {OP_SW, 0x61000, 0x2000000},
57 {OP_RD, 0x600d8, 0x0},
58 {OP_SW, 0x60200, 0x30200},
59 {OP_WR, 0x600dc, 0x0},
62 {OP_RD, 0x600b8, 0x0},
63 {OP_RD, 0x600c8, 0x0},
64 {OP_WR, 0x6016c, 0x0},
67 {OP_RD, 0x600bc, 0x0},
68 {OP_RD, 0x600cc, 0x0},
[all …]
H A D57710_init_values.c55 {OP_WR, 0x600dc, 0x1},
56 {OP_SW, 0x61000, 0x2000000},
57 {OP_RD, 0x600d8, 0x0},
58 {OP_SW, 0x60200, 0x30200},
59 {OP_WR, 0x600dc, 0x0},
62 {OP_WR, 0x60068, 0xb8},
63 {OP_WR, 0x60078, 0x114},
64 {OP_RD, 0x600b8, 0x0},
65 {OP_RD, 0x600c8, 0x0},
68 {OP_WR, 0x6006c, 0xb8},
[all …]
H A D57712_init_values.c54 /* #define ATC_COMMON_START 0 */
55 {OP_WR, 0x1100b8, 0x1},
58 {OP_WR, 0x600dc, 0x1},
59 {OP_WR, 0x60050, 0x180},
60 {OP_SW, 0x61000, 0x1ff0000},
61 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
62 {OP_WR, 0x617fc, 0x3fe001},
63 {OP_IF_MODE_AND, 1, 0x10}, /* e3 */
64 {OP_SW, 0x617fc, 0x20101ff},
65 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
[all …]