Searched +full:0 +full:x00020007 (Results 1 – 7 of 7) sorted by relevance
6 Register (IPBRR0) at offset 0x0BF8.10 0x01900102 T104032 reg = <0xf0000 0x1000>;33 interrupts = <18 2 0 0>;34 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;35 fsl,tmu-calibration = <0x00000000 0x0000002536 0x00000001 0x0000002837 0x00000002 0x0000002d38 0x00000003 0x0000003139 0x00000004 0x00000036[all …]
20 Register (IPBRR0) at offset 0x0BF8.24 0x01900102 T104082 reg = <0xf0000 0x1000>;83 interrupts = <18 2 0 0>;84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;85 fsl,tmu-calibration = <0x00000000 0x00000025>,86 <0x00000001 0x00000028>,87 <0x00000002 0x0000002d>,88 <0x00000003 0x00000031>,89 <0x00000004 0x00000036>,[all …]
39 alloc-ranges = <0 0 0x10000 0>;44 alloc-ranges = <0 0 0x10000 0>;49 alloc-ranges = <0 0 0x10000 0>;56 interrupts = <25 2 0 0>;64 bus-range = <0x0 0xff>;65 interrupts = <20 2 0 0>;67 pcie@0 {68 reg = <0 0 0 0 0>;73 interrupts = <20 2 0 0>;74 interrupt-map-mask = <0xf800 0 0 7>;[all …]
23 #size-cells = <0>;25 cpu0: cpu@0 {28 reg = <0x0>;30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;31 i-cache-size = <0xc000>;34 d-cache-size = <0x8000>;45 reg = <0x1>;47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;48 i-cache-size = <0xc000>;51 d-cache-size = <0x8000>;[all …]
47 #clock-cells = <0>;54 #clock-cells = <0>;61 #clock-cells = <0>;68 #clock-cells = <0>;75 #clock-cells = <0>;82 #clock-cells = <0>;89 #clock-cells = <0>;96 #clock-cells = <0>;103 #size-cells = <0>;105 A53_0: cpu@0 {[all …]
74 #define AL_ETH_TX_L4_PROTO_IDX_MASK 0x1F86 #define AL_ETH_TX_META_L3_LEN_MASK 0xff87 #define AL_ETH_TX_META_L3_OFF_MASK 0xff91 #define AL_ETH_TX_META_OUTER_L3_LEN_MASK 0x1f93 #define AL_ETH_TX_META_OUTER_L3_OFF_HIGH_MASK 0x1895 #define AL_ETH_TX_META_OUTER_L3_OFF_LOW_MASK 0x0799 #define AL_ETH_TX_MACSEC_SIGN_SHIFT 0 /* Sign TX pkt */105 #define AL_ETH_TX_MACSEC_SECURED_PYLD_LEN_LSB_SHIFT 10 /* Secure Payload Length (0x3FFF for non-S…109 #define AL_ETH_RX_L3_PROTO_IDX_MASK 0x1F112 #define AL_ETH_RX_L4_PROTO_IDX_MASK 0x1F[all …]