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/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_dbg_values.h34 0x02, 0x00, 0x04, 0x00, 0x01, 0x09, 0x01, 0x08, 0x07, 0x02, 0x00, 0x01,
35 0x04, 0x05, 0x00, 0x01, 0x07, 0x09, 0x02, 0x00, 0x01, 0x04, 0x12, 0x00,
36 0x00, 0x06, 0x02, 0x00, 0x01, 0x04, 0x05, 0x00, 0x00, 0x06, 0x02, 0x00,
37 0x01, 0x05, 0x12, 0x00, 0x00, 0x06, 0x02, 0x00, 0x04, 0x00, 0x01, 0x09,
38 0x00, 0x06, 0x02, 0x00, 0x04, 0x02, 0x00, 0x0b, 0x0e, 0x00, 0x01, 0x00,
39 0x06, 0x01, 0x04, 0x05, 0x02, 0x00, 0x12, 0x00, 0x01, 0x07, 0x09, 0x02,
40 0x00, 0x04, 0x00, 0x01, 0x08, 0x07, 0x02, 0x00, 0x04, 0x00, 0x01, 0x07,
41 0x09, 0x02, 0x00, 0x04, 0x02, 0x00, 0x0b, 0x10, 0x02, 0x00, 0x04, 0x02,
42 0x00, 0x0b, 0x0f, 0x02, 0x04, 0x00, 0x01, 0x07, 0x09, 0x02, 0x00, 0x04,
43 0x02, 0x0b, 0x0e, 0x02, 0x00, 0x04, 0x00, 0x00, 0x06, 0x02, 0x04, 0x02,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dqoriq-thermal.txt6 Register (IPBRR0) at offset 0x0BF8.
10 0x01900102 T1040
32 reg = <0xf0000 0x1000>;
33 interrupts = <18 2 0 0>;
34 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
35 fsl,tmu-calibration = <0x00000000 0x00000025
36 0x00000001 0x00000028
37 0x00000002 0x0000002d
38 0x00000003 0x00000031
39 0x00000004 0x00000036
[all …]
H A Dqoriq-thermal.yaml20 Register (IPBRR0) at offset 0x0BF8.
24 0x01900102 T1040
82 reg = <0xf0000 0x1000>;
83 interrupts = <18 2 0 0>;
84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
85 fsl,tmu-calibration = <0x00000000 0x00000025>,
86 <0x00000001 0x00000028>,
87 <0x00000002 0x0000002d>,
88 <0x00000003 0x00000031>,
89 <0x00000004 0x00000036>,
[all …]
/freebsd/stand/efi/include/
H A Defi_nii.h28 { 0xE18541CD, 0xF755, 0x4f73, {0x92, 0x8D, 0x64, 0x3C, 0x8A, 0x79, 0xB2, 0x29} }
30 { 0x1ACED566, 0x76ED, 0x4218, {0xBC, 0x81, 0x76, 0x7F, 0x1F, 0x97, 0x7A, 0x89} }
32 #define EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE_REVISION 0x00010000
33 #define EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE_REVISION_31 0x00010001
/freebsd/crypto/krb5/src/lib/crypto/builtin/des/
H A Df_tables.c65 * ((left & 0x55555555) << 1) | (right & 0x55555555) for left half
66 * (left & 0xaaaaaaaa) | ((right & 0xaaaaaaaa) >> 1) for right half
76 0x00000000, 0x00000010, 0x00000001, 0x00000011,
77 0x00001000, 0x00001010, 0x00001001, 0x00001011,
78 0x00000100, 0x00000110, 0x00000101, 0x00000111,
79 0x00001100, 0x00001110, 0x00001101, 0x00001111,
80 0x00100000, 0x00100010, 0x00100001, 0x00100011,
81 0x00101000, 0x00101010, 0x00101001, 0x00101011,
82 0x00100100, 0x00100110, 0x00100101, 0x00100111,
83 0x00101100, 0x00101110, 0x00101101, 0x00101111,
[all …]
H A Df_sched.c44 0x00000000, 0x00000010, 0x00001000, 0x00001010,
45 0x00100000, 0x00100010, 0x00101000, 0x00101010
49 0x00000000, 0x00100000, 0x00001000, 0x00101000,
50 0x00000010, 0x00100010, 0x00001010, 0x00101010,
51 0x00000001, 0x00100001, 0x00001001, 0x00101001,
52 0x00000011, 0x00100011, 0x00001011, 0x00101011
56 0x00000000, 0x00000001, 0x00000100, 0x00000101,
57 0x00010000, 0x00010001, 0x00010100, 0x00010101,
58 0x01000000, 0x01000001, 0x01000100, 0x01000101,
59 0x01010000, 0x01010001, 0x01010100, 0x01010101
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
H A Dtegra30-asus-tf300tg.dts22 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
171 reg = <0x10>;
190 mount-matrix = "1", "0", "0",
191 "0", "-1", "0",
192 "0", "0", "-1";
196 mount-matrix = "-1", "0", "0",
197 "0", "1", "0",
198 "0", "0", "-1";
203 mount-matrix = "0", "-1", "0",
204 "-1", "0", "0",
[all …]
H A Dtegra30-asus-tf700t.dts92 reg = <0x10>;
111 mount-matrix = "1", "0", "0",
112 "0", "-1", "0",
113 "0", "0", "-1";
117 mount-matrix = "0", "1", "0",
118 "1", "0", "
[all...]
H A Dtegra30-asus-tf300tl.dts191 reg = <0x10>;
210 mount-matrix = "-1", "0", "0",
211 "0", "-1", "0",
212 "0", "0", "1";
216 mount-matrix = "-1", "0", "0",
217 "0", "1", "0",
218 "0", "0", "-1";
223 mount-matrix = "0", "-1", "0",
224 "-1", "0", "0",
225 "0", "0", "1";
[all …]
H A Dtegra30-pegatron-chagall.dts49 reg = <0x80000000 0x40000000>;
59 alloc-ranges = <0x80000000 0x30000000>;
60 size = <0x10000000>; /* 256MiB */
67 reg = <0xbeb00000 0x10000>; /* 64kB */
68 console-size = <0x8000>; /* 32kB */
69 record-size = <0x400>; /* 1kB */
74 reg = <0xbfe00000 0x200000>; /* 2MB */
100 pinctrl-0 = <&state_default>;
144 nvidia,lock = <0>;
145 nvidia,io-reset = <0>;
[all …]
H A Dtegra30-lg-p880.dts17 pinctrl-0 = <&state_default>;
120 emc-timings-0 {
122 nvidia,ram-code = <0>;
127 nvidia,emem-configuration = < 0x00050001 0xc0000010
128 0x00000001 0x00000001 0x00000002 0x00000000
129 0x00000003 0x00000001 0x00000002 0x00000004
130 0x00000001 0x00000000 0x00000002 0x00000002
131 0x02020001 0x00060402 0x77230303 0x001f0000 >;
137 nvidia,emem-configuration = < 0x00020001 0xc0000010
138 0x00000001 0x00000001 0x00000002 0x00000000
[all …]
H A Dtegra30-asus-nexus7-grouper-memory-timings.dtsi5 emc-timings-0 {
6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
12 0x00020001 /* MC_EMEM_ARB_CFG */
13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
[all …]
/freebsd/sys/dev/sound/macio/
H A Ddavbusreg.h36 #define DAVBUS_SOUND_CTRL 0x00
37 #define DAVBUS_CODEC_CTRL 0x10
38 #define DAVBUS_CODEC_STATUS 0x20
39 #define DAVBUS_CLIP_COUNT 0x30
40 #define DAVBUS_BYTE_SWAP 0x40
44 * but the controller itself uses subframe 0 to communicate with the codec.
49 #define DAVBUS_INPUT_SUBFRAME0 0x00000001
50 #define DAVBUS_INPUT_SUBFRAME1 0x00000002
51 #define DAVBUS_INPUT_SUBFRAME2 0x00000004
52 #define DAVBUS_INPUT_SUBFRAME3 0x00000008
[all …]
/freebsd/sys/contrib/edk2/Include/Protocol/
H A DSerialIo.h17 0xBB25CF6F, 0xF1D4, 0x11D2, {0x9A, 0x0C, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0xFD } \
22 0X6AD9A60F, 0X5815, 0X4C7C, { 0X8A, 0X10, 0X50, 0X53, 0XD2, 0XBF, 0X7A, 0X1B } \
66 #define EFI_SERIAL_CLEAR_TO_SEND 0x00000010
67 #define EFI_SERIAL_DATA_SET_READY 0x00000020
68 #define EFI_SERIAL_RING_INDICATE 0x00000040
69 #define EFI_SERIAL_CARRIER_DETECT 0x00000080
70 #define EFI_SERIAL_INPUT_BUFFER_EMPTY 0x00000100
71 #define EFI_SERIAL_OUTPUT_BUFFER_EMPTY 0x00000200
76 #define EFI_SERIAL_REQUEST_TO_SEND 0x00000002
77 #define EFI_SERIAL_DATA_TERMINAL_READY 0x00000001
[all …]
/freebsd/crypto/libecc/src/examples/hash/
H A Dtdes.c24 } while( 0 )
34 } while( 0 )
40 0x01010400, 0x00000000, 0x00010000, 0x01010404,
41 0x01010004, 0x00010404, 0x00000004, 0x00010000,
42 0x00000400, 0x01010400, 0x01010404, 0x00000400,
43 0x01000404, 0x01010004, 0x01000000, 0x00000004,
44 0x00000404, 0x01000400, 0x01000400, 0x00010400,
45 0x00010400, 0x01010000, 0x01010000, 0x01000404,
46 0x00010004, 0x01000004, 0x01000004, 0x00010004,
47 0x00000000, 0x00000404, 0x00010404, 0x01000000,
[all …]
/freebsd/sys/dev/eqos/
H A Dif_eqos_fdt.c65 #define RK356XGMAC0 0xfe2a0000
66 #define RK356XGMAC1 0xfe010000
67 #define RK3588GMAC0 0xfe1b0000
68 #define RK3588GMAC1 0xfe1c0000
70 #define EQOS_GRF_GMAC0 0x0380
71 #define EQOS_GRF_GMAC1 0x0388
72 #define EQOS_CON0_OFFSET 0
75 #define EQOS_GMAC_PHY_INTF_SEL_RGMII 0x00fc0010
76 #define EQOS_GMAC_PHY_INTF_SEL_RMII 0x00fc0040
77 #define EQOS_GMAC_RXCLK_DLY_ENABLE 0x00020002
[all …]
/freebsd/lib/libvgl/
H A Dbitmap.c38 static byte mask[8] = {0xff, 0x7f, 0x3f, 0x1f, 0x0f, 0x07, 0x03, 0x01};
39 static int color2bit[16] = {0x00000000, 0x00000001, 0x00000100, 0x00000101,
40 0x00010000, 0x00010001, 0x00010100, 0x00010101,
41 0x01000000, 0x01000001, 0x01000100, 0x01000101,
42 0x01010000, 0x01010001, 0x01010100, 0x01010101};
49 unsigned int word = 0; in WriteVerticalLine()
56 start_offset = (x & 0x07); in WriteVerticalLine()
57 end_offset = (x + width) & 0x07; in WriteVerticalLine()
61 VGLPlane[0] = VGLBuf; in WriteVerticalLine()
62 VGLPlane[1] = VGLPlane[0] + bwidth; in WriteVerticalLine()
[all …]
/freebsd/sys/dev/usb/net/
H A Dif_urereg.h30 #define URE_CONFIG_IDX 0 /* config number 1 */
31 #define URE_IFACE_IDX 0
33 #define URE_CTL_READ 0x01
34 #define URE_CTL_WRITE 0x02
39 #define URE_BYTE_EN_DWORD 0xff
40 #define URE_BYTE_EN_WORD 0x33
41 #define URE_BYTE_EN_BYTE 0x11
42 #define URE_BYTE_EN_SIX_BYTES 0x3f
49 #define URE_PLA_IDR 0xc000
50 #define URE_PLA_RCR 0xc010
[all …]
/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Ddebug.h20 LMAC_RD_WR = 0x0,
26 UMAC_RD_WR = 0x1,
32 HOST_EVENT_CFG = 0x3,
37 INVALID_WR_PTR_CMD = 0x6,
41 * 0 - resume DBGC recording
44 DBGC_SUSPEND_RESUME = 0x7,
50 BUFFER_ALLOCATION = 0x8,
56 GET_TAS_STATUS = 0xA,
62 FW_DUMP_COMPLETE_CMD = 0xB,
68 FW_CLEAR_BUFFER = 0xD,
[all …]
/freebsd/sys/dev/ntb/ntb_hw/
H A Dntb_hw_plx.c108 #define PLX_NT0_BASE 0x3E000
109 #define PLX_NT1_BASE 0x3C000
111 #define PLX_NTX_LINK_OFFSET 0x01000
115 (PLX_NTX_BASE(sc) + ((sc)->link ? PLX_NTX_LINK_OFFSET : 0))
117 (PLX_NTX_BASE(sc) + ((sc)->link ? 0 : PLX_NTX_LINK_OFFSET))
142 #define PLX_PORT_CONTROL(sc) (PLX_STATION_PORT_BASE(sc) + 0x208)
153 case 0x87a010b5: in ntb_plx_probe()
156 case 0x87a110b5: in ntb_plx_probe()
159 case 0x87b010b5: in ntb_plx_probe()
162 case 0x87b110b5: in ntb_plx_probe()
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dt1023si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1012a.dtsi32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0>;
38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
54 arm,psci-suspend-param = <0x0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
93 <0x0 0x1402000 0 0x2000>, /* GICC */
94 <0x0 0x1404000 0 0x2000>, /* GICH */
[all …]
/freebsd/sys/dev/mpt/mpilib/
H A Dmpi_log_sas.h46 #define SAS_LOGINFO_NEXUS_LOSS 0x31170000
47 #define SAS_LOGINFO_MASK 0xFFFF0000
50 /* IOC LOGINFO defines, 0x00000000 - 0x0FFFFFFF */
53 /* Bits 27-24: IOC_LOGINFO_ORIGINATOR: 0=IOP, 1=PL, 2=IR */
55 /* Bits 15-0: LOGINFO_CODE Specific */
61 #define IOC_LOGINFO_ORIGINATOR_IOP (0x00000000)
62 #define IOC_LOGINFO_ORIGINATOR_PL (0x01000000)
63 #define IOC_LOGINFO_ORIGINATOR_IR (0x02000000)
65 #define IOC_LOGINFO_ORIGINATOR_MASK (0x0F000000)
70 #define IOC_LOGINFO_CODE_MASK (0x00FF0000)
[all …]
/freebsd/usr.sbin/bhyve/
H A Dhda_codec.c41 #define INTEL_VENDORID 0x8086
43 #define HDA_CODEC_SUBSYSTEM_ID ((INTEL_VENDORID << 16) | 0x01)
44 #define HDA_CODEC_ROOT_NID 0x00
45 #define HDA_CODEC_FG_NID 0x01
46 #define HDA_CODEC_AUDIO_OUTPUT_NID 0x02
47 #define HDA_CODEC_PIN_OUTPUT_NID 0x03
48 #define HDA_CODEC_AUDIO_INPUT_NID 0x04
49 #define HDA_CODEC_PIN_INPUT_NID 0x05
51 #define HDA_CODEC_STREAMS_COUNT 0x02
52 #define HDA_CODEC_STREAM_OUTPUT 0x00
[all …]

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