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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_pbs_regs.h60 /* [0x0] Conf_bus, Configuration of the SB */
62 /* [0x4] PASW high */
64 /* [0x8] PASW low */
66 /* [0xc] PASW high */
68 /* [0x10] PASW low */
70 /* [0x14] PASW high */
72 /* [0x18] PASW low */
74 /* [0x1c] PASW high */
76 /* [0x20] PASW low */
78 /* [0x24] PASW high */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/perf/
H A Driscv,pmu.yaml78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x0000000
[all...]
/freebsd/sys/dev/bhnd/cores/pmu/
H A Dbhnd_pmureg.h29 (((_value) & _flag) != 0)
43 #define BHND_CLK_CTL_ST 0x1e0 /**< clock control and status */
55 #define BHND_CCS_FORCEALP 0x00000001 /**< force ALP request */
56 #define BHND_CCS_FORCEHT 0x00000002 /**< force HT request */
57 #define BHND_CCS_FORCEILP 0x00000004 /**< force ILP request */
58 #define BHND_CCS_FORCE_MASK 0x0000000F
60 #define BHND_CCS_ALPAREQ 0x00000008 /**< ALP Avail Request */
61 #define BHND_CCS_HTAREQ 0x00000010 /**< HT Avail Request */
62 #define BHND_CCS_AREQ_MASK 0x00000018
64 #define BHND_CCS_FORCEHWREQOFF 0x00000020 /**< Force HW Clock Request Off */
[all …]
/freebsd/sys/dev/bfe/
H A Dif_bfereg.h32 #define BFE_PCI_MEMLO 0x10
33 #define BFE_PCI_MEMHIGH 0x14
34 #define BFE_PCI_INTLINE 0x3C
37 #define BFE_DEVCTRL 0x00000000 /* Device Control */
38 #define BFE_PFE 0x00000080 /* Pattern Filtering Enable */
39 #define BFE_IPP 0x00000400 /* Internal EPHY Present */
40 #define BFE_EPR 0x00008000 /* EPHY Reset */
41 #define BFE_PME 0x00001000 /* PHY Mode Enable */
42 #define BFE_PMCE 0x00002000 /* PHY Mode Clocks Enable */
43 #define BFE_PADDR 0x0007c000 /* PHY Address */
[all …]
/freebsd/sys/dev/ixgbe/
H A Dixgbe_type.h82 #define IXGBE_INTEL_VENDOR_ID 0x8086
85 #define IXGBE_DEV_ID_82598 0x10B6
86 #define IXGBE_DEV_ID_82598_BX 0x1508
87 #define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6
88 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
89 #define IXGBE_DEV_ID_82598AT 0x10C8
90 #define IXGBE_DEV_ID_82598AT2 0x150B
91 #define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB
92 #define IXGBE_DEV_ID_82598EB_CX4 0x10DD
93 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-32LE-rev1 0x00 = 0x00000000
2 0x01 = 0x00000001
3 0x02 = 0x00000002
4 0x03 = 0x00000003
5 0x04 = 0x00000004
6 0x05 = 0x00000005
7 0x06 = 0x00000006
8 0x07 = 0x00000007
9 0x08 = 0x00000008
10 0x09 = 0x00000009
[all …]
H A DUTF-16BE1 0x0100 = 0x00000001
2 0x0101 = 0x00000101
3 0x0102 = 0x00000201
4 0x0103 = 0x00000301
5 0x0104 = 0x00000401
6 0x0105 = 0x00000501
7 0x0106 = 0x00000601
8 0x0107 = 0x00000701
9 0x0108 = 0x00000801
10 0x0109 = 0x00000901
[all …]
H A DUTF-16LE1 0x0100 = 0x00000100
2 0x0101 = 0x00000101
3 0x0102 = 0x00000102
4 0x0103 = 0x00000103
5 0x0104 = 0x00000104
6 0x0105 = 0x00000105
7 0x0106 = 0x00000106
8 0x0107 = 0x00000107
9 0x0108 = 0x00000108
10 0x0109 = 0x00000109
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]