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/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2800.h49 #define RF2820 0x0001
50 #define RF2850 0x0002
51 #define RF2720 0x0003
52 #define RF2750 0x0004
53 #define RF3020 0x0005
54 #define RF2020 0x0006
55 #define RF3021 0x0007
56 #define RF3022 0x0008
57 #define RF3052 0x0009
58 #define RF2853 0x000a
[all …]
H A Drt73usb.h20 #define RF5226 0x0001
21 #define RF2528 0x0002
22 #define RF5225 0x0003
23 #define RF2527 0x0004
34 #define CSR_REG_BASE 0x3000
35 #define CSR_REG_SIZE 0x04b0
36 #define EEPROM_BASE 0x0000
37 #define EEPROM_SIZE 0x0100
38 #define BBP_BASE 0x0000
39 #define BBP_SIZE 0x0080
[all …]
H A Drt61pci.h20 #define RT2561s_PCI_ID 0x0301
21 #define RT2561_PCI_ID 0x0302
22 #define RT2661_PCI_ID 0x0401
27 #define RF5225 0x0001
28 #define RF5325 0x0002
29 #define RF2527 0x0003
30 #define RF2529 0x0004
41 #define CSR_REG_BASE 0x3000
42 #define CSR_REG_SIZE 0x04b0
43 #define EEPROM_BASE 0x0000
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
/linux/include/linux/
H A Dfsl_ifc.h26 #define FSL_IFC_VERSION_MASK 0x0F0F0000
27 #define FSL_IFC_VERSION_1_0_0 0x01000000
28 #define FSL_IFC_VERSION_1_1_0 0x01010000
29 #define FSL_IFC_VERSION_2_0_0 0x02000000
37 #define CSPR_BA 0xFFFF0000
39 #define CSPR_PORT_SIZE 0x00000180
42 #define CSPR_PORT_SIZE_8 0x00000080
44 #define CSPR_PORT_SIZE_16 0x00000100
46 #define CSPR_PORT_SIZE_32 0x00000180
48 #define CSPR_WP 0x00000040
[all …]
/linux/drivers/bus/
H A Dda8xx-mstpri.c29 #define DA8XX_MSTPRI0_OFFSET 0
34 DA8XX_MSTPRI_ARM_I = 0,
62 .shift = 0,
63 .mask = 0x0000000f,
68 .mask = 0x000000f0,
73 .mask = 0x000f0000,
78 .mask = 0x00f00000,
82 .shift = 0,
83 .mask = 0x0000000f,
88 .mask = 0x000000f0,
[all …]
/linux/arch/mips/include/asm/mips-boards/
H A Dlaunch.h23 #define LAUNCH_PC 0
35 #define CPULAUNCH 0x00000f00
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dgm200.c41 pu &= 0x0f; in gm200_sor_dp_drive()
43 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); in gm200_sor_dp_drive()
44 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); in gm200_sor_dp_drive()
45 data[2] = nvkm_rd32(device, 0x61c130 + loff); in gm200_sor_dp_drive()
46 if ((data[2] & 0x00000f00) < (pu << 8) || ln == 0) in gm200_sor_dp_drive()
47 data[2] = (data[2] & ~0x00000f00) | (pu << 8); in gm200_sor_dp_drive()
49 nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift)); in gm200_sor_dp_drive()
50 nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift)); in gm200_sor_dp_drive()
51 nvkm_wr32(device, 0x61c130 + loff, data[2]); in gm200_sor_dp_drive()
53 data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift); in gm200_sor_dp_drive()
[all …]
H A Dg94.c39 nvkm_mask(device, 0x61c128 + loff, 0x0000003f, watermark); in g94_sor_dp_watermark()
49 nvkm_mask(device, 0x61c10c + loff, 0x000001fc, TU << 2); in g94_sor_dp_activesym()
50 nvkm_mask(device, 0x61c128 + loff, 0x010f7f00, VTUa << 24 | VTUf << 16 | VTUi << 8); in g94_sor_dp_activesym()
59 nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h); in g94_sor_dp_audio_sym()
60 nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); in g94_sor_dp_audio_sym()
71 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); in g94_sor_dp_drive()
72 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); in g94_sor_dp_drive()
73 data[2] = nvkm_rd32(device, 0x61c130 + loff); in g94_sor_dp_drive()
74 if ((data[2] & 0x0000ff00) < (pu << 8) || ln == 0) in g94_sor_dp_drive()
75 data[2] = (data[2] & ~0x0000ff00) | (pu << 8); in g94_sor_dp_drive()
[all …]
/linux/arch/arc/include/uapi/asm/
H A Delf.h16 #define EF_ARC_OSABI_MSK 0x00000f00
18 #define EF_ARC_OSABI_V3 0x00000300 /* v3 (no legacy syscalls) */
19 #define EF_ARC_OSABI_V4 0x00000400 /* v4 (64bit data any reg align) */
/linux/drivers/bcma/
H A Dscan.h5 #define BCMA_ADDR_BASE 0x18000000
6 #define BCMA_WRAP_BASE 0x18100000
8 #define SCAN_ER_VALID 0x00000001
9 #define SCAN_ER_TAGX 0x00000006 /* we have to ignore 0x8 bit when checking tag for SCAN_ER_TAG_ADD…
10 #define SCAN_ER_TAG 0x0000000E
11 #define SCAN_ER_TAG_CI 0x00000000
12 #define SCAN_ER_TAG_MP 0x00000002
13 #define SCAN_ER_TAG_ADDR 0x00000004
14 #define SCAN_ER_TAG_END 0x0000000E
15 #define SCAN_ER_BAD 0xFFFFFFFF
[all …]
/linux/arch/sparc/include/uapi/asm/
H A Dpsrcompat.h8 #define PSR_CWP 0x0000001f /* current window pointer */
9 #define PSR_ET 0x00000020 /* enable traps field */
10 #define PSR_PS 0x00000040 /* previous privilege level */
11 #define PSR_S 0x00000080 /* current privilege level */
12 #define PSR_PIL 0x00000f00 /* processor interrupt level */
13 #define PSR_EF 0x00001000 /* enable floating point */
14 #define PSR_EC 0x00002000 /* enable co-processor */
15 #define PSR_SYSCALL 0x00004000 /* inside of a syscall */
16 #define PSR_LE 0x00008000 /* SuperSparcII little-endian */
17 #define PSR_ICC 0x00f00000 /* integer condition codes */
[all …]
H A Dpsr.h19 * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 |
22 #define PSR_CWP 0x0000001f /* current window pointer */
23 #define PSR_ET 0x00000020 /* enable traps field */
24 #define PSR_PS 0x00000040 /* previous privilege level */
25 #define PSR_S 0x00000080 /* current privilege level */
26 #define PSR_PIL 0x00000f00 /* processor interrupt level */
27 #define PSR_EF 0x00001000 /* enable floating point */
28 #define PSR_EC 0x00002000 /* enable co-processor */
29 #define PSR_SYSCALL 0x00004000 /* inside of a syscall */
30 #define PSR_LE 0x00008000 /* SuperSparcII little-endian */
[all …]
/linux/arch/arm/nwfpe/
H A Dfpa11.c27 for (i = 0; i <= 7; i++) { in resetFPA11()
79 memset(fpa11, 0, sizeof(FPA11)); in nwfpe_init_fpa()
92 code = opcode & 0x00000f00; in EmulateAll()
93 if (code == 0x00000100 || code == 0x00000200) { in EmulateAll()
95 code = opcode & 0x0e000000; in EmulateAll()
96 if (code == 0x0e000000) { in EmulateAll()
97 if (opcode & 0x00000010) { in EmulateAll()
107 } else if (code == 0x0c000000) { in EmulateAll()
115 return 0; in EmulateAll()
/linux/drivers/net/ethernet/intel/igbvf/
H A Ddefines.h12 #define E1000_IVAR_VALID 0x80
15 #define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
16 #define E1000_RXD_STAT_EOP 0x02 /* End of Packet */
17 #define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */
18 #define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */
19 #define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
20 #define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
21 #define E1000_RXD_STAT_IPCS 0x40 /* IP xsum calculated */
22 #define E1000_RXD_ERR_SE 0x02 /* Symbol Error */
23 #define E1000_RXD_SPC_VLAN_MASK 0x0FFF /* VLAN ID is in lower 12 bits */
[all …]
/linux/arch/xtensa/include/asm/
H A Dregs.h43 #define EXCCAUSE_EXCCAUSE_SHIFT 0
44 #define EXCCAUSE_EXCCAUSE_MASK 0x3F
46 #define EXCCAUSE_ILLEGAL_INSTRUCTION 0
84 #define PS_WOE_MASK 0x00040000
86 #define PS_CALLINC_MASK 0x00030000
89 #define PS_OWB_MASK 0x00000F00
91 #define PS_RING_MASK 0x000000C0
94 #define PS_INTLEVEL_SHIFT 0
96 #define PS_INTLEVEL_MASK 0x0000000F
100 #define DBREAKC_MASK_BIT 0
[all …]
/linux/include/sound/
H A Dcs48l32_registers.h13 #define CS48L32_DEVID 0x0
14 #define CS48L32_REVID 0x4
15 #define CS48L32_OTPID 0x10
16 #define CS48L32_SFT_RESET 0x20
17 #define CS48L32_CTRL_IF_DEBUG3 0xA8
18 #define CS48L32_MCU_CTRL1 0x804
19 #define CS48L32_GPIO1_CTRL1 0xc08
20 #define CS48L32_GPIO3_CTRL1 0xc10
21 #define CS48L32_GPIO7_CTRL1 0xc20
22 #define CS48L32_GPIO16_CTRL1 0xc44
[all …]
/linux/drivers/video/fbdev/geode/
H A Ddisplay_gx1.h21 #define CONFIG_CCR3 0xc3
22 # define CONFIG_CCR3_MAPEN 0x10
23 #define CONFIG_GCR 0xb8
27 #define MC_BANK_CFG 0x08
28 # define MC_BCFG_DIMM0_SZ_MASK 0x00000700
29 # define MC_BCFG_DIMM0_PG_SZ_MASK 0x00000070
30 # define MC_BCFG_DIMM0_PG_SZ_NO_DIMM 0x00000070
32 #define MC_GBASE_ADD 0x14
33 # define MC_GADD_GBADD_MASK 0x000003ff
37 #define DC_PAL_ADDRESS 0x70
[all …]
/linux/drivers/net/wireless/ath/ath9k/
H A Dar9003_mac.h20 #define AR_DescId 0xffff0000
22 #define AR_CtrlStat 0x00004000
24 #define AR_TxRxDesc 0x00008000
26 #define AR_TxQcuNum 0x00000f00
29 #define AR_BufLen 0x0fff0000
32 #define AR_TxDescId 0xffff0000
34 #define AR_TxPtrChkSum 0x0000ffff
36 #define AR_LowRxChain 0x00004000
38 #define AR_Not_Sounding 0x20000000
41 #define AR_PAPRDChainMask 0x00000e00
[all …]
/linux/include/uapi/drm/
H A Domap_drm.h34 #define OMAP_PARAM_CHIPSET_ID 1 /* ie. 0x3430, 0x4430, etc */
42 #define OMAP_BO_SCANOUT 0x00000001
45 #define OMAP_BO_CACHED 0x00000000
46 #define OMAP_BO_WC 0x00000002
47 #define OMAP_BO_UNCACHED 0x00000004
48 #define OMAP_BO_CACHE_MASK 0x00000006
51 #define OMAP_BO_TILED_8 0x00000100
52 #define OMAP_BO_TILED_16 0x00000200
53 #define OMAP_BO_TILED_32 0x00000300
54 #define OMAP_BO_TILED_MASK 0x00000f00
[all …]
/linux/drivers/media/usb/cx231xx/
H A Dcx231xx-reg.h17 #define SAV_ACTIVE_VIDEO_FIELD1 0x80
18 #define EAV_ACTIVE_VIDEO_FIELD1 0x90
20 #define SAV_ACTIVE_VIDEO_FIELD2 0xc0
21 #define EAV_ACTIVE_VIDEO_FIELD2 0xd0
23 #define SAV_VBLANK_FIELD1 0xa0
24 #define EAV_VBLANK_FIELD1 0xb0
26 #define SAV_VBLANK_FIELD2 0xe0
27 #define EAV_VBLANK_FIELD2 0xf0
29 #define SAV_VBI_FIELD1 0x20
30 #define EAV_VBI_FIELD1 0x30
[all …]
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_mfw_hsi.h9 #define MFW_TRACE_SIGNATURE 0x25071946
12 #define MFW_TRACE_EVENTID_MASK 0x00ffff
13 #define MFW_TRACE_PRM_SIZE_MASK 0x0f0000
22 * 0 - just errors will be written to the buffer
24 u32 modules_mask[2]; /* a bit per module, 1 means write it, 0 means
53 #define OFFSIZE_OFFSET_SHIFT 0
54 #define OFFSIZE_OFFSET_MASK 0x0000ffff
57 #define OFFSIZE_SIZE_MASK 0xffff0000
77 #define ETH_SPEED_AUTONEG 0x0
78 #define ETH_SPEED_SMARTLINQ 0x8
[all …]
/linux/include/linux/bcma/
H A Dbcma_driver_chipcommon.h10 #define BCMA_CC_ID 0x0000
11 #define BCMA_CC_ID_ID 0x0000FFFF
12 #define BCMA_CC_ID_ID_SHIFT 0
13 #define BCMA_CC_ID_REV 0x000F0000
15 #define BCMA_CC_ID_PKG 0x00F00000
17 #define BCMA_CC_ID_NRCORES 0x0F000000
19 #define BCMA_CC_ID_TYPE 0xF0000000
21 #define BCMA_CC_CAP 0x0004 /* Capabilities */
22 #define BCMA_CC_CAP_NRUART 0x00000003 /* # of UARTs */
23 #define BCMA_CC_CAP_MIPSEB 0x00000004 /* MIPS in BigEndian Mode */
[all …]
/linux/drivers/net/ethernet/pasemi/
H A Dpasemi_mac.h110 PAS_MAC_CFG_PCFG = 0x80,
111 PAS_MAC_CFG_MACCFG = 0x84,
112 PAS_MAC_CFG_ADR0 = 0x8c,
113 PAS_MAC_CFG_ADR1 = 0x90,
114 PAS_MAC_CFG_TXP = 0x98,
115 PAS_MAC_CFG_RMON = 0x100,
116 PAS_MAC_IPC_CHNL = 0x208,
120 #define PAS_MAC_CFG_PCFG_PE 0x80000000
121 #define PAS_MAC_CFG_PCFG_CE 0x40000000
122 #define PAS_MAC_CFG_PCFG_BU 0x20000000
[all …]
/linux/arch/m68k/68000/
H A Dints.c88 if (pend & 0x0000ffff) { in process_int()
89 if (pend & 0x000000ff) { in process_int()
90 if (pend & 0x0000000f) { in process_int()
91 mask = 0x00000001; in process_int()
92 irq = 0; in process_int()
94 mask = 0x00000010; in process_int()
98 if (pend & 0x00000f00) { in process_int()
99 mask = 0x00000100; in process_int()
102 mask = 0x00001000; in process_int()
107 if (pend & 0x00ff0000) { in process_int()
[all …]

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