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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra124-apalis-emc.dtsi108 0x40040001 0x8000000a
109 0x00000001 0x00000001
110 0x00000002 0x00000000
111 0x00000002 0x00000001
112 0x00000003 0x00000008
113 0x00000003 0x00000002
114 0x00000003 0x00000006
115 0x06030203 0x000a0502
116 0x77e30303 0x70000f03
117 0x001f0000
[all …]
H A Dtegra124-jetson-tk1-emc.dtsi104 0x40040001
105 0x8000000a
106 0x00000001
107 0x00000001
108 0x00000002
109 0x00000000
110 0x00000002
111 0x00000001
112 0x00000003
113 0x00000008
[all …]
H A Dtegra124-nyan-blaze-emc.dtsi92 0x40040001
93 0x8000000a
94 0x00000001
95 0x00000001
96 0x00000002
97 0x00000000
98 0x00000002
99 0x00000001
100 0x00000002
101 0x00000008
[all …]
H A Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
H A Dtegra30-lg-p880.dts17 pinctrl-0 = <&state_default>;
120 emc-timings-0 {
122 nvidia,ram-code = <0>;
127 nvidia,emem-configuration = < 0x00050001 0xc0000010
128 0x00000001 0x00000001 0x00000002 0x00000000
129 0x00000003 0x00000001 0x00000002 0x00000004
130 0x00000001 0x00000000 0x00000002 0x00000002
131 0x02020001 0x00060402 0x77230303 0x001f0000 >;
137 nvidia,emem-configuration = < 0x00020001 0xc0000010
138 0x00000001 0x00000001 0x00000002 0x00000000
[all …]
H A Dtegra30-lg-p895.dts12 pinctrl-0 = <&state_default>;
123 nvidia,emem-configuration = < 0x00020001 0xc0000010
124 0x00000001 0x00000001 0x00000002 0x00000000
125 0x00000003 0x00000001 0x00000002 0x00000004
126 0x00000001 0x00000000 0x00000002 0x00000002
127 0x02020001 0x00060402 0x77230303 0x001f0000 >;
133 nvidia,emem-configuration = < 0x00030003 0xc0000010
134 0x00000001 0x00000001 0x00000002 0x00000000
135 0x00000003 0x00000001 0x00000002 0x00000004
136 0x00000001 0x00000000 0x00000002 0x00000002
[all …]
H A Dtegra124-nyan-big-emc.dtsi263 0x40040001 /* MC_EMEM_ARB_CFG */
264 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
265 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
266 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
267 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
268 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
269 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
270 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
271 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
272 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
[all …]
H A Dtegra20-paz00.dts28 memory@0 {
29 reg = <0x00000000 0x20000000>;
55 pinctrl-0 = <&state_default>;
303 reg = <0x1e>;
335 reg = <0x34>;
471 reg = <0x4c>;
484 nvidia,cpu-pwr-off-time = <0>;
486 nvidia,core-pwr-off-time = <0>;
494 emc-tables@0 {
495 nvidia,ram-code = <0x0>;
[all …]
H A Dtegra30-pegatron-chagall.dts49 reg = <0x80000000 0x40000000>;
59 alloc-ranges = <0x80000000 0x30000000>;
60 size = <0x10000000>; /* 256MiB */
67 reg = <0xbeb00000 0x10000>; /* 64kB */
68 console-size = <0x8000>; /* 32kB */
69 record-size = <0x400>; /* 1kB */
74 reg = <0xbfe0000
[all...]
H A Dtegra30-asus-tf700t.dts92 reg = <0x10>;
111 mount-matrix = "1", "0", "0",
112 "0", "-1", "0",
113 "0", "0", "-1";
117 mount-matrix = "0", "1", "0",
118 "1", "0", "
[all...]
/freebsd/tools/test/iconv/ref/
H A DUTF-71 0x09 = 0x00000009
2 0x0A = 0x0000000A
3 0x0D = 0x0000000D
4 0x20 = 0x00000020
5 0x21 = 0x00000021
6 0x22 = 0x00000022
7 0x23 = 0x00000023
8 0x24 = 0x00000024
9 0x25 = 0x00000025
10 0x26 = 0x00000026
[all …]
H A DMACARABIC1 0x00 = 0x00000000
2 0x01 = 0x00000001
3 0x02 = 0x00000002
4 0x03 = 0x00000003
5 0x04 = 0x00000004
6 0x05 = 0x00000005
7 0x06 = 0x00000006
8 0x07 = 0x00000007
9 0x08 = 0x00000008
10 0x09 = 0x00000009
[all …]
H A DMACHEBREW1 0x00 = 0x00000000
2 0x01 = 0x00000001
3 0x02 = 0x00000002
4 0x03 = 0x00000003
5 0x04 = 0x00000004
6 0x05 = 0x00000005
7 0x06 = 0x00000006
8 0x07 = 0x00000007
9 0x08 = 0x00000008
10 0x09 = 0x00000009
[all …]
H A DMACUKRAINE1 0x00 = 0x00000000
2 0x01 = 0x00000001
3 0x02 = 0x00000002
4 0x03 = 0x00000003
5 0x04 = 0x00000004
6 0x05 = 0x00000005
7 0x06 = 0x00000006
8 0x07 = 0x00000007
9 0x08 = 0x00000008
10 0x09 = 0x00000009
[all …]
H A DMACCENTRALEUROPE1 0x00 = 0x00000000
2 0x01 = 0x00000001
3 0x02 = 0x00000002
4 0x03 = 0x00000003
5 0x04 = 0x00000004
6 0x05 = 0x00000005
7 0x06 = 0x00000006
8 0x07 = 0x00000007
9 0x08 = 0x00000008
10 0x09 = 0x00000009
[all …]
H A DMACCYRILLIC1 0x00 = 0x00000000
2 0x01 = 0x00000001
3 0x02 = 0x00000002
4 0x03 = 0x00000003
5 0x04 = 0x00000004
6 0x05 = 0x00000005
7 0x06 = 0x00000006
8 0x07 = 0x00000007
9 0x08 = 0x00000008
10 0x09 = 0x00000009
[all …]
H A DMACCROATIAN1 0x00 = 0x00000000
2 0x01 = 0x00000001
3 0x02 = 0x00000002
4 0x03 = 0x00000003
5 0x04 = 0x00000004
6 0x05 = 0x00000005
7 0x06 = 0x00000006
8 0x07 = 0x00000007
9 0x08 = 0x00000008
10 0x09 = 0x00000009
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dkatmai.dts22 dcr-parent = <&{/cpus/cpu@0}>;
33 #size-cells = <0>;
35 cpu@0 {
38 reg = <0x00000000>;
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
53 reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
59 cell-index = <0>;
60 dcr-reg = <0x0c0 0x009>;
61 #address-cells = <0>;
[all …]
H A Dredwood.dts18 dcr-parent = <&{/cpus/cpu@0}>;
27 #size-cells = <0>;
29 cpu@0 {
32 reg = <0x00000000>;
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */
46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
52 cell-index = <0>;
53 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>;
[all …]
H A Dicon.dts18 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
49 reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
55 cell-index = <0>;
56 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>;
[all …]
H A Dcanyonlands.dts18 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
49 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
55 cell-index = <0>;
56 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>;
[all …]
H A Dglacier.dts18 dcr-parent = <&{/cpus/cpu@0}>;
31 #size-cells = <0>;
33 cpu@0 {
36 reg = <0x00000000>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
51 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
57 cell-index = <0>;
58 dcr-reg = <0x0c0 0x009>;
59 #address-cells = <0>;
[all …]
/freebsd/contrib/file/src/
H A Dcdf.h53 #define CDF_SECID_NULL 0
61 #define CDF_MAGIC 0xE11AB1A1E011CFD0LL
96 #define CDF_DIR_TYPE_EMPTY 0
103 #define CDF_DIR_COLOR_READ 0
152 #define CDF_SECTION_DECLARATION_OFFSET 0x1c
197 #define CDF_EMPTY 0x00000000
198 #define CDF_NULL 0x00000001
199 #define CDF_SIGNED16 0x00000002
200 #define CDF_SIGNED32 0x00000003
201 #define CDF_FLOAT 0x00000004
[all …]
/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dqoriq-thermal.txt6 Register (IPBRR0) at offset 0x0BF8.
10 0x01900102 T1040
32 reg = <0xf0000 0x1000>;
33 interrupts = <18 2 0 0>;
34 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
35 fsl,tmu-calibration = <0x00000000 0x00000025
36 0x00000001 0x00000028
37 0x00000002 0x0000002d
38 0x00000003 0x00000031
39 0x00000004 0x00000036
[all …]
H A Dqoriq-thermal.yaml20 Register (IPBRR0) at offset 0x0BF8.
24 0x01900102 T1040
82 reg = <0xf0000 0x1000>;
83 interrupts = <18 2 0 0>;
84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
85 fsl,tmu-calibration = <0x00000000 0x00000025>,
86 <0x00000001 0x00000028>,
87 <0x00000002 0x0000002d>,
88 <0x00000003 0x00000031>,
89 <0x00000004 0x00000036>,
[all …]

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