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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-lg-p880.dts17 pinctrl-0 = <&state_default>;
120 emc-timings-0 {
122 nvidia,ram-code = <0>;
127 nvidia,emem-configuration = < 0x00050001 0xc0000010
128 0x00000001 0x00000001 0x00000002 0x00000000
129 0x00000003 0x00000001 0x00000002 0x00000004
130 0x00000001 0x00000000 0x00000002 0x00000002
131 0x02020001 0x00060402 0x77230303 0x001f0000 >;
137 nvidia,emem-configuration = < 0x00020001 0xc0000010
138 0x00000001 0x00000001 0x00000002 0x00000000
[all …]
H A Dtegra30-lg-p895.dts12 pinctrl-0 = <&state_default>;
123 nvidia,emem-configuration = < 0x00020001 0xc0000010
124 0x00000001 0x00000001 0x00000002 0x00000000
125 0x00000003 0x00000001 0x00000002 0x00000004
126 0x00000001 0x00000000 0x00000002 0x00000002
127 0x02020001 0x00060402 0x77230303 0x001f0000 >;
133 nvidia,emem-configuration = < 0x00030003 0xc0000010
134 0x00000001 0x00000001 0x00000002 0x00000000
135 0x00000003 0x00000001 0x00000002 0x00000004
136 0x00000001 0x00000000 0x00000002 0x00000002
[all …]
H A Dtegra20-acer-a500-picasso.dts37 memory@0 {
38 reg = <0x00000000 0x40000000>;
48 reg = <0x2ffe0000 0x10000>; /* 64kB */
49 console-size = <0x8000>; /* 32kB */
50 record-size = <0x400>; /* 1kB */
56 alloc-ranges = <0x30000000 0x10000000>;
57 size = <0x1000000
[all...]
H A Dtegra30-asus-tf300t.dts75 reg = <0x10>;
94 mount-matrix = "0", "-1", "0",
95 "-1", "0", "0",
96 "0", "0", "-1";
100 mount-matrix = "-1", "0", "0",
101 "0", "1", "0",
102 "0", "0", "-1";
107 mount-matrix = "0", "-1", "0",
108 "-1", "0", "0",
109 "0", "0", "1";
[all …]
H A Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
H A Dtegra30-asus-tf700t.dts92 reg = <0x10>;
111 mount-matrix = "1", "0", "0",
112 "0", "-1", "0",
113 "0", "0", "-1";
117 mount-matrix = "0", "1", "0",
118 "1", "0", "
[all...]
H A Dtegra124-nyan-blaze-emc.dtsi92 0x40040001
93 0x8000000a
94 0x00000001
95 0x00000001
96 0x00000002
97 0x00000000
98 0x00000002
99 0x00000001
100 0x00000002
101 0x00000008
[all …]
H A Dtegra30-pegatron-chagall.dts49 reg = <0x80000000 0x40000000>;
59 alloc-ranges = <0x80000000 0x30000000>;
60 size = <0x10000000>; /* 256MiB */
67 reg = <0xbeb00000 0x10000>; /* 64kB */
68 console-size = <0x8000>; /* 32kB */
69 record-size = <0x400>; /* 1kB */
74 reg = <0xbfe0000
[all...]
H A Dtegra124-apalis-emc.dtsi108 0x40040001 0x8000000a
109 0x00000001 0x00000001
110 0x00000002 0x00000000
111 0x00000002 0x00000001
112 0x00000003 0x00000008
113 0x00000003 0x00000002
114 0x00000003 0x00000006
115 0x06030203 0x000a0502
116 0x77e30303 0x70000f03
117 0x001f0000
[all …]
H A Dtegra124-jetson-tk1-emc.dtsi104 0x40040001
105 0x8000000a
106 0x00000001
107 0x00000001
108 0x00000002
109 0x00000000
110 0x00000002
111 0x00000001
112 0x00000003
113 0x00000008
[all …]
H A Dtegra30-asus-tf300tg.dts22 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
171 reg = <0x10>;
190 mount-matrix = "1", "0", "0",
191 "0", "-1", "0",
192 "0", "0", "-1";
196 mount-matrix = "-1", "0", "0",
197 "0", "1", "0",
198 "0", "0", "-1";
203 mount-matrix = "0", "-1", "0",
204 "-1", "0", "0",
[all …]
H A Dtegra124-nyan-big-emc.dtsi263 0x40040001 /* MC_EMEM_ARB_CFG */
264 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
265 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
266 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
267 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
268 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
269 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
270 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
271 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
272 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
[all …]
H A Dtegra20-colibri.dtsi11 memory@0 {
17 reg = <0x00000000 0x10000000>;
57 pinctrl-0 = <&state_default>;
449 <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
451 <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
469 nand@0 {
470 reg = <0>;
478 wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
506 reg = <0x34>;
535 regulator-name = "VDD_CPU_1.0V";
[all …]
H A Dtegra30-asus-nexus7-tilapia-memory-timings.dtsi13 emc-timings-0 {
17 nvidia,emc-auto-cal-interval = <0x001fffff>;
18 nvidia,emc-mode-1 = <0x80100002>;
19 nvidia,emc-mode-2 = <0x80200018>;
20 nvidia,emc-mode-reset = <0x80000b71>;
21 nvidia,emc-zcal-cnt-long = <0x00000040>;
25 0x0000001f /* EMC_RC */
26 0x00000069 /* EMC_RFC */
27 0x00000017 /* EMC_RAS */
28 0x00000007 /* EMC_RP */
[all …]
H A Dtegra20-asus-tf101.dts38 memory@0 {
39 reg = <0x00000000 0x40000000>;
49 reg = <0x2ffe0000 0x10000>; /* 64kB */
50 console-size = <0x8000>; /* 32kB */
51 record-size = <0x400>; /* 1kB */
57 alloc-ranges = <0x30000000 0x10000000>;
58 size = <0x1000000
[all...]
H A Dtegra20-paz00.dts28 memory@0 {
29 reg = <0x00000000 0x20000000>;
55 pinctrl-0 = <&state_default>;
303 reg = <0x1e>;
335 reg = <0x34>;
471 reg = <0x4c>;
484 nvidia,cpu-pwr-off-time = <0>;
486 nvidia,core-pwr-off-time = <0>;
494 emc-tables@0 {
495 nvidia,ram-code = <0x0>;
[all …]
H A Dtegra30-asus-nexus7-grouper-memory-timings.dtsi5 emc-timings-0 {
6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
12 0x00020001 /* MC_EMEM_ARB_CFG */
13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
[all …]
H A Dtegra30-ouya.dts32 tlm,version-major = <0x0>;
33 tlm,version-minor = <0x0>;
38 reg = <0x80000000 0x40000000>;
48 alloc-ranges = <0x80000000 0x30000000>;
49 size = <0x10000000>; /* 256MiB */
56 reg = <0xbfdf0000 0x10000>; /* 64kB */
57 console-size = <0x800
[all...]
/freebsd/tools/test/iconv/ref/
H A DUTF-71 0x09 = 0x00000009
2 0x0A = 0x0000000A
3 0x0D = 0x0000000D
4 0x20 = 0x00000020
5 0x21 = 0x00000021
6 0x22 = 0x00000022
7 0x23 = 0x00000023
8 0x24 = 0x00000024
9 0x25 = 0x00000025
10 0x26 = 0x00000026
[all …]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Ddwc3-cavium.txt14 reg = <0x00011800 0x69000000 0x00000000 0x00000100>;
16 #address-cells = <0x00000002>;
17 #size-cells = <0x00000002>;
18 refclk-frequency = <0x05f5e100>;
21 power = <0x00000002 0x00000002 0x00000001>;
24 reg = <0x00016900 0x00000000 0x00000010 0x00000000>;
25 interrupt-parent = <0x00000010>;
26 interrupts = <0x00000009 0x00000004>;
/freebsd/contrib/file/src/
H A Dcdf.h53 #define CDF_SECID_NULL 0
61 #define CDF_MAGIC 0xE11AB1A1E011CFD0LL
96 #define CDF_DIR_TYPE_EMPTY 0
103 #define CDF_DIR_COLOR_READ 0
152 #define CDF_SECTION_DECLARATION_OFFSET 0x1c
197 #define CDF_EMPTY 0x00000000
198 #define CDF_NULL 0x00000001
199 #define CDF_SIGNED16 0x00000002
200 #define CDF_SIGNED32 0x00000003
201 #define CDF_FLOAT 0x00000004
[all …]
/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dqoriq-thermal.txt6 Register (IPBRR0) at offset 0x0BF8.
10 0x01900102 T1040
32 reg = <0xf0000 0x1000>;
33 interrupts = <18 2 0 0>;
34 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
35 fsl,tmu-calibration = <0x00000000 0x00000025
36 0x00000001 0x00000028
37 0x00000002 0x0000002d
38 0x00000003 0x00000031
39 0x00000004 0x00000036
[all …]
H A Dqoriq-thermal.yaml20 Register (IPBRR0) at offset 0x0BF8.
24 0x01900102 T1040
82 reg = <0xf0000 0x1000>;
83 interrupts = <18 2 0 0>;
84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
85 fsl,tmu-calibration = <0x00000000 0x00000025>,
86 <0x00000001 0x00000028>,
87 <0x00000002 0x0000002d>,
88 <0x00000003 0x00000031>,
89 <0x00000004 0x00000036>,
[all …]
/freebsd/sys/dev/otus/
H A Dif_otusreg.h30 #define AR_FW_DOWNLOAD 0x30
31 #define AR_FW_DOWNLOAD_COMPLETE 0x31
36 #define AR_FW_INIT_ADDR 0x102800
37 #define AR_FW_MAIN_ADDR 0x200000
38 #define AR_USB_MODE_CTRL 0x1e1108
43 #define AR_MAC_REG_BASE 0x1c3000
44 #define AR_MAC_REG_DMA_TRIGGER (AR_MAC_REG_BASE + 0xd30)
45 #define AR_MAC_REG_MAC_ADDR_L (AR_MAC_REG_BASE + 0x610)
46 #define AR_MAC_REG_MAC_ADDR_H (AR_MAC_REG_BASE + 0x614)
47 #define AR_MAC_REG_BSSID_L (AR_MAC_REG_BASE + 0x618)
[all …]
/freebsd/sys/dev/igc/
H A Digc_i225.h40 #define NVM_INIT_CTRL_2_DEFAULT_I225 0X7243
41 #define NVM_INIT_CTRL_4_DEFAULT_I225 0x00C1
42 #define NVM_LED_1_CFG_DEFAULT_I225 0x0184
43 #define NVM_LED_0_2_CFG_DEFAULT_I225 0x200C
45 #define IGC_MRQC_ENABLE_RSS_4Q 0x00000002
46 #define IGC_MRQC_ENABLE_VMDQ 0x00000003
47 #define IGC_MRQC_ENABLE_VMDQ_RSS_2Q 0x00000005
48 #define IGC_MRQC_RSS_FIELD_IPV4_UDP 0x00400000
49 #define IGC_MRQC_RSS_FIELD_IPV6_UDP 0x00800000
50 #define IGC_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000
[all …]

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