| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra30-asus-tf201.dts | 67 reg = <0x4d>; 82 mount-matrix = "-1", "0", "0", 83 "0", "-1", "0", 84 "0", "0", "-1"; 88 mount-matrix = "0", "-1", "0", 89 "-1", "0", "0", 90 "0", "0", "-1"; 95 mount-matrix = "1", "0", "0", 96 "0", "-1", "0", 97 "0", "0", "1"; [all …]
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| H A D | tegra30-asus-tf300tg.dts | 22 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>, 171 reg = <0x10>; 190 mount-matrix = "1", "0", "0", 191 "0", "-1", "0", 192 "0", "0", "-1"; 196 mount-matrix = "-1", "0", "0", 197 "0", "1", "0", 198 "0", "0", "-1"; 203 mount-matrix = "0", "-1", "0", 204 "-1", "0", "0", [all …]
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| H A D | tegra30-asus-tf300t.dts | 75 reg = <0x10>; 94 mount-matrix = "0", "-1", "0", 95 "-1", "0", "0", 96 "0", "0", "-1"; 100 mount-matrix = "-1", "0", "0", 101 "0", "1", "0", 102 "0", "0", "-1"; 107 mount-matrix = "0", "-1", "0", 108 "-1", "0", "0", 109 "0", "0", "1"; [all …]
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| H A D | tegra30-asus-tf700t.dts | 92 reg = <0x10>; 111 mount-matrix = "1", "0", "0", 112 "0", "-1", "0", 113 "0", "0", "-1"; 117 mount-matrix = "0", "1", "0", 118 "1", "0", " [all...] |
| H A D | tegra30-asus-nexus7-tilapia-memory-timings.dtsi | 13 emc-timings-0 { 17 nvidia,emc-auto-cal-interval = <0x001fffff>; 18 nvidia,emc-mode-1 = <0x80100002>; 19 nvidia,emc-mode-2 = <0x80200018>; 20 nvidia,emc-mode-reset = <0x80000b71>; 21 nvidia,emc-zcal-cnt-long = <0x00000040>; 25 0x0000001f /* EMC_RC */ 26 0x00000069 /* EMC_RFC */ 27 0x00000017 /* EMC_RAS */ 28 0x00000007 /* EMC_RP */ [all …]
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| H A D | tegra30-pegatron-chagall.dts | 49 reg = <0x80000000 0x40000000>; 59 alloc-ranges = <0x80000000 0x30000000>; 60 size = <0x10000000>; /* 256MiB */ 67 reg = <0xbeb00000 0x10000>; /* 64kB */ 68 console-size = <0x8000>; /* 32kB */ 69 record-size = <0x400>; /* 1kB */ 74 reg = <0xbfe0000 [all...] |
| H A D | tegra30-lg-p880.dts | 17 pinctrl-0 = <&state_default>; 120 emc-timings-0 { 122 nvidia,ram-code = <0>; 127 nvidia,emem-configuration = < 0x00050001 0xc0000010 128 0x00000001 0x00000001 0x00000002 0x00000000 129 0x00000003 0x00000001 0x00000002 0x00000004 130 0x00000001 0x00000000 0x00000002 0x00000002 131 0x02020001 0x00060402 0x77230303 0x001f0000 >; 137 nvidia,emem-configuration = < 0x00020001 0xc0000010 138 0x00000001 0x00000001 0x00000002 0x00000000 [all …]
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| H A D | tegra30-lg-p895.dts | 12 pinctrl-0 = <&state_default>; 123 nvidia,emem-configuration = < 0x00020001 0xc0000010 124 0x00000001 0x00000001 0x00000002 0x00000000 125 0x00000003 0x00000001 0x00000002 0x00000004 126 0x00000001 0x00000000 0x00000002 0x00000002 127 0x02020001 0x00060402 0x77230303 0x001f0000 >; 133 nvidia,emem-configuration = < 0x00030003 0xc0000010 134 0x00000001 0x00000001 0x00000002 0x00000000 135 0x00000003 0x00000001 0x00000002 0x00000004 136 0x00000001 0x00000000 0x00000002 0x00000002 [all …]
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| H A D | tegra20-acer-a500-picasso.dts | 37 memory@0 { 38 reg = <0x00000000 0x40000000>; 48 reg = <0x2ffe0000 0x10000>; /* 64kB */ 49 console-size = <0x8000>; /* 32kB */ 50 record-size = <0x400>; /* 1kB */ 56 alloc-ranges = <0x30000000 0x10000000>; 57 size = <0x1000000 [all...] |
| H A D | tegra124-nyan-blaze-emc.dtsi | 92 0x40040001 93 0x8000000a 94 0x00000001 95 0x00000001 96 0x00000002 97 0x00000000 98 0x00000002 99 0x00000001 100 0x00000002 101 0x00000008 [all …]
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| H A D | tegra30-asus-nexus7-grouper-memory-timings.dtsi | 5 emc-timings-0 { 6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */ 12 0x00020001 /* MC_EMEM_ARB_CFG */ 13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ [all …]
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| H A D | tegra124-apalis-emc.dtsi | 108 0x40040001 0x8000000a 109 0x00000001 0x00000001 110 0x00000002 0x00000000 111 0x00000002 0x00000001 112 0x00000003 0x00000008 113 0x00000003 0x00000002 114 0x00000003 0x00000006 115 0x06030203 0x000a0502 116 0x77e30303 0x70000f03 117 0x001f0000 [all …]
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| H A D | tegra124-jetson-tk1-emc.dtsi | 104 0x40040001 105 0x8000000a 106 0x00000001 107 0x00000001 108 0x00000002 109 0x00000000 110 0x00000002 111 0x00000001 112 0x00000003 113 0x00000008 [all …]
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| H A D | tegra124-nyan-big-emc.dtsi | 263 0x40040001 /* MC_EMEM_ARB_CFG */ 264 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */ 265 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 266 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 267 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 268 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 269 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */ 270 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 271 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 272 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ [all …]
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| H A D | tegra30-ouya.dts | 32 tlm,version-major = <0x0>; 33 tlm,version-minor = <0x0>; 38 reg = <0x80000000 0x40000000>; 48 alloc-ranges = <0x80000000 0x30000000>; 49 size = <0x10000000>; /* 256MiB */ 56 reg = <0xbfdf0000 0x10000>; /* 64kB */ 57 console-size = <0x800 [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | nvidia,tegra30-emc.yaml | 35 const: 0 53 "^emc-timings-[0-9]+$": 62 "^timing-[0-9]+$": 75 minimum: 0 91 Mode Register 0. 98 minimum: 0 239 reg = <0x7000f400 0x400>; 240 interrupts = <0 78 4>; 247 #interconnect-cells = <0>; 255 nvidia,emc-auto-cal-interval = <0x001fffff>; [all …]
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| /freebsd/sys/dev/otus/ |
| H A D | if_otusreg.h | 30 #define AR_FW_DOWNLOAD 0x30 31 #define AR_FW_DOWNLOAD_COMPLETE 0x31 36 #define AR_FW_INIT_ADDR 0x102800 37 #define AR_FW_MAIN_ADDR 0x200000 38 #define AR_USB_MODE_CTRL 0x1e1108 43 #define AR_MAC_REG_BASE 0x1c3000 44 #define AR_MAC_REG_DMA_TRIGGER (AR_MAC_REG_BASE + 0xd30) 45 #define AR_MAC_REG_MAC_ADDR_L (AR_MAC_REG_BASE + 0x610) 46 #define AR_MAC_REG_MAC_ADDR_H (AR_MAC_REG_BASE + 0x614) 47 #define AR_MAC_REG_BSSID_L (AR_MAC_REG_BASE + 0x618) [all …]
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| /freebsd/sys/dev/sound/pci/ |
| H A D | emuxkireg.h | 50 #define EMU_PTR 0x00 51 #define EMU_PTR_CHNO_MASK 0x0000003f 52 #define EMU_PTR_ADDR_MASK 0x07ff0000 53 #define EMU_A_PTR_ADDR_MASK 0x0fff0000 55 #define EMU_DATA 0x04 57 #define EMU_IPR 0x08 58 #define EMU_IPR_RATETRCHANGE 0x01000000 59 #define EMU_IPR_FXDSP 0x00800000 60 #define EMU_IPR_FORCEINT 0x00400000 61 #define EMU_PCIERROR 0x00200000 [all …]
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| H A D | cmireg.h | 47 #define CMPCI_REG_FUNC_0 0x00 48 # define CMPCI_REG_CH0_DIR 0x00000001 49 # define CMPCI_REG_CH1_DIR 0x00000002 50 # define CMPCI_REG_CH0_PAUSE 0x00000004 51 # define CMPCI_REG_CH1_PAUSE 0x00000008 52 # define CMPCI_REG_CH0_ENABLE 0x00010000 53 # define CMPCI_REG_CH1_ENABLE 0x00020000 54 # define CMPCI_REG_CH0_RESET 0x00040000 55 # define CMPCI_REG_CH1_RESET 0x00080000 57 #define CMPCI_REG_FUNC_1 0x04 [all …]
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| /freebsd/sys/contrib/dev/athk/ |
| H A D | reg.h | 20 #define AR_MIBC 0x0040 21 #define AR_MIBC_COW 0x00000001 22 #define AR_MIBC_FMC 0x00000002 23 #define AR_MIBC_CMC 0x00000004 24 #define AR_MIBC_MCS 0x00000008 26 #define AR_STA_ID0 0x8000 27 #define AR_STA_ID1 0x8004 28 #define AR_STA_ID1_SADH_MASK 0x0000ffff 34 #define AR_BSSMSKL 0x80e0 35 #define AR_BSSMSKU 0x80e4 [all …]
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| /freebsd/lib/libc/arm/gen/ |
| H A D | alloca.S | 39 add r0, r0, #0x00000007 /* round up to next 8 byte alignment */ 40 bic r0, r0, #0x00000007
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| /freebsd/sys/dev/ispfw/ |
| H A D | asm_2400.h | 33 0x0401f1be, 0x00112000, 0x00100000, 0x0000c79b, 34 0x00000008, 0x00000007, 0x00000000, 0x00009496, 35 0x00000003, 0x00000000, 0x20434f50, 0x59524947, 36 0x48542032, 0x30313720, 0x514c4f47, 0x49432043, 37 0x4f52504f, 0x52415449, 0x4f4e2020, 0x20495350, 38 0x32347878, 0x20466972, 0x6d776172, 0x65202020, 39 0x56657273, 0x696f6e20, 0x2020382e, 0x30372e30, 40 0x30202024, 0x00000000, 0x00000000, 0x00000000, 41 0x00000000, 0x00000000, 0x00000000, 0x00000000, 42 0x00000000, 0x00000000, 0x00000000, 0x00000000, [all …]
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| /freebsd/sys/contrib/dev/rtw88/ |
| H A D | rtw8821c_table.c | 10 0x010, 0x00000043, 11 0x025, 0x0000001D, 12 0x026, 0x000000CE, 13 0x04F, 0x00000001, 14 0x029, 0x000000F [all...] |
| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_serdes_hssp_regs.h | 57 /* [0x0] SerDes Registers Version */ 60 /* [0x10] SerDes register file address */ 62 /* [0x14] SerDes register file data */ 65 /* [0x20] SerDes control */ 67 /* [0x24] SerDes control */ 69 /* [0x28] SerDes control */ 72 /* [0x30] SerDes control */ 74 /* [0x34] SerDes control */ 76 /* [0x38] SerDes control */ 78 /* [0x3c] SerDes control */ [all …]
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| H A D | al_hal_serdes_regs.h | 58 /* [0x0] SerDes Registers Version */ 61 /* [0x10] SerDes register file address */ 63 /* [0x14] SerDes register file data */ 66 /* [0x20] SerDes control */ 68 /* [0x24] SerDes control */ 70 /* [0x28] SerDes control */ 73 /* [0x30] SerDes control */ 75 /* [0x34] SerDes control */ 77 /* [0x38] SerDes control */ 79 /* [0x3c] SerDes control */ [all …]
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