| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | brcm,iproc-pcie.txt | 4 - compatible:
5 "brcm,iproc-pcie" for the first generation of PAXB based controller,
7 "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based
9 "brcm,iproc-pcie-paxc" for the first generation of PAXC based
11 "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based
13 PAXB-based root complex is used for external endpoint devices. PAXC-based
15 - reg: base address and length of the PCIe controller I/O register space
16 - #interrupt-cells: set to <1>
17 - interrupt-map-mask and interrupt-map, standard PCI properties to define the
19 - linux,pci-domain: PCI domain ID. Should be unique for each host controller
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| H A D | brcm,iproc-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <ray.jui@broadcom.com>
11 - Scott Branden <scott.branden@broadcom.com>
14 - $ref: /schemas/pci/pci-host-bridge.yaml#
19 - enum:
20 # for the first generation of PAXB based controller, used in SoCs
22 - brcm,iproc-pcie
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| /freebsd/contrib/llvm-project/llvm/lib/TargetParser/ |
| H A D | X86TargetParser.cpp | 1 //===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
39 assert(NameWithPlus[0] == '+' && "Expected string to start with '+'"); in getName()
67 // Basic 64-bit capable CPU.
248 // to '\0' by default, which means not support cpu_specific/dispatch feature.
250 // listed here before, which means it doesn't support -march, -mtune and so on.
252 // cpu_dispatch/specific() feature and -march, -mtune, and so on.
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| /freebsd/share/man/man4/ |
| H A D | cc_cdg.4 | 33 CAIA-Delay Gradient (CDG) is a hybrid congestion control algorithm which reacts
35 It attempts to operate as a delay-based algorithm where possible, but utilises
36 heuristics to detect loss-based TCP cross traffic and will compete effectively
41 During delay-based operation, CDG uses a delay-gradient based probabilistic
44 During loss-based operation, CDG essentially reverts to
45 .Xr cc_newreno 4 Ns - Ns like
48 CDG switches to loss-based operation when it detects that a configurable number
49 of consecutive delay-based backoffs have had no measurable effect.
50 It periodically attempts to return to delay-based operation, but will keep
51 switching back to loss-based operation as required.
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| H A D | ath.4 | 1 .\"-
2 .\" Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
39 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
55 driver provides support for wireless network adapters based on
61 IBSS, MBSS, WDS/DWDS TDMA, and host-based access point operation modes.
70 AR5210-based devices support 802.11a operation with transmit speeds
72 AR5211-based devices support 802.11a and 802.11b operation with transmit
75 AR5212-based devices support 802.11a, 802.11b, and 802.11g operation
83 only interoperable with other Atheros-based devices.)
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| /freebsd/sys/contrib/device-tree/Bindings/arm/stm32/ |
| H A D | stm32.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
17 - description: emtrion STM32MP1 Argon based Boards
19 - const: emtrion,stm32mp157c-emsbc-argon
20 - const: emtrion,stm32mp157c-emstamp-argon
21 - const: st,stm32mp157
22 - items:
23 - enum:
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| /freebsd/sys/netinet/cc/ |
| H A D | cc_chd.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2009-2010
6 * Copyright (c) 2010-2011 The FreeBSD Foundation
41 * An implementation of the CAIA-Hamilton delay based congestion control
42 * algorithm, based on "Improved coexistence and loss tolerance for delay based
45 * 11-14 October 2010.
84 * Private signal type for rate based congestion signal.
85 * See <netinet/cc.h> for appropriate bit-range to use for private signals.
87 #define CC_CHD_DELAY 0x02000000
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| /freebsd/share/man/man3/ |
| H A D | bitstring.3 | 82 .Nd bit-string manipulation functions and macros
169 clear or set the zero-based numbered bit
179 set or clear the zero-based numbered bits from
189 evaluates to non-zero if the zero-based numbered bit
198 evaluates to non-zero if the zero-based numbered bits from
211 the zero-based number of the first bit not set in the array of
217 is set to \-1.
224 the zero-based number of the first bit set in the array of
230 is set to \-1.
236 the zero-based number of the first bit not set in the array of
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| /freebsd/sys/contrib/edk2/Include/Library/ |
| H A D | PrintLib.h | 5 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
15 - '\\r' is translated to '\\r'
16 - '\\r\\n' is translated to '\\r\\n'
17 - '\\n' is translated to '\\r\\n'
18 - '\\n\\r' is translated to '\\r\\n'
28 - -
29 - The field is left justified. If not flag is not specified, then the
31 - space
32 - Prefix a space character to a number. Only valid for types X, x, and d.
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| H A D | PcdLib.h | 9 translated to a variable or macro that is auto-generated by build tool in
17 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
18 SPDX-License-Identifier: BSD-2-Clause-Patent
26 Retrieves a token number based on a token name.
39 Retrieves a Boolean PCD feature flag based on a token name.
53 Retrieves an 8-bit fixed PCD token value based on a token name.
55 Returns the 8-bit value for the token specified by TokenName.
61 @return 8-bit value for the token specified by TokenName.
67 Retrieves a 16-bit fixed PCD token value based on a token name.
69 Returns the 16-bit value for the token specified by TokenName.
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| /freebsd/lib/libpmc/pmu-events/arch/x86/amdzen1/ |
| H A D | floating-point.json | 4 "EventCode": "0x00",
5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
7 "UMask": "0xf0"
11 "EventCode": "0x00",
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
14 "UMask": "0x80"
18 "EventCode": "0x00",
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
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| /freebsd/lib/libpmc/pmu-events/arch/x86/amdzen2/ |
| H A D | floating-point.json | 4 "EventCode": "0x00",
6 … Each increment represents a one- cycle dispatch event. This event is a speculative event. Since t…
7 "UMask": "0x0f"
11 "EventCode": "0x00",
13 … Each increment represents a one-cycle dispatch event. This event is a speculative event. Since th…
14 "UMask": "0x08"
18 "EventCode": "0x00",
20 … Each increment represents a one- cycle dispatch event. This event is a speculative event. Since t…
21 "UMask": "0x04"
25 "EventCode": "0x00",
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| /freebsd/sys/dev/smartpqi/ |
| H A D | smartpqi_main.c | 1 /*-
2 * Copyright 2016-2023 Microchip Technology, Inc. and/or its subsidiaries.
47 /* (MSCC PM8205 8x12G based) */
48 {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"},
49 {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"},
50 {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"},
51 {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"},
52 {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"},
53 {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"},
54 {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"},
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| /freebsd/lib/libpmc/pmu-events/arch/x86/silvermont/ |
| H A D | pipeline.json | 4 "Counter": "0,1",
5 "EventCode": "0xC4",
8 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
13 "Counter": "0,1",
14 "EventCode": "0xC4",
17 "PEBScounters": "0,1",
18 …ction. This unit predicts the target address not only based on the EIP of the branch but also base…
20 "UMask": "0x80"
24 "Counter": "0,1",
25 "EventCode": "0xC4",
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| /freebsd/lib/libpmc/pmu-events/arch/x86/amdzen3/ |
| H A D | floating-point.json | 4 "EventCode": "0x00",
6 … Each increment represents a one- cycle dispatch event. This event is a speculative event. Since t…
7 "UMask": "0x0f"
11 "EventCode": "0x00",
13 … Each increment represents a one-cycle dispatch event. This event is a speculative event. Since th…
14 "UMask": "0x08"
18 "EventCode": "0x00",
20 … Each increment represents a one- cycle dispatch event. This event is a speculative event. Since t…
21 "UMask": "0x04"
25 "EventCode": "0x00",
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| /freebsd/usr.bin/clang/llvm-profdata/ |
| H A D | llvm-profdata.1 | 4 .nr rst2man-indent-level 0
7 \\$1 \\n[an-margin]
8 level \\n[rst2man-indent-level]
9 level margin: \\n[rst2man-indent\\n[rst2man-indent-level]]
10 -
11 \\n[rst2man-indent0]
12 \\n[rst2man-indent1]
13 \\n[rst2man-indent2]
18 . nr rst2man-indent\\n[rst2man-indent-level] \\n[an-margin]
19 . nr rst2man-indent-level +1
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| /freebsd/contrib/googletest/docs/reference/ |
| H A D | actions.md | 3 [**Actions**](../gmock_for_dummies.md#actions-what-should-it-do) specify what a
4 mock function should do when invoked. This page lists the built-in actions
10 | :-------------------------------- | :-------------------------------------------- |
13 | `ReturnArg<N>()` | Return the `N`-th (0-based) argument. |
24 | :--------------------------------- | :-------------------------------------- |
26 | `DeleteArg<N>()` | Delete the `N`-th (0-based) argument, which must be a pointer. |
27 | `SaveArg<N>(pointer)` | Save the `N`-th (0-based) argument to `*pointer`. |
28 | `SaveArgPointee<N>(pointer)` | Save the value pointed to by the `N`-th (0-based) argument to `*po…
29 | `SetArgReferee<N>(value)` | Assign `value` to the variable referenced by the `N`-th (0-based) arg…
30 | `SetArgPointee<N>(value)` | Assign `value` to the variable pointed by the `N`-th (0-based) argume…
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| /freebsd/sys/contrib/device-tree/Bindings/net/nfc/ |
| H A D | nfcmrvl.txt | 4 - compatible: Should be:
5 - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices
6 - "marvell,nfc-i2c" for I2C devices
7 - "marvell,nfc-spi" for SPI devices
10 - pinctrl-names: Contains only one value - "default".
11 - pintctrl-0: Specifies the pin control groups used for this controller.
12 - reset-n-io: Output GPIO pin used to reset the chip (active low).
13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames.
15 Optional UART-based chip specific properties:
16 - flow-control: Specifies that the chip is using RTS/CTS.
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| /freebsd/contrib/llvm-project/llvm/include/llvm/TextAPI/ |
| H A D | FileTypes.h | 1 //===- llvm/TextAPI/FileTypes.h - TAPI Interface File -----------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
17 Invalid = 0U,
20 MachO_DynamicLibrary = 1U << 0,
28 /// Text-based stub file (.tbd) version 1.0
31 /// Text-based stub file (.tbd) version 2.0
34 /// Text-based stub file (.tbd) version 3.0
37 /// Text-based stub file (.tbd) version 4.0
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| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | fsl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
17 - description: i.MX1 based Boards
19 - enum:
20 - armadeus,imx1-apf9328
21 - fsl,imx1ads
22 - const: fsl,imx1
24 - description: i.MX23 based Boards
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| /freebsd/secure/lib/libcrypto/man/man3/ |
| H A D | OSSL_CMP_CTX_new.3 | 1 .\" -*- mode: troff; coding: utf-8 -*-
33 .\" If the F register is >0, we'll generate index entries on stderr for
41 .nr rF 0
49 . nr % 0
58 .TH OSSL_CMP_CTX_NEW 3ossl 2025-09-30 3.5.4 OpenSSL
130 \&\- functions for managing the CMP client context data structure
246 It initializes the remaining fields to their default values \- for instance,
249 and the proof-of-possession method is set to OSSL_CRMF_POPO_SIGNATURE.
278 If the given value is 0 then HTTP connections are not kept open
286 Number of seconds a CMP request-response message round trip
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | qcom,spi-geni-qcom.txt | 1 GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
3 The QUP v3 core is a GENI based AHB slave that provides a common data path
5 mini-core.
11 - compatible: Must contain "qcom,geni-spi".
12 - reg: Must contain SPI register location and length.
13 - interrupts: Must contain SPI controller interrupts.
14 - clock-names: Must contain "se".
15 - clocks: Serial engine core clock needed by the device.
16 - #address-cells: Must be <1> to define a chip select address on
18 - #size-cells: Must be <0>.
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| H A D | brcm,bcm63xx-hsspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - William Zhang <william.zhang@broadcom.com>
11 - Kursad Oney <kursad.oney@broadcom.com>
12 - Jonas Gorski <jonas.gorski@gmail.com>
16 early MIPS based chips such as BCM6328 and BCM63268. This initial rev 1.0
17 controller was carried over to recent ARM based chips, such as BCM63138,
18 BCM4908 and BCM6858. The old MIPS based chip should continue to use the
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| /freebsd/lib/libpmc/pmu-events/arch/x86/goldmont/ |
| H A D | frontend.json | 5 "Counter": "0,1,2,3",
6 "EventCode": "0xE6",
10 "UMask": "0x1"
15 "Counter": "0,1,2,3",
16 "EventCode": "0xE6",
20 "UMask": "0x10"
25 "Counter": "0,1,2,3",
26 "EventCode": "0xE6",
30 "UMask": "0x8"
35 "Counter": "0,1,2,3",
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| /freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/ |
| H A D | RISCV.cpp | 1 //===--- RISCV.cpp - RISC-V Helpers for Tools -------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
45 for (const std::string &Str : (*ISAInfo)->toFeatures(/*AddAllExtension=*/true, in getArchFeatures()
68 << A->getSpelling() << Mcpu; in getRISCFeaturesFromMcpu()
86 StringRef CPU = A->getValue(); in getRISCVTargetFeatures()
98 // Handle features corresponding to "-ffixed-X" options in getRISCVTargetFeatures()
100 Features.push_back("+reserve-x1"); in getRISCVTargetFeatures()
102 Features.push_back("+reserve-x2"); in getRISCVTargetFeatures()
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