Home
last modified time | relevance | path

Searched +full:0 +full:- +full:5 (Results 1 – 25 of 1177) sorted by relevance

12345678910>>...48

/freebsd/sys/crypto/openssl/powerpc/
H A Dsha512-ppc.S1 /* Do not modify. This file is auto-generated from sha512-ppc.pl. */
9 stwu 1,-256(1)
10 mflr 0
11 slwi 5,5,7
33 stw 0,260(1)
34 lwz 16,0(3)
52 andi. 0,4,3
55 add 5,4,5
56 stw 5,160(1)
69 subfic 0,4,4096
[all …]
H A Dppc-mont.S1 /* Do not modify. This file is auto-generated from ppc-mont.pl. */
7 .align 5
10 li 3,0
14 li 12,-4096
23 stw 20,-48(12)
24 stw 21,-44(12)
25 stw 22,-40(12)
26 stw 23,-36(12)
27 stw 24,-32(12)
28 stw 25,-28(12)
[all …]
H A Dbn-ppc.S1 /* Do not modify. This file is auto-generated from ppc.pl. */
134 xor 0,0,0
138 lwz 5,0(4)
139 mullw 9,5,5
140 mulhwu 10,5,5
145 stw 9,0(3)
148 mullw 7,5,6
149 mulhwu 8,5,6
153 addze 9,0
166 addze 10,0
[all …]
H A Dppc.S1 /* Do not modify. This file is auto-generated from ppc.pl. */
134 xor 0,0,0
138 lwz 5,0(4)
139 mullw 9,5,5
140 mulhwu 10,5,5
145 stw 9,0(3)
148 mullw 7,5,6
149 mulhwu 8,5,6
153 addze 9,0
166 addze 10,0
[all …]
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.keysort.d.out2 Amsterdam 17 8 -3
3 Brisbane 14 7 -2
4 Melbourne 16 7 -2
5 Sydney 15 7 -2
6 London 13 6 -1
7 Prague 12 6 -1
8 Calgary 9 5 0
9 Edmonton 8 5 0
10 Regina 6 5 0
11 Vancouver 10 5 0
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepInstrFormats.td1 //===----------
[all...]
/freebsd/share/examples/BSD_daemon/
H A Dbeastie.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 …www.w3.org/1999/xlink" width="283.464567pt" height="283.464567pt" viewBox="0 0 283.464567 283.4645…
3 …0%,0%,0%);stroke-opacity:1;stroke-miterlimit:10;stroke-linecap:butt;stroke-linejoin:miter;fill:non…
4 …0%,0%);" d="M 2174 2967 l 5 -11 l 4 -10 l 6 -11 l 6 -12 l 7 -12 l 8 -13 l 9 -12 l 8 -13 l 9 -12 l …
5 …0%,69%,0%);" d="M 2420 6449 l 12 -1 l 12 0 l 13 -1 l 14 -1 l 13 0 l 14 -1 l 50 0 l 12 -1 l 109 0 l…
6 …0%);" d="M 2452 4170 l -1 0 l -3 -3 l -9 -7 l -15 -11 l -19 -14 l -21 -17 l -22 -16 l -21 -16 l -1…
7 …5 l 9 6 l 10 6 l 11 6 l 12 7 l 11 6 l 11 6 l 10 4 l 10 5 l 9 3 l 9 4 l 10 3 l 9 3 l 10 2 l 8 2 l 9…
8 …0 l 4 3 l 10 6 l 16 10 l 19 11 l 20 12 l 18 11 l 17 9 l 14 8 l 13 7 l 10 5 l 11 5 l 22 10 l 11 4 l…
9 …0%,0%);" d="M 2640 4897 l 3 5 l 4 5 l 5 5 l 4 5 l 5 4 l 5 4 l 12 6 l 7 3 l 7 2 l 7 2 l 7 1 l 7 1 l…
10 …5 l 10 3 l 9 3 l 8 3 l 9 3 l 10 3 l 9 3 l 9 3 l 9 2 l 8 2 l 9 2 l 10 1 l 9 1 l 9 2 l 8 1 l 8 0 l 8…
[all …]
/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_pinmux.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
49 #define TEGRA_MUX_FUNCTION_MASK 0x03
50 #define TEGRA_MUX_FUNCTION_SHIFT 0
51 #define TEGRA_MUX_PUPD_MASK 0x03
54 #define TEGRA_MUX_ENABLE_INPUT_SHIFT 5
65 #define TEGRA_GRP_DRV_TYPE_MASK 0x03
67 #define TEGRA_GRP_DRV_DRVDN_SLWR_MASK 0x03
69 #define TEGRA_GRP_DRV_DRVUP_SLWF_MASK 0x03
78 {"nvidia,tegra210-pinmux", 1},
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td1 //===-- CSKYInstrFormats.td - CSKY Instruction Formats -----*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 class AddrMode<bits<5> val> {
10 bits<5> Value = val;
13 def AddrModeNone : AddrMode<0>;
18 def AddrMode16H : AddrMode<5>; // ld16.h, +64b
27 field bits<32> SoftFail = 0;
33 let TSFlags{4 - 0} = AM.Value;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrFormats.td1 //===- MipsMSAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 let Inst{31-26} = 0b011110;
16 let Inst{31-26} = 0b010001;
20 let Inst{31-26} = 0b000000;
31 bits<5> ws;
32 bits<5> wd;
35 let Inst{25-23} = major;
[all …]
H A DMipsDSPInstrFormats.td1 //===- MipsDSPInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
23 def HasDSP : Predicate<"Subtarget->hasDSP()">,
25 def HasDSPR2 : Predicate<"Subtarget->hasDSPR2()">,
27 def HasDSPR3 : Predicate<"Subtarget->hasDSPR3()">,
43 def SPECIAL3_OPCODE : Field6<0b011111>;
44 def REGIMM_OPCODE : Field6<0b000001>;
59 class DSPInstAlias<string Asm, dag Result, bit Emit = 0b1>
[all …]
H A DMicroMipsInstrFormats.td1 //===-- MicroMipsInstrFormats.td - microMIPS Inst Formats -*- tablegen -*--===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
40 // Base class for MicroMIPS 16-bit instructions.
48 field bits<16> SoftFail = 0;
49 bits<6> Opcode = 0x0;
[all …]
H A DMicroMips32r6InstrFormats.td1 //=- MicroMips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
19 //===----------------------------------------------------------------------===//
23 //===----------------------------------------------------------------------===//
31 //===----------------------------------------------------------------------===//
35 //===----------------------------------------------------------------------===//
42 let Inst{15-10} = 0x33;
[all …]
H A DMipsInstrFormats.td1 //===-- MipsInstrFormats.td - Mips Instruction Formats -----*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
14 // opcode - operation code.
15 // rs - src reg.
16 // rt - dst reg (on a 2 regs instr) or src reg (on a 3 reg instr).
17 // rd - dst reg, only used on 3 regs instr.
18 // shamt - only used on shift instructions, contains the shift amount.
[all …]
H A DMicroMipsDSPInstrFormats.td1 //===-- MicroMipsDSPInstrFormats.td - Instruction Formats --*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
18 class MMDSPInstAlias<string Asm, dag Result, bit Emit = 0b1>
25 bits<5> rd;
26 bits<5> rs;
27 bits<5> rt;
29 let Inst{31-26} = 0b000000;
30 let Inst{25-21} = rt;
[all …]
/freebsd/contrib/llvm-project/libcxx/include/__charconv/
H A Dtables.h1 // -*- C++ -*-
2 //===----------------------------------------------------------------------===//
4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
8 //===----------------------------------------------------------------------===//
27 …'0', '0', '0', '0', '0', '0', '0', '1', '0', '0', '1', '0', '0', '0', '1', '1', '0', '1', '0', '0'…
28 …'0', '1', '0', '1', '1', '0', '0', '1', '1', '1', '1', '0', '0', '0', '1', '0', '0', '1', '1', '0'…
29 …'1', '0', '1', '1', '1', '1', '0', '0', '1', '1', '0', '1', '1', '1', '1', '0', '1', '1', '1', '1'…
32 …'0', '0', '0', '1', '0', '2', '0', '3', '0', '4', '0', '5', '0', '6', '0', '7', '1', '0', '1', '1'…
33 …'1', '3', '1', '4', '1', '5', '1', '6', '1', '7', '2', '0', '2', '1', '2', '2', '2', '3', '2', '4'…
[all …]
/freebsd/contrib/bc/tests/bc/
H A Dboolean.txt1 !0
3 !(-129)
4 4 && 5
5 4 && 0
6 0 && 5
7 4 && 5 && 7
8 4 && 0 && 7
9 0 && 5 && 7
10 4 && 5 && 0
11 0 && 0 && 7
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLSXInstrFormats.td1 // LoongArchLSXInstrFormats.td - LoongArch LSX Instr Formats -*- tablegen -*-=//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
12 // opcode - operation code.
13 // vd/rd/cd - destination register operand.
14 // {r/v}{j/k} - source register operand.
15 // immN - immediate data operand.
17 //===----------------------------------------------------------------------===//
[all …]
H A DLoongArchLASXInstrFormats.td1 // LoongArchLASXInstrFormats.td - LoongArch LASX Instr Formats - tablegen -*-=//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
12 // opcode - operation code.
13 // xd/rd/cd - destination register operand.
14 // {r/x}{j/k} - source register operand.
15 // immN - immediate data operand.
17 //===----------------------------------------------------------------------===//
[all …]
/freebsd/sys/crypto/openssl/powerpc64/
H A Dppc-mont.S1 /* Do not modify. This file is auto-generated from ppc-mont.pl. */
8 .align 5
10 .localentry bn_mul_mont_int,0
13 li 3,0
15 li 12,-4096
24 std 20,-96(12)
25 std 21,-88(12)
26 std 22,-80(12)
27 std 23,-72(12)
28 std 24,-64(12)
[all …]
H A Dbn-ppc.S1 /* Do not modify. This file is auto-generated from ppc.pl. */
120 .localentry bn_sqr_comba4,0
137 xor 0,0,0
141 ld 5,0(4)
142 mulld 9,5,5
143 mulhdu 10,5,5
148 std 9,0(3)
151 mulld 7,5,6
152 mulhdu 8,5,6
156 addze 9,0
[all …]
H A Dppc.S1 /* Do not modify. This file is auto-generated from ppc.pl. */
120 .localentry bn_sqr_comba4,0
137 xor 0,0,0
141 ld 5,0(4)
142 mulld 9,5,5
143 mulhdu 10,5,5
148 std 9,0(3)
151 mulld 7,5,6
152 mulhdu 8,5,6
156 addze 9,0
[all …]
/freebsd/sys/crypto/openssl/powerpc64le/
H A Dppc-mont.S1 /* Do not modify. This file is auto-generated from ppc-mont.pl. */
8 .align 5
10 .localentry bn_mul_mont_int,0
13 li 3,0
15 li 12,-4096
24 std 20,-96(12)
25 std 21,-88(12)
26 std 22,-80(12)
27 std 23,-72(12)
28 std 24,-64(12)
[all …]
H A Dbn-ppc.S1 /* Do not modify. This file is auto-generated from ppc.pl. */
120 .localentry bn_sqr_comba4,0
137 xor 0,0,0
141 ld 5,0(4)
142 mulld 9,5,5
143 mulhdu 10,5,5
148 std 9,0(3)
151 mulld 7,5,6
152 mulhdu 8,5,6
156 addze 9,0
[all …]
H A Dppc.S1 /* Do not modify. This file is auto-generated from ppc.pl. */
120 .localentry bn_sqr_comba4,0
137 xor 0,0,0
141 ld 5,0(4)
142 mulld 9,5,5
143 mulhdu 10,5,5
148 std 9,0(3)
151 mulld 7,5,6
152 mulhdu 8,5,6
156 addze 9,0
[all …]

12345678910>>...48