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/linux/kernel/irq/
H A Dcpuhotplug.c1 // SPDX-License-Identifier: GPL-2.0
19 /* For !GENERIC_IRQ_EFFECTIVE_AFF_MASK this looks at general affinity mask */
28 * which do not implement effective affinity, but the architecture has in irq_needs_fixup()
29 * enabled the config switch. Use the general affinity mask instead. in irq_needs_fixup()
45 pr_warn("Eff. affinity %*pbl of IRQ %u contains only offline CPUs after offlining CPU %u\n", in irq_needs_fixup()
46 cpumask_pr_args(m), d->irq, cpu); in irq_needs_fixup()
58 const struct cpumask *affinity; in migrate_one_irq() local
64 * still in the radix tree. Also if the chip has no affinity setter, in migrate_one_irq()
67 if (!chip || !chip->irq_set_affinity) { in migrate_one_irq()
68 pr_debug("IRQ %u: Unable to migrate away\n", d->irq); in migrate_one_irq()
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H A Dirqdesc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
7 * information is available in Documentation/core-api/genericirq.rst
23 * lockdep: we want to handle all irq_desc locks as a single lock-class:
57 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity, in alloc_masks()
59 return -ENOMEM; in alloc_masks()
62 if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity, in alloc_masks()
64 free_cpumask_var(desc->irq_common_data.affinity); in alloc_masks()
65 return -ENOMEM; in alloc_masks()
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H A Daffinity.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2016-2017 Christoph Hellwig.
14 affd->nr_sets = 1; in default_calc_sets()
15 affd->set_size[0] = affvecs; in default_calc_sets()
19 * irq_create_affinity_masks - Create affinity masks for multiqueue spreading
21 * @affd: Description of the affinity requirements
37 if (nvecs > affd->pre_vectors + affd->post_vectors) in irq_create_affinity_masks()
38 affvecs = nvecs - affd->pre_vectors - affd->post_vectors; in irq_create_affinity_masks()
46 if (!affd->calc_sets) in irq_create_affinity_masks()
47 affd->calc_sets = default_calc_sets; in irq_create_affinity_masks()
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H A Dmanage.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006 Thomas Gleixner
50 while (irqd_irq_inprogress(&desc->irq_data)) in __synchronize_hardirq()
53 /* Ok, that indicated we're done: double-check carefully. */ in __synchronize_hardirq()
54 guard(raw_spinlock_irqsave)(&desc->lock); in __synchronize_hardirq()
55 inprogress = irqd_irq_inprogress(&desc->irq_data); in __synchronize_hardirq()
75 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
88 * This function may be called - with care - from IRQ context.
101 return !atomic_read(&desc->threads_active); in synchronize_hardirq()
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/linux/lib/
H A Dcpu_rmap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cpu_rmap.c: CPU affinity reverse-map support
13 * objects with CPU affinities. This can be seen as a reverse-map of
14 * CPU affinity. However, we do not assume that the object affinities
21 * alloc_cpu_rmap - allocate CPU affinity reverse-map
39 rmap = kzalloc(obj_offset + size * sizeof(rmap->obj[0]), flags); in alloc_cpu_rmap()
43 kref_init(&rmap->refcount); in alloc_cpu_rmap()
44 rmap->obj = (void **)((char *)rmap + obj_offset); in alloc_cpu_rmap()
50 * any newly-hotplugged CPUs to have some object assigned. in alloc_cpu_rmap()
53 rmap->near[cpu].index = cpu % size; in alloc_cpu_rmap()
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/linux/Documentation/driver-api/cxl/platform/acpi/
H A Dsrat.rst1 .. SPDX-License-Identifier: GPL-2.0
4 SRAT - Static Resource Affinity Table
7 The System/Static Resource Affinity Table describes resource (CPU, Memory)
8 affinity to "Proximity Domains". This table is technically optional, but for
13 created. If things don't look quite the way you expect - check the SRAT Memory
14 Affinity entries and CEDT CFMWS to determine what your platform actually
23 A proximity domain is ROUGHLY equivalent to "NUMA Node" - though a 1-to-1
27 Memory Affinity
30 programming in BIOS - an SRAT entry for that memory needs to be present.
34 Subtable Type : 01 [Memory Affinity]
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/linux/tools/virtio/ringtest/
H A Drun-on-all.sh2 # SPDX-License-Identifier: GPL-2.0
4 CPUS_ONLINE=$(lscpu --online -p=cpu|grep -v -e '#')
8 HOST_AFFINITY=$(echo "${CPUS_ONLINE}"|tail -n 1)
16 (echo "$@" | grep -e "--sleep" > /dev/null) || \
19 echo "GUEST AFFINITY $cpu"
20 "$@" --host-affinity $HOST_AFFINITY --guest-affinity $cpu
23 echo "NO GUEST AFFINITY"
24 "$@" --host-affinity $HOST_AFFINITY
25 echo "NO AFFINITY"
/linux/drivers/infiniband/hw/hfi1/
H A Daffinity.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright(c) 2015 - 2020 Intel Corporation.
35 /* Initialize non-HT cpu cores mask */
37 /* Initialize driver affinity data */
40 * Set IRQ affinity to a CPU. The function will determine the
41 * CPU and set the affinity to it.
46 * Remove the IRQ's CPU affinity. This function also updates
52 * Determine a CPU affinity for a user process, if the process does not
53 * have an affinity set yet.
77 struct mutex lock; /* protects affinity nodes */
/linux/tools/perf/util/
H A Daffinity.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Manage affinity to optimize IPIs inside the kernel perf API. */
11 #include "affinity.h"
15 int sz = cpu__max_cpu().cpu + 8 - 1; in get_cpu_set_size()
25 int affinity__setup(struct affinity *a) in affinity__setup()
29 a->orig_cpus = bitmap_zalloc(cpu_set_size * 8); in affinity__setup()
30 if (!a->orig_cpus) in affinity__setup()
31 return -1; in affinity__setup()
32 sched_getaffinity(0, cpu_set_size, (cpu_set_t *)a->orig_cpus); in affinity__setup()
33 a->sched_cpus = bitmap_zalloc(cpu_set_size * 8); in affinity__setup()
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H A Devlist.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 * NOTREADY --(0)--> RUNNING --(1)--> DATA_PENDING --(2)--> EMPTY
196 int affinity, int flush, int comp_level);
234 return list_empty(&evlist->core.entries); in evlist__empty()
239 struct perf_evsel *evsel = perf_evlist__first(&evlist->core); in evlist__first()
246 struct perf_evsel *evsel = perf_evlist__last(&evlist->core); in evlist__last()
253 return perf_evlist__nr_groups(&evlist->core); in evlist__nr_groups()
263 * __evlist__for_each_entry - iterate thru all the evsels
271 * evlist__for_each_entry - iterate thru all the evsels
276 __evlist__for_each_entry(&(evlist)->core.entries, evsel)
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H A Daffinity.h1 // SPDX-License-Identifier: GPL-2.0
8 struct affinity { struct
14 void affinity__cleanup(struct affinity *a); argument
15 void affinity__set(struct affinity *a, int cpu);
16 int affinity__setup(struct affinity *a);
H A Dmmap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2017, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com>
5 * Parts came from evlist.c builtin-{top,stat,record}.c, see those files for further
34 len = bitmap_scnprintf(mask->bits, mask->nbits, buf, MASK_SIZE); in mmap_cpu_mask__scnprintf()
36 pr_debug("%p: %s mask[%zd]: %s\n", mask, tag, mask->nbits, buf); in mmap_cpu_mask__scnprintf()
41 return perf_mmap__mmap_len(&map->cor in mmap__mmap_len()
97 perf_mmap__aio_bind(struct mmap * map,int idx,struct perf_cpu cpu,int affinity) perf_mmap__aio_bind() argument
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/linux/tools/testing/selftests/rseq/
H A Dbasic_test.c1 // SPDX-License-Identifier: LGPL-2.1
18 cpu_set_t affinity, test_affinity; in test_cpu_pointer() local
21 sched_getaffinity(0, sizeof(affinity), &affinity); in test_cpu_pointer()
24 if (CPU_ISSET(i, &affinity)) { in test_cpu_pointer()
39 sched_setaffinity(0, sizeof(affinity), &affinity); in test_cpu_pointer()
59 return -1; in main()
/linux/tools/power/cpupower/bench/
H A Dsystem.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* cpufreq-bench CPUFreq microbenchmark
43 * @retval -1 when failed
54 return -1; in set_cpufreq_governor()
60 return -1; in set_cpufreq_governor()
67 * sets cpu affinity for the process
69 * @param cpu cpu# to which the affinity should be set
72 * @retval -1 when setting the affinity failed
82 dprintf("set affinity to cpu #%u\n", cpu); in set_cpu_affinity()
86 fprintf(stderr, "warning: unable to set cpu affinity\n"); in set_cpu_affinity()
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/linux/include/linux/
H A Dcpu_rmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * cpu_rmap.c: CPU affinity reverse-map support
16 * struct cpu_rmap - CPU affinity reverse-map
18 * @size: Number of objects to be reverse-mapped
21 * based on affinity masks
40 const struct cpumask *affinity);
44 return rmap->near[cpu].index; in cpu_rmap_lookup_index()
49 return rmap->obj[rmap->near[cpu].index]; in cpu_rmap_lookup_obj()
53 * alloc_irq_cpu_rmap - allocate CPU affinity reverse-map for IRQs
H A Dirq.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * Thanks. --rmk
36 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h
38 * IRQ_TYPE_NONE - default, unspecified type
39 * IRQ_TYPE_EDGE_RISING - rising edge triggered
40 * IRQ_TYPE_EDGE_FALLING - falling edge triggered
41 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered
42 * IRQ_TYPE_LEVEL_HIGH - high level triggered
43 * IRQ_TYPE_LEVEL_LOW - low level triggered
44 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits
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H A Dinterrupt.h1 /* SPDX-License-Identifier: GPL-2.0 */
44 * IRQF_SHARED - allow sharing the irq among several devices
45 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur
46 * IRQF_TIMER - Flag to mark this interrupt as timer interrupt
47 * IRQF_PERCPU - Interrupt is per cpu
48 * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing
49 * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is
52 * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished.
55 * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee
57 * state. See Documentation/power/suspend-and-interrupts.rst
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/linux/drivers/pci/msi/
H A Dapi.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCI MSI/MSI-X — Exported APIs for device drivers
5 * Copyright (C) 2003-2004 Intel
17 * pci_enable_msi() - Enable MSI interrupt mode on device
22 * Linux IRQ will be saved at @dev->irq. The driver must invoke
40 * pci_disable_msi() - Disable MSI interrupt mode on device
45 * The PCI device Linux IRQ (@dev->irq) is restored to its default
46 * pin-assertion IRQ. This is the cleanup pair of pci_enable_msi().
53 if (!pci_msi_enabled() || !dev || !dev->msi_enabled) in pci_disable_msi()
56 guard(msi_descs_lock)(&dev->dev); in pci_disable_msi()
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/linux/drivers/md/
H A Ddm-ps-io-affinity.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include "dm-path-selector.h"
9 #include <linux/device-mapper.h>
12 #define DM_MSG_PREFIX "multipath io-affinity"
29 struct path_info *pi = s->path_map[cpu]; in ioa_free_path()
34 if (refcount_dec_and_test(&pi->refcount)) { in ioa_free_path()
35 cpumask_clear_cpu(cpu, s->path_mask); in ioa_free_path()
36 free_cpumask_var(pi->cpumask); in ioa_free_path()
39 s->path_map[cpu] = NULL; in ioa_free_path()
46 struct selector *s = ps->context; in ioa_add_path()
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/linux/arch/mips/kernel/
H A Dmips-mt-fpaff.c1 // SPDX-License-Identifier: GPL-2.0
21 * CPU mask used to set process affinity for MT VPEs/TCs with FPUs
25 static int fpaff_threshold = -1;
31 * FPU affinity with the user's requested processor affinity.
38 * find_process_by_pid - find a process with a matching PID value.
57 match = (uid_eq(cred->euid, pcred->euid) || in check_same_owner()
58 uid_eq(cred->euid, pcred->uid)); in check_same_owner()
64 * mipsmt_sys_sched_setaffinity - set the cpu affinity of a process
75 return -EINVAL; in mipsmt_sys_sched_setaffinity()
78 return -EFAULT; in mipsmt_sys_sched_setaffinity()
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dapple,aic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
19 - Level-triggered hardware IRQs wired to SoC blocks
20 - Single mask bit per IRQ
21 - Per-IRQ affinity setting
22 - Automatic masking on event delivery (auto-ack)
23 - Software triggering (ORed with hw line)
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/linux/Documentation/driver-api/cxl/platform/example-configurations/
H A Dflexible.rst1 .. SPDX-License-Identifier: GPL-2.0
15 * Cross-Bridge interleave is described in one CFMWS that covers all capacity.
16 * One CFMWS is also described per-host bridge.
17 * One CFMWS is also described per-device.
142 Subtable Type : 01 [Memory Affinity]
152 Non-Volatile : 0
154 Subtable Type : 01 [Memory Affinity]
164 Non-Volatile : 0
166 Subtable Type : 01 [Memory Affinity]
176 Non-Volatile : 0
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/linux/arch/arm64/kernel/
H A Dsetup.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 1995-2001 Russell King
106 * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
113 u32 i, affinity, fs[4], bits[4], ls; in smp_build_mpidr_hash() local
116 * Pre-scan the list of MPIDRS and filter out bits that do in smp_build_mpidr_hash()
117 * not contribute to affinity levels, ie they never toggle. in smp_build_mpidr_hash()
123 * Find and stash the last and first bit set at all affinity levels to in smp_build_mpidr_hash()
127 affinity = MPIDR_AFFINITY_LEVEL(mask, i); in smp_build_mpidr_hash()
131 * to express the affinity level. in smp_build_mpidr_hash()
133 ls = fls(affinity); in smp_build_mpidr_hash()
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/linux/drivers/perf/
H A Darm_pmu_platform.c1 // SPDX-License-Identifier: GPL-2.0
30 int ret = -ENODEV; in probe_current_pmu()
34 for (; info->init != NULL; info++) { in probe_current_pmu()
35 if ((cpuid & info->mask) != info->cpuid) in probe_current_pmu()
37 ret = info->init(pmu); in probe_current_pmu()
48 struct pmu_hw_events __percpu *hw_events = pmu->hw_events; in pmu_parse_percpu_irq()
50 ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus); in pmu_parse_percpu_irq()
54 for_each_cpu(cpu, &pmu->supported_cpus) in pmu_parse_percpu_irq()
55 per_cpu(hw_events->irq, cpu) = irq; in pmu_parse_percpu_irq()
62 return of_property_present(node, "interrupt-affinity"); in pmu_has_irq_affinity()
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/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_crat.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
87 * ComputeUnit Affinity structure and definitions
122 * HSA Memory Affinity structure and definitions
143 uint8_t reserved2[CRAT_MEMORY_RESERVED_LENGTH - 1];
147 * HSA Cache Affinity structure and definitions
176 * HSA TLB Affinity structure and definitions
211 * HSA CCompute/APU Affinity structure and definitions
230 * HSA IO Link Affinity structure and definitions
279 uint8_t reserved2[CRAT_IOLINK_RESERVED_LENGTH - 1];
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