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/linux/drivers/scsi/esas2r/
H A Desas2r_init.c5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
38 * You should have received a copy of the GNU General Public License
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
46 static bool esas2r_initmem_alloc(struct esas2r_adapter *a, in esas2r_initmem_alloc() argument
50 mem_desc->esas2r_param = mem_desc->size + align; in esas2r_initmem_alloc()
51 mem_desc->virt_addr = NULL; in esas2r_initmem_alloc()
52 mem_desc->phys_addr = 0; in esas2r_initmem_alloc()
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H A Desas2r_int.c5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
8 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
39 * You should have received a copy of the GNU General Public License
41 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
43 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
48 static void esas2r_doorbell_interrupt(struct esas2r_adapter *a, u32 doorbell);
49 static void esas2r_get_outbound_responses(struct esas2r_adapter *a);
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H A Desas2r_ioctl.c5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
38 * You should have received a copy of the GNU General Public License
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
49 * Buffered ioctl handlers. A buffered ioctl is one which requires that we
50 * allocate a DMA-able memory area to communicate with the firmware. In
52 * we will allocate a global buffer the first time we need it and re-use
70 struct esas2r_adapter *a; member
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H A Desas2r_disc.c5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
8 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
39 * You should have received a copy of the GNU General Public License
41 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
43 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
48 static void esas2r_disc_abort(struct esas2r_adapter *a,
50 static bool esas2r_disc_continue(struct esas2r_adapter *a,
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/linux/sound/pci/au88x0/
H A Dau88x0_a3d.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 a3dsrc_SetTimeConsts(a3dsrc_t * a, short HrtfTrack, short ItdTrack, in a3dsrc_SetTimeConsts() argument
24 vortex_t *vortex = (vortex_t *) (a->vortex); in a3dsrc_SetTimeConsts()
25 hwwrite(vortex->mmio, in a3dsrc_SetTimeConsts()
26 a3d_addrA(a->slice, a->source, A3D_A_HrtfTrackTC), HrtfTrack); in a3dsrc_SetTimeConsts()
27 hwwrite(vortex->mmio, in a3dsrc_SetTimeConsts()
28 a3d_addrA(a->slice, a->source, A3D_A_ITDTrackTC), ItdTrack); in a3dsrc_SetTimeConsts()
29 hwwrite(vortex->mmio, in a3dsrc_SetTimeConsts()
30 a3d_addrA(a->slice, a->source, A3D_A_GainTrackTC), GTrack); in a3dsrc_SetTimeConsts()
31 hwwrite(vortex->mmio, in a3dsrc_SetTimeConsts()
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/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dmcs_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 #define MCSX_MCS_TOP_SLAVE_PORT_RESET(a) ({ \ argument
18 if (mcs->hw->mcs_blks > 1) \
20 offset += (a) * 0x8ull; \
24 #define MCSX_MCS_TOP_SLAVE_CHANNEL_CFG(a) ({ \ argument
28 if (mcs->hw->mcs_blks > 1) \
30 offset += (a) * 0x8ull; \
37 if (mcs->hw->mcs_blks > 1) \
41 #define MCSX_MIL_RX_LMACX_CFG(a) ({ \ argument
45 if (mcs->hw->mcs_blks > 1) \
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H A Drvu_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 #define RVU_AF_AFPFX_MBOXX(a, b) (0x2000 | (a) << 4 | (b) << 3) argument
44 #define RVU_AF_PFX_BAR4_ADDR(a) (0x5000 | (a) << 4) argument
45 #define RVU_AF_PFX_BAR4_CFG (0x5200 | (a) << 4)
46 #define RVU_AF_PFX_VF_BAR4_ADDR (0x5400 | (a) << 4)
47 #define RVU_AF_PFX_VF_BAR4_CFG (0x5600 | (a) << 4)
48 #define RVU_AF_PFX_LMTLINE_ADDR (0x5800 | (a) << 4)
60 #define RVU_PRIV_PFX_CFG(a) (0x8000100 | (a) << 16) argument
61 #define RVU_PRIV_PFX_MSIX_CFG(a) (0x8000110 | (a) << 16) argument
62 #define RVU_PRIV_PFX_ID_CFG(a) (0x8000120 | (a) << 16) argument
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/linux/tools/testing/selftests/net/
H A Dfcnal-test.sh2 # SPDX-License-Identifier: GPL-2.0
9 # 2. client, server, no-server
13 # 6. VRF and non-VRF permutations
16 # ns-A | ns-B
18 # [ lo ] [ eth1 ]--
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/linux/net/ceph/crush/
H A Dhash.c1 // SPDX-License-Identifier: GPL-2.0
9 * Robert Jenkins' function for mixing 32-bit values
11 * a, b = random bits, c = input and output
13 #define crush_hashmix(a, b, c) do { \ argument
14 a = a-b; a = a-c; a = a^(c>>13); \
15 b = b-c; b = b-a; b = b^(a<<8); \
16 c = c-a; c = c-b; c = c^(b>>13); \
17 a = a-b; a = a-c; a = a^(c>>12); \
18 b = b-c; b = b-a; b = b^(a<<16); \
19 c = c-a; c = c-b; c = c^(b>>5); \
[all …]
/linux/include/linux/
H A Dtnum.h3 * A tnum tracks knowledge about the bits of a value. Each bit can be either
20 /* Represent a known constant as a tnum. */
22 /* A completely unknown value */
24 /* An unknown value that is a superset of @min <= value <= @max.
33 /* Shift a tnum left (by a fixed shift) */
34 struct tnum tnum_lshift(struct tnum a, u8 shift);
35 /* Shift (rsh) a tnu
61 tnum_is_const(struct tnum a) tnum_is_const() argument
67 tnum_equals_const(struct tnum a,u64 b) tnum_equals_const() argument
73 tnum_is_unknown(struct tnum a) tnum_is_unknown() argument
118 tnum_subreg_is_const(struct tnum a) tnum_subreg_is_const() argument
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H A Djiffies.h1 /* SPDX-License-Identifier: GPL-2.0 */
53 * - (NOM / DEN) fits in (32 - LSH) bits.
54 * - (NOM % DEN) fits in (32 - LSH) bits.
75 * The 64-bit value is not atomic on 32-bit systems - you MUST NOT read it
79 * jiffies and jiffies_64 are at the same address for little-endian systems
80 * and for 64-bit big-endian systems.
81 * On 32-bit big-endian systems, jiffies is the lower 32 bits of jiffies_64
92 * get_jiffies_64 - read the 64-bit non-atomic jiffies_64 value
95 * jiffies_lock to protect the 64-bit read.
97 * Return: current 64-bit jiffies value
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/linux/lib/crypto/powerpc/
H A Dmd5-asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-offsets.h>
9 #include <asm/asm-compat.h>
40 PPC_STLU r1,-INT_FRAME_SIZE(r1); \
61 #define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \ argument
69 add a,a,rT0; /* 1: a = a + f */ \
72 add a,a,w0; /* 1: a = a + wk */ \
74 rotrwi a,a,p; /* 1: a = a rotl x */ \
75 add d,d,w1; /* 2: a = a + wk */ \
76 add a,a,b; /* 1: a = a + b */ \
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/linux/kernel/bpf/
H A Dtnum.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * A tnum tracks knowledge about the bits of a value. Each bit can be either
13 /* A completely unknown value */
14 const struct tnum tnum_unknown = { .value = 0, .mask = -1 };
29 /* e.g. if chi = 4, bits = 3, delta = (1<<3) - 1 = 7. in tnum_range()
30 * if chi = 0, bits = 0, delta = (1<<0) - in tnum_range()
37 tnum_lshift(struct tnum a,u8 shift) tnum_lshift() argument
42 tnum_rshift(struct tnum a,u8 shift) tnum_rshift() argument
47 tnum_arshift(struct tnum a,u8 min_shift,u8 insn_bitness) tnum_arshift() argument
62 tnum_add(struct tnum a,struct tnum b) tnum_add() argument
74 tnum_sub(struct tnum a,struct tnum b) tnum_sub() argument
86 tnum_neg(struct tnum a) tnum_neg() argument
91 tnum_and(struct tnum a,struct tnum b) tnum_and() argument
101 tnum_or(struct tnum a,struct tnum b) tnum_or() argument
110 tnum_xor(struct tnum a,struct tnum b) tnum_xor() argument
127 tnum_mul(struct tnum a,struct tnum b) tnum_mul() argument
149 tnum_intersect(struct tnum a,struct tnum b) tnum_intersect() argument
158 tnum_cast(struct tnum a,u8 size) tnum_cast() argument
165 tnum_is_aligned(struct tnum a,u64 size) tnum_is_aligned() argument
172 tnum_in(struct tnum a,struct tnum b) tnum_in() argument
180 tnum_sbin(char * str,size_t size,struct tnum a) tnum_sbin() argument
200 tnum_subreg(struct tnum a) tnum_subreg() argument
205 tnum_clear_subreg(struct tnum a) tnum_clear_subreg() argument
215 tnum_const_subreg(struct tnum a,u32 value) tnum_const_subreg() argument
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/linux/lib/crypto/mpi/
H A Dmpiutil.c1 /* mpiutil.ac - Utility functions for MPI
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * You should have received a copy of the GNU General Public License
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
23 #include "mpi-internal.h"
26 * Note: It was a bad idea to use the number of limbs to allocate
27 * because on a alpha the limbs are large but we normally need
28 * integers of n bits - So we should change this to bits (or bytes).
30 * But mpi_alloc is used in a lot of places :-)
34 MPI a; in mpi_alloc() local
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/linux/Documentation/maintainer/
H A Drebasing-and-merging.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Maintaining a subsystem, as a general rule, requires a familiarity with the
8 Git source-code management system. Git is a powerful tool with a lot of
19 maintainers result from a desire to avoid merges, while others come from
20 merging a little too often.
25 "Rebasing" is the process of changing the history of a series of commits
26 within a repository. There are two different types of operations that are
30 - Changing the parent (starting) commit upon which a series of patches is
31 built. For example, a rebase operation could take a patch set built on
36 - Changing the history of a set of patches by fixing (or deleting) broken
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/linux/drivers/acpi/acpica/
H A Dacmacros.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: acmacros.h - C macros for the entire subsystem.
6 * Copyright (C) 2000 - 2025, Intel Corp.
14 * Extract data using a pointer. Any more than a byte and we
15 * get into potential alignment issues -- see the STORE macros below.
32 * printf() format helper. This macro is a workaround for the difficulties
33 * with emitting 64-bit integers and 64-bit pointers with the same code
34 * for both 32-bit and 64-bit hosts.
41 * Otherwise, we have to move one byte at a time.
45 * Macros for big-endian machines
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/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-debug.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
5 * Copyright(c) 2018 - 2021, 2024-2025 Intel Corporation
13 #include "iwl-modparams.h"
40 #define CHECK_FOR_NEWLINE(f) BUILD_BUG_ON(f[sizeof(f) - 2] != '\n')
43 #define __IWL_ERR_DEV(d, mode, f, a...) \ argument
46 __iwl_err((d), mode, f, ## a); \
48 #define IWL_ERR_DEV(d, f, a...) \ argument
49 __IWL_ERR_DEV(d, IWL_ERR_MODE_REGULAR, f, ## a)
50 #define IWL_ERR(m, f, a...) \ argument
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/linux/Documentation/locking/
H A Drt-mutex-design.rst2 RT-mutex implementation design
12 Documentation/locking/rt-mutex.rst. Although this document does explain problems
22 ----------------------------
24 Priority inversion is when a lower priority process executes while a higher
26 most of the time it can't be helped. Anytime a high priority process wants
27 to use a resource that a lower priority process has (a mutex for example),
29 with the resource. This is a priority inversion. What we want to prevent
31 priority process is prevented from running by a lower priority process for
35 processes, let's call them processes A, B, and C, where A is the highest
36 priority process, C is the lowest, and B is in between. A tries to grab a lock
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/linux/tools/perf/pmu-events/
H A Dmetric_test.py2 # SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)
14 a = Event('a')
16 self.assertEqual((a | b).ToPerfJson(), 'a | b')
17 self.assertEqual((a ^ b).ToPerfJson(), 'a ^ b')
18 self.assertEqual((a & b).ToPerfJson(), 'a & b')
19 self.assertEqual((a < b).ToPerfJson(), 'a < b')
20 self.assertEqual((a > b).ToPerfJson(), 'a > b')
21 self.assertEqual((a + b).ToPerfJson(), 'a + b')
22 self.assertEqual((a - b).ToPerfJson(), 'a - b')
23 self.assertEqual((a * b).ToPerfJson(), 'a * b')
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/linux/Documentation/filesystems/nfs/
H A Drpc-cache.rst5 This document gives a brief introduction to the caching
13 a wide variety of values to be caches.
15 There are a number of caches that are similar in structure though
16 quite possibly very different in content and use. There is a corpus
21 - mapping from IP address to client name
22 - mapping from client name and filesystem to export options
23 - mapping from UID to list of GIDs, to work around NFS's limitation
25 - mappings between local UID/GID and remote UID/GID for sites that
27 - mapping from network identify to public key for crypto authentication.
31 - general cache lookup with correct locking
[all …]
/linux/Documentation/admin-guide/cgroup-v1/
H A Dcgroups.rst6 Documentation/admin-guide/cgroup-v1/cpusets.rst
12 Portions Copyright (c) 2004-2006 Silicon Graphics, Inc.
42 ----------------------
44 Control Groups provide a mechanism for aggregating/partitioning sets of
50 A *cgroup* associates a set of tasks with a set of parameters for one
53 A *subsystem* is a module that makes use of the task grouping
55 particular ways. A subsystem is typically a "resource controller" that
56 schedules a resource or applies per-cgroup limits, but it may be
57 anything that wants to act on a group of processes, e.g. a
60 A *hierarchy* is a set of cgroups arranged in a tree, such that
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/linux/rust/kernel/alloc/
H A Dkbox.rs1 // SPDX-License-Identifier: GPL-2.0
25 /// The kernel's [`Box`] type -- a heap allocation for a single value of type `T`.
28 /// for example no `noalias` attribute is emitted and partially moving out of a `Box` is not
36 /// When dropping a [`Box`], the value is also dropped and the heap memory is automatically freed.
77 /// `self.0` is always properly aligned and either points to memory allocated with `A` or, for
78 /// zero-sized types, is a dangling, well aligned pointer.
81 pub struct Box<#[cfg_attr(CONFIG_RUSTC_HAS_COERCE_POINTEE, pointee)] T: ?Sized, A: Allocator>(
83 PhantomData<A>,
86 // This is to allow coercion from `Box<T, A>` to `Box<U, A>` if `T` can be converted to the
87 // dynamically-sized type (DST) `U`.
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/linux/Documentation/security/keys/
H A Dcore.rst5 This service allows cryptographic keys, authentication tokens, cross-domain
9 Keyrings are permitted; these are a special type of key that can hold links to
10 other keys. Processes each have three standard keyring subscriptions that a
28 Each key has a number of attributes:
30 - A serial number.
31 - A type.
32 - A description (for matching a key in a search).
33 - Access control information.
34 - An expiry time.
35 - A payload.
[all …]
/linux/Documentation/userspace-api/
H A Diommufd.rst1 .. SPDX-License-Identifier: GPL-2.0+
20 I/O page tables for all IOMMUs, with room in the design to add non-generic
31 --------------------
35 - IOMMUFD_OBJ_IOAS, representing an I/O address space (IOAS), allowing map/unmap
38 The IOAS is a functional replacement for the VFIO container, and like the VFIO
39 container it copies an IOVA map to a list of iommu_domains held within it.
41 - IOMMUFD_OBJ_DEVICE, representing a device that is bound to iommufd by an
44 - IOMMUFD_OBJ_HWPT_PAGING, representing an actual hardware I/O page table
45 (i.e. a single struct iommu_domain) managed by the iommu driver. "PAGING"
48 feature flag. This can be either an UNMANAGED stage-1 domain for a device
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/linux/drivers/crypto/cavium/cpt/
H A Dcpt_common.h1 /* SPDX-License-Identifier: GPL-2.0-only */
24 #define cpt_sriov_enabled(cpt) ((cpt)->flags & CPT_FLAG_SRIOV_ENABLED)
25 #define cpt_vf_driver(cpt) ((cpt)->flags & CPT_FLAG_VF_DRIVER)
26 #define cpt_device_ready(cpt) ((cpt)->flags & CPT_FLAG_DEVICE_READY)
39 #define CPTX_PF_CONSTANTS(a) (0x0ll + ((u64)(a) << 36)) argument
40 #define CPTX_PF_RESET(a) (0x100ll + ((u64)(a) << 36)) argument
41 #define CPTX_PF_DIAG(a) (0x120ll + ((u64)(a) << 36)) argument
42 #define CPTX_PF_BIST_STATUS(a) (0x160ll + ((u64)(a) << 36)) argument
43 #define CPTX_PF_ECC0_CTL(a) (0x200ll + ((u64)(a) << 36)) argument
44 #define CPTX_PF_ECC0_FLIP(a) (0x210ll + ((u64)(a) << 36)) argument
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