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/freebsd/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/
H A Dsha256-p8.S1 // SPDX-License-Identifier: Apache-2.0
3 * Copyright 2004-2022 The OpenSSL Project Authors. All Rights Reserved.
9 * https://www.apache.org/licenses/LICENSE-2.0
19 * Portions Copyright (c) 2022 Tino Reichardt <milky-zfs@mcmilk.de>
20 * - modified assembly to fit into OpenZFS
48 stdu 1,-384(1)
65 stvx 30,10,1
67 li 11,-4096+255
78 std 30,368(1)
79 li 30,0x60
[all …]
/freebsd/stand/efi/libefi/
H A Dtime.c1 /*-
61 * month number used as the index (1 -> 12) for regular and leap years.
70 31 + 28 + 31 + 30,
71 31 + 28 + 31 + 30 + 31,
72 31 + 28 + 31 + 30 + 31 + 30,
73 31 + 28 + 31 + 30 + 31 + 30 + 31,
74 31 + 28 + 31 + 30 + 31 + 30 + 31 + 31,
75 31 + 28 + 31 + 30 + 31 + 30 + 31 + 31 + 30,
76 31 + 28 + 31 + 30 + 31 + 30 + 31 + 31 + 30 + 31,
77 31 + 28 + 31 + 30 + 31 + 30 + 31 + 31 + 30 + 31 + 30,
[all …]
/freebsd/sys/crypto/openssl/powerpc64/
H A Dsha256p8-ppc.S1 /* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */
12 stdu 1,-384(1)
18 li 12,-1
29 stvx 30,10,1
31 li 11,-4096+255
42 std 30,368(1)
43 li 30,0x60
73 stvx 6,30,11
82 vadduwm 7,7,30
87 vadduwm 30,30,29
[all …]
H A Dchacha-ppc.S1 /* Do not modify. This file is auto-generated from chacha-ppc.pl. */
16 stdu 1,-256(1)
35 std 30,240(1)
63 ld 30,240(1)
71 .size ChaCha20_ctr32_int,.-ChaCha20_ctr32_int
95 mr 30,14
112 xor 30,30,18
116 rotlwi 30,30,16
120 add 26,26,30
136 xor 30,30,18
[all …]
H A Dpoly1305-ppcfp.S1 /* Do not modify. This file is auto-generated from poly1305-ppcfp.pl. */
12 stdu 1,-48(1)
34 beq- .Lno_key
156 .size poly1305_init_fpu,.-poly1305_init_fpu
165 beq- .Labort
167 stdu 1,-240(1)
185 stfd 30,224(1)
255 lfd 30,64(1)
270 fsub 30,30,10
277 fadd 30,30,4
[all …]
H A Dsha1-ppc.S1 /* Do not modify. This file is auto-generated from sha1-ppc.pl. */
12 stdu 1,-256(1)
29 std 30,240(1)
84 addic. 5,5,-1
104 ld 30,240(1)
124 rotlwi 8,8,30
134 rotlwi 7,7,30
144 rotlwi 12,12,30
154 rotlwi 11,11,30
164 rotlwi 10,10,30
[all …]
H A Dchachap10-ppc.S1 /* Do not modify. This file is auto-generated from chachap10-ppc.pl. */
13 stdu 1,-224(1)
17 li 12,-1
26 stvx 30,10,1
29 li 12,-4096+63
82 vspltisw 27,-16
85 vspltisw 30,7
132 vrlw 4,4,30
133 vrlw 5,5,30
134 vrlw 6,6,30
[all …]
/freebsd/sys/crypto/openssl/powerpc64le/
H A Dsha256p8-ppc.S1 /* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */
12 stdu 1,-384(1)
18 li 12,-1
29 stvx 30,10,1
31 li 11,-4096+255
42 std 30,368(1)
43 li 30,0x60
77 stvx 6,30,11
87 vadduwm 7,7,30
92 vadduwm 30,30,29
[all …]
H A Dsha1-ppc.S1 /* Do not modify. This file is auto-generated from sha1-ppc.pl. */
12 stdu 1,-256(1)
29 std 30,240(1)
84 addic. 5,5,-1
104 ld 30,240(1)
130 rotlwi 8,8,30
143 rotlwi 7,7,30
156 rotlwi 12,12,30
169 rotlwi 11,11,30
182 rotlwi 10,10,30
[all …]
H A Dchacha-ppc.S1 /* Do not modify. This file is auto-generated from chacha-ppc.pl. */
16 stdu 1,-256(1)
35 std 30,240(1)
63 ld 30,240(1)
71 .size ChaCha20_ctr32_int,.-ChaCha20_ctr32_int
95 mr 30,14
112 xor 30,30,18
116 rotlwi 30,30,16
120 add 26,26,30
136 xor 30,30,18
[all …]
H A Dpoly1305-ppcfp.S1 /* Do not modify. This file is auto-generated from poly1305-ppcfp.pl. */
12 stdu 1,-48(1)
34 beq- .Lno_key
156 .size poly1305_init_fpu,.-poly1305_init_fpu
165 beq- .Labort
167 stdu 1,-240(1)
185 stfd 30,224(1)
255 lfd 30,64(1)
270 fsub 30,30,10
277 fadd 30,30,4
[all …]
H A Dchachap10-ppc.S1 /* Do not modify. This file is auto-generated from chachap10-ppc.pl. */
13 stdu 1,-224(1)
17 li 12,-1
26 stvx 30,10,1
29 li 12,-4096+63
82 vspltisw 27,-16
85 vspltisw 30,7
132 vrlw 4,4,30
133 vrlw 5,5,30
134 vrlw 6,6,30
[all …]
/freebsd/sys/crypto/openssl/powerpc/
H A Dsha256p8-ppc.S1 /* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */
9 stwu 1,-328(1)
26 stvx 30,10,1
28 li 11,-4096+255
39 stw 30,320(1)
40 li 30,0x60
70 stvx 6,30,11
79 vadduwm 7,7,30
84 vadduwm 30,30,29
85 vadduwm 7,7,30
[all …]
H A Dchacha-ppc.S1 /* Do not modify. This file is auto-generated from chacha-ppc.pl. */
13 stwu 1,-160(1)
32 stw 30,152(1)
60 lwz 30,152(1)
68 .size ChaCha20_ctr32_int,.-ChaCha20_ctr32_int
92 mr 30,14
109 xor 30,30,18
113 rotlwi 30,30,16
117 add 26,26,30
133 xor 30,30,18
[all …]
H A Dsha1-ppc.S1 /* Do not modify. This file is auto-generated from sha1-ppc.pl. */
9 stwu 1,-160(1)
26 stw 30,152(1)
81 addic. 5,5,-1
101 lwz 30,152(1)
121 rotlwi 8,8,30
131 rotlwi 7,7,30
141 rotlwi 12,12,30
151 rotlwi 11,11,30
161 rotlwi 10,10,30
[all …]
H A Dpoly1305-ppcfp.S1 /* Do not modify. This file is auto-generated from poly1305-ppcfp.pl. */
9 stwu 1,-24(1)
31 beq- .Lno_key
153 .size poly1305_init_fpu,.-poly1305_init_fpu
160 beq- .Labort
162 stwu 1,-216(1)
180 stfd 30,200(1)
250 lfd 30,40(1)
265 fsub 30,30,10
272 fadd 30,30,4
[all …]
/freebsd/usr.bin/banner/
H A Dbanner.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
33 * banner - prints large signs
34 * banner [-w#] [-d] [-t] message ...
70 * 128+n -> print current line n times.
71 * 64+n -> this is last byte of char.
79 /* 10 */ 74, 40, 129, 31, 12, 64, 53, 129, 30, 14,
80 /* 20 */ 54, 65, 129, 30, 14, 53, 67, 129, 30, 14,
81 /* 30 */ 54, 65, 129, 31, 12, 64, 53, 129, 32, 10,
95 /* 170 */ 129, 30, 4, 71, 15, 116, 5, 129, 27, 97,
[all …]
/freebsd/crypto/openssl/crypto/modes/asm/
H A Daes-gcm-ppc.pl2 # Copyright 2014-2022 The OpenSSL Project Authors. All Rights Reserved.
3 # Copyright 2021- IBM Inc. All rights reserved
25 # Hash keys = v3 - v14
32 # v31 - counter 1
35 # vs0 - vs14 for round keys
38 # This implementation uses stitched AES-GCM approach to improve overall performance.
41 # Current large block (16384 bytes) performance per second with 128 bit key --
72 $FRAME=6*$SIZE_T+13*16; # 13*16 is for v20-v31 offload
75 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
76 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300template_cus157.h44 {"cus157-030-f0000"},
59 0x0d, //featureEnable; //bit0 - enable tx temp comp
60 //bit1 - enable tx volt comp
61 //bit2 - enable fastClock - default to 1
62 //bit3 - enable doubling - default to 1
63 //bit4 - enable internal regulator - default to 0
64 //bit5 - enable paprd -- default to 0
65 0, //miscConfiguration: bit0 - turn down drivestrength
86 …{-1,0,0}, // noiseFloorThreshCh[OSPREY_MAX_CHAINS]; // 3 //Check if the register is per ch…
95 -30, // adcDesiredSize; // 1
[all …]
H A Dar9300template_ap121.h44 {"ap121-010-00000"},
59 0x0d, //feature_enable; //bit0 - enable tx temp comp
60 //bit1 - enable tx volt comp
61 //bit2 - enable fastClock - default to 1
62 //bit3 - enable doubling - default to 1
63 //bit4 - enable internal regulator - default to 0
64 //bit5 - enable paprd -- default to 0
65 0, //misc_configuration: bit0 - turn down drivestrength
86 …{-1,0,0}, // noise_floor_thresh_ch[OSPREY_MAX_CHAINS]; // 3 //Check if the register is per…
95 -30, // adcDesiredSize; // 1
[all …]
H A Dar9300template_hb112.h44 {"cus157-241-f0000"},
59 0x0d, //feature_enable; //bit0 - enable tx temp comp
60 //bit1 - enable tx volt comp
61 //bit2 - enable fastClock - default to 1
62 //bit3 - enable doubling - default to 1
63 //bit4 - enable internal regulator - default to 0
64 //bit5 - enable paprd -- default to 0
65 0, //misc_configuration: bit0 - turn down drivestrength
86 …{-1,0,0}, // noise_floor_thresh_ch[OSPREY_MAX_CHAINS]; // 3 //Check if the register is per…
95 -30, // adcDesiredSize; // 1
[all …]
H A Dar9300template_hb116.h45 {"hb116-041-f0000"},
60 0x0d, //feature_enable; //bit0 - enable tx temp comp
61 //bit1 - enable tx volt comp
62 //bit2 - enable fastClock - default to 1
63 //bit3 - enable doubling - default to 1
64 //bit4 - enable internal regulator - default to 0
65 //bit5 - enable paprd -- default to 0
66 0, //misc_configuration: bit0 - turn down drivestrength
87 …{-1,0,0}, // noise_floor_thresh_ch[OSPREY_MAX_CHAINS]; // 3 //Check if the register is per…
96 -30, // adcDesiredSize; // 1
[all …]
H A Dar9300template_osprey_k31.h60 0x1d, //featureEnable; //bit0 - enable tx temp comp
61 //bit1 - enable tx volt comp
62 //bit2 - enable fastClock - default to 1
63 //bit3 - enable doubling - default to 1
64 //bit4 - enable internal regulator - default to 0
65 0, //miscConfiguration: bit0 - turn down drivestrength
86 …{-1,0,0}, // noiseFloorThreshCh[OSPREY_MAX_CHAINS]; // 3 //Check if the register is per ch…
95 -30, // adcDesiredSize; // 1
163 //1L-5L,5S,11L,11S
170 //6-24,36,48,54
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-ppc64/blake3/
H A Db3_ppc64le_sse2.S1 // SPDX-License-Identifier: CDDL-1.0
10 * or https://opensource.org/licenses/CDDL-1.0.
24 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
25 * Copyright (c) 2019-2022 Samuel Neves and Matthew Krupcale
26 * Copyright (c) 2022 Tino Reichardt <milky-zfs@mcmilk.de>
28 * This is converted assembly: SSE2 -> POWER8 PPC64 Little Endian
29 * Used tools: SIMDe https://github.com/simd-everywhere/simde
41 .byte 30
155 .byte 30
159 .byte 30
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dsgml2 #------------------------------------------------------------------------------
7 >14 regex ['"\ \t]*[0-9.]+['"\ \t]*
12 >>19 search/4096 \<gnc-v2 GnuCash file
13 !:mime application/x-gnucash
18 >14 regex ['"\ \t]*[0-9.]+['"\ \t]*
21 !:mime application/xml-sitemap
23 # XML-based format representing braille pages in a digital format.
26 # http://files.pef-format.org/specifications/pef-2008-1/pef-specification.html
30 !:mime application/x-pef+xml
48 #------------------------------------------------------------------------------
[all …]

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