Home
last modified time | relevance | path

Searched +full:- +full:16 (Results 1 – 25 of 1194) sorted by relevance

12345678910>>...48

/freebsd/sys/crypto/openssl/aarch64/
H A Daes-gcm-armv8-unroll8_64.S1 /* Do not modify. This file is auto-generated from aes-gcm-armv8-unroll8_64.pl. */
5 .arch armv8-a+crypto
13 stp d8, d9, [sp, #-80]!
17 stp d10, d11, [sp, #16]
25 movi v31.16b, #0x0
28 ld1 { v0.16b}, [x16] //CTR block 0
30 sub x5, x5, #1 //byte_len - 1
34 rev32 v30.16b, v0.16b //set up reversed counter
38 rev32 v1.16b, v30.16b //CTR block 1
41 rev32 v2.16b, v30.16b //CTR block 2
[all …]
H A Daes-gcm-armv8_64.S1 /* Do not modify. This file is auto-generated from aes-gcm-armv8_64.pl. */
5 .arch armv8-a+crypto
13 stp x19, x20, [sp, #-112]!
16 stp x21, x22, [sp, #16]
33 ld1 {v11.16b}, [x3]
34 ext v11.16b, v11.16b, v11.16b, #8
35 rev64 v11.16b, v11.16b
39 ld1 {v18.4s}, [x8], #16 //load rk0
41 sub x5, x5, #1 //byte_len - 1
46 ext v15.16b, v15.16b, v15.16b, #8
[all …]
H A Dvpsm4_ex-armv8.S1 /* Do not modify. This file is auto-generated from vpsm4_ex-armv8.pl. */
2 // Copyright 2022-2025 The OpenSSL Project Authors. All Rights Reserved.
18 .arch armv8-a+crypto
47 .size _vpsm4_ex_consts,.-_vpsm4_ex_consts
55 ldr q27, [x9, #:lo12:.Lsbox_magic+16]
61 rev32 v5.16b,v5.16b
69 eor v5.16b,v5.16b,v6.16b
73 movi v0.16b,#64
86 tbl v0.16b, {v4.16b}, v26.16b
87 ushr v2.16b, v0.16b, 4
[all …]
H A Dvpsm4-armv8.S1 /* Do not modify. This file is auto-generated from vpsm4-armv8.pl. */
2 // Copyright 2020-2025 The OpenSSL Project Authors. All Rights Reserved.
18 .arch armv8-a
58 .size _vpsm4_consts,.-_vpsm4_consts
69 ld1 {v16.16b,v17.16b,v18.16b,v19.16b},[x10],#64
70 ld1 {v20.16b,v21.16b,v22.16b,v23.16b},[x10],#64
71 ld1 {v24.16b,v25.16b,v26.16b,v27.16b},[x10],#64
72 ld1 {v28.16b,v29.16b,v30.16b,v31.16b},[x10]
74 rev32 v5.16b,v5.16b
82 eor v5.16b,v5.16b,v6.16b
[all …]
H A Dbsaes-armv8.S1 /* Do not modify. This file is auto-generated from bsaes-armv8.pl. */
2 // Copyright 2021-2025 The OpenSSL Project Authors. All Rights Reserved.
15 // This implementation is a translation of bsaes-armv7 for AArch64.
20 // A lot of hand-scheduling has been performed. Consequently, this code
37 // x9 -> key (previously expanded using _bsaes_key_convert)
39 // v0-v7 input data
41 // x9-x11 corrupted
42 // other general-purpose registers preserved
43 // v0-v7 output data
44 // v11-v15 preserved
[all …]
H A Dvpaes-armv8.S1 /* Do not modify. This file is auto-generated from vpaes-armv8.pl. */
94 .size _vpaes_consts,.-_vpaes_consts
102 // Fills register %r10 -> .aes_consts (so you can -fPIC)
103 // and %xmm9-%xmm15 as specified below.
110 movi v17.16b, #0x0f
115 .size _vpaes_encrypt_preheat,.-_vpaes_encrypt_preheat
120 // AES-encrypt %xmm0.
124 // %xmm9-%xmm15 as in _vpaes_preheat
128 // Clobbers %xmm1-%xmm5, %r9, %r10, %r11, %rax
129 // Preserves %xmm6 - %xmm8 so you get some local vectors
[all …]
H A Daesv8-armx.S1 /* Do not modify. This file is auto-generated from aesv8-armx.pl. */
5 .arch armv8-a+crypto
11 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d // rotate-n-splat
20 // Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later.
21 stp x29,x30,[sp,#-16]!
23 mov x3,#-1
28 mov x3,#-2
40 eor v0.16b,v0.16b,v0.16b
41 ld1 {v3.16b},[x0],#16
51 tbl v6.16b,{v3.16b},v2.16b
[all …]
H A Dghashv8-armx.S1 /* Do not modify. This file is auto-generated from ghashv8-armx.pl. */
5 .arch armv8-a+crypto
13 movi v19.16b,#0xe1
15 ext v3.16b,v17.16b,v17.16b,#8
18 ext v16.16b,v18.16b,v19.16b,#8 //t0=0xc2....01
21 and v18.16b,v18.16b,v16.16b
23 ext v18.16b,v18.16b,v18.16b,#8
24 and v16.16b,v16.16b,v17.16b
25 orr v3.16b,v3.16b,v18.16b //H<<<=1
26 eor v20.16b,v3.16b,v16.16b //twisted H
[all …]
H A Dkeccak1600-armv8.S1 /* Do not modify. This file is auto-generated from keccak1600-armv8.pl. */
35 .size iotas,.-iotas
44 stp x28,x30,[sp,#16] // 32 bytes on top are mine
95 ldp x4,x9,[sp,#0] // re-load offloaded data
110 ror x1,x6,#64-44
112 ror x2,x12,#64-43
114 ror x3,x25,#64-21
116 ror x4,x24,#64-14
118 ror x6,x9,#64-20
119 ror x12,x13,#64-25
[all …]
/freebsd/crypto/openssl/crypto/aes/asm/
H A Dbsaes-armv8.pl2 # Copyright 2020-2025 The OpenSSL Project Authors. All Rights Reserved.
16 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
17 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate ) or
18 die "can't locate arm-xlate.pl";
35 // Copyright 2021-2025 The OpenSSL Project Authors. All Rights Reserved.
48 // This implementation is a translation of bsaes-armv7 for AArch64.
53 // A lot of hand-scheduling has been performed. Consequently, this code
70 // x9 -> key (previously expanded using _bsaes_key_convert)
72 // v0-v7 input data
74 // x9-x11 corrupted
[all …]
H A Dvpaes-armv8.pl2 # Copyright 2015-2025 The OpenSSL Project Authors. All Rights Reserved.
11 ## Constant-time SSSE3 AES core implementation.
24 # SoC based on Cortex-A53 that doesn't have crypto extensions.
26 # CBC enc ECB enc/dec(*) [bit-sliced enc/dec]
27 # Cortex-A53 21.5 18.1/20.6 [17.5/19.8 ]
28 # Cortex-A57 36.0(**) 20.4/24.9(**) [14.4/16.6 ]
29 # X-Gene 45.9(**) 45.8/57.7(**) [33.1/37.6(**) ]
37 # (**) these results are worse than scalar compiler-generated
38 # code, but it's constant-time and therefore preferred;
47 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-aarch64/blake3/
H A Db3_aarch64_sse2.S1 // SPDX-License-Identifier: CDDL-1.0
10 * or https://opensource.org/licenses/CDDL-1.0.
24 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
25 * Copyright (c) 2019-2022 Samuel Neves and Matthew Krupcale
26 * Copyright (c) 2022-2023 Tino Reichardt <milky-zfs@mcmilk.de>
28 * This is converted assembly: SSE2 -> ARMv8-A
29 * Used tools: SIMDe https://github.com/simd-everywhere/simde
32 * see: https://github.com/mcmilk/BLAKE3-tests/blob/master/contrib/simde.sh
48 .word 16
69 .cfi_offset w19, -16
[all …]
H A Db3_aarch64_sse41.S1 // SPDX-License-Identifier: CDDL-1.0
10 * or https://opensource.org/licenses/CDDL-1.0.
24 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
25 * Copyright (c) 2019-2022 Samuel Neves
26 * Copyright (c) 2022-2023 Tino Reichardt <milky-zfs@mcmilk.de>
28 * This is converted assembly: SSE4.1 -> ARMv8-A
29 * Used tools: SIMDe https://github.com/simd-everywhere/simde
32 * see: https://github.com/mcmilk/BLAKE3-tests/blob/master/contrib/simde.sh
48 .word 16
69 .cfi_offset w19, -16
[all …]
/freebsd/crypto/krb5/src/lib/crypto/builtin/aes/
H A Diaesx86.s130 movdqu xmm0,[%1 + 0*16]
132 movdqu xmm1,[%1 + 1*16]
134 movdqu xmm2,[%1 + 2*16]
136 movdqu xmm3,[%1 + 3*16]
144 movdqu xmm4,[%1+16]
153 movdqu [%1 + 0*16],xmm0
154 movdqu [%1 + 1*16],xmm1
155 movdqu [%1 + 2*16],xmm2
156 movdqu [%1 + 3*16],xmm3
161 movdqu xmm4,[%2 + ((%3)*16)]
[all …]
H A Diaesx64.s134 movdqu xmm4,[%1+16]
146 movdqu xmm0,[%1 + 0*16]
148 movdqu xmm1,[%1 + 1*16]
150 movdqu xmm2,[%1 + 2*16]
152 movdqu xmm3,[%1 + 3*16]
157 movdqu [%1 + 0*16],xmm0
158 movdqu [%1 + 1*16],xmm1
159 movdqu [%1 + 2*16],xmm2
160 movdqu [%1 + 3*16],xmm3
164 movdqu xmm4,[%2 + ((%3)*16)]
[all …]
/freebsd/contrib/arm-optimized-routines/string/aarch64/
H A Dstrrchr.S2 * strrchr - find last position of a character in a string.
4 * Copyright (c) 2014-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64
47 For each 32-byte hunk we calculate a 64-bit syndrome value, with
49 and little-endian systems). For each tuple, bit 0 is set iff
62 movk wtmp2, #0x4010, lsl #16
63 dup vrepchr.16b, chrin
64 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
71 /* Input string is not 32-byte aligned. Rather than forcing
[all …]
H A Dstrchr.S2 * strchr - find a character in a string
4 * Copyright (c) 2014-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64
41 For each 32-byte hunk we calculate a 64-bit syndrome value, with
43 and little-endian systems). For each tuple, bit 0 is set iff
58 movk wtmp2, 0xc030, lsl 16
59 dup vrepchr.16b, chrin
60 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
66 /* Input string is not 32-byte aligned. Rather than forcing
[all …]
H A Dstrchrnul.S2 * strchrnul - find a character or nul in a string
4 * Copyright (c) 2014-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64
39 For each 32-byte hunk we calculate a 64-bit syndrome value, with
41 and little-endian systems). For each tuple, bit 0 is set iff
53 movk wtmp2, #0x4010, lsl #16
54 dup vrepchr.16b, chrin
55 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
60 /* Input string is not 32-byte aligned. Rather than forcing
[all …]
H A Dstrrchr-mte.S2 * strrchr - find last position of a character in a string.
4 * Copyright (c) 2020-2023, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64, Advanced SIMD.
38 For each 16-byte chunk we calculate a 64-bit syndrome value, with
40 and little-endian systems). For each tuple, bits 0-1 are set if
41 the relevant byte matched the requested character; bits 2-3 are set
46 dup vrepchr.16b, chrin
47 movi vrepmask.16b, 0x33
48 ld1 {vdata.16b}, [src]
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsAsmBackend.cpp1 //===-- MipsAsmBackend.cpp - Mips Asm Backend ----------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
81 // We now check if Value can be encoded as a 16-bit signed immediate. in adjustFixupValue()
82 if (!isInt<16>(Value)) { in adjustFixupValue()
91 // We now check if Value can be encoded as a 19-bit signed immediate. in adjustFixupValue()
110 // Get the 2nd 16-bits. Also add 1 if bit 15 is 1. in adjustFixupValue()
111 Value = ((Value + 0x8000) >> 16) & 0xffff; in adjustFixupValue()
115 // Get the 3rd 16-bits. in adjustFixupValue()
[all …]
/freebsd/lib/libc/aarch64/string/
H A Dstrncmp.S1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
24 mov x13, #-1 // save constants for later
29 * into unmapped page. If so, we load 16 bytes from the nearest
33 add x3, x0, #16 // end of head
34 add x4, x1, #16
38 cmp x2,#16
50 cmeq v5.16b, v0.16b, #0
51 cmeq v6.16b, v1.16b, #0
66 tbl v0.16b, {v0.16b}, v4.16b
[all …]
H A Dstrcmp.S1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
21 mov x13, #-1
25 * into unmapped page. If so, we load 16 bytes from the nearest
29 add x3, x0, #16 // end of head
30 add x4, x1, #16
44 cmeq v5.16b, v0.16b, #0
45 cmeq v6.16b, v2.16b, #0
60 tbl v0.16b, {v0.16b}, v4.16b
71 tbl v4.16b, {v2.16b}, v4.16b
[all …]
/freebsd/crypto/openssl/crypto/sm4/asm/
H A Dvpsm4_ex-armv8.pl2 # Copyright 2022-2025 The OpenSSL Project Authors. All Rights Reserved.
21 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
22 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
23 die "can't locate arm-xlate.pl";
54 rev32 $dst.16b,$src.16b
56 mov $dst.16b,$src.16b
62 rev32 $dst.16b,$dst.16b
75 rev32 $dst.16b,$src.16b
77 mov $dst.16b,$src.16b
83 rev32 $dst.16b,$dst.16b
[all …]
H A Dvpsm4-armv8.pl2 # Copyright 2020-2025 The OpenSSL Project Authors. All Rights Reserved.
21 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
22 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
23 die "can't locate arm-xlate.pl";
37 my @sbox=map("v$_",(16..31));
51 rev32 $dst.16b,$src.16b
53 mov $dst.16b,$src.16b
59 rev32 $dst.16b,$dst.16b
72 rev32 $dst.16b,$src.16b
74 mov $dst.16b,$src.16b
[all …]
/freebsd/contrib/byacc/test/btyacc/
H A Dbtyacc_calc1.output15 11 | dexp '-' dexp
18 14 | '-' dexp
21 16 vexp : dexp
26 21 | vexp '-' vexp
27 22 | dexp '-' vexp
32 27 | '-' vexp
54 '-' shift 6
76 '-' reduce 9
88 '-' reduce 18
101 dexp : '-' . dexp (14)
[all …]

12345678910>>...48