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/freebsd/sys/crypto/openssl/aarch64/
H A Daes-gcm-armv8_64.S1 /* Do not modify. This file is auto-generated from aes-gcm-armv8_64.pl. */
5 .arch armv8-a+crypto
13 stp x19, x20, [sp, #-112]!
16 stp x21, x22, [sp, #16]
33 ld1 {v11.16b}, [x3]
34 ext v11.16b, v11.16b, v11.16b, #8
35 rev64 v11.16b, v11.16b
39 ld1 {v18.4s}, [x8], #16 //load rk0
41 sub x5, x5, #1 //byte_len - 1
46 ext v15.16b, v15.16b, v15.16b, #8
[all …]
H A Daesv8-armx.S1 /* Do not modify. This file is auto-generated from aesv8-armx.pl. */
5 .arch armv8-a+crypto
10 .long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d // rotate-n-splat
19 // Armv8.3-A PAuth: even though x30 is pushed to stack it is not popped later.
20 stp x29,x30,[sp,#-16]!
22 mov x3,#-1
27 mov x3,#-2
38 eor v0.16b,v0.16b,v0.16b
39 ld1 {v3.16b},[x0],#16
49 tbl v6.16b,{v3.16b},v2.16b
[all …]
H A Dvpaes-armv8.S1 /* Do not modify. This file is auto-generated from vpaes-armv8.pl. */
94 .size _vpaes_consts,.-_vpaes_consts
99 // Fills register %r10 -> .aes_consts (so you can -fPIC)
100 // and %xmm9-%xmm15 as specified below.
106 movi v17.16b, #0x0f
111 .size _vpaes_encrypt_preheat,.-_vpaes_encrypt_preheat
116 // AES-encrypt %xmm0.
120 // %xmm9-%xmm15 as in _vpaes_preheat
124 // Clobbers %xmm1-%xmm5, %r9, %r10, %r11, %rax
125 // Preserves %xmm6 - %xmm8 so you get some local vectors
[all …]
H A Dghashv8-armx.S1 /* Do not modify. This file is auto-generated from ghashv8-armx.pl. */
5 .arch armv8-a+crypto
13 movi v19.16b,#0xe1
15 ext v3.16b,v17.16b,v17.16b,#8
18 ext v16.16b,v18.16b,v19.16b,#8 //t0=0xc2....01
21 and v18.16b,v18.16b,v16.16b
23 ext v18.16b,v18.16b,v18.16b,#8
24 and v16.16b,v16.16b,v17.16b
25 orr v3.16b,v3.16b,v18.16b //H<<<=1
26 eor v20.16b,v3.16b,v16.16b //twisted H
[all …]
H A Dkeccak1600-armv8.S1 /* Do not modify. This file is auto-generated from keccak1600-armv8.pl. */
35 .size iotas,.-iotas
41 stp x28,x30,[sp,#16] // 32 bytes on top are mine
92 ldp x4,x9,[sp,#0] // re-load offloaded data
107 ror x1,x6,#64-44
109 ror x2,x12,#64-43
111 ror x3,x25,#64-21
113 ror x4,x24,#64-14
115 ror x6,x9,#64-20
116 ror x12,x13,#64-25
[all …]
/freebsd/crypto/openssl/crypto/aes/asm/
H A Dvpaes-armv8.pl2 # Copyright 2015-2020 The OpenSSL Project Authors. All Rights Reserved.
11 ## Constant-time SSSE3 AES core implementation.
24 # SoC based on Cortex-A53 that doesn't have crypto extensions.
26 # CBC enc ECB enc/dec(*) [bit-sliced enc/dec]
27 # Cortex-A53 21.5 18.1/20.6 [17.5/19.8 ]
28 # Cortex-A57 36.0(**) 20.4/24.9(**) [14.4/16.6 ]
29 # X-Gene 45.9(**) 45.8/57.7(**) [33.1/37.6(**) ]
37 # (**) these results are worse than scalar compiler-generated
38 # code, but it's constant-time and therefore preferred;
47 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
[all …]
/freebsd/contrib/arm-optimized-routines/string/aarch64/
H A Dstrrchr.S2 * strrchr - find last position of a character in a string.
4 * Copyright (c) 2014-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64
47 For each 32-byte hunk we calculate a 64-bit syndrome value, with
49 and little-endian systems). For each tuple, bit 0 is set iff
62 movk wtmp2, #0x4010, lsl #16
63 dup vrepchr.16b, chrin
64 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
71 /* Input string is not 32-byte aligned. Rather than forcing
[all …]
H A Dstrchr.S2 * strchr - find a character in a string
4 * Copyright (c) 2014-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64
41 For each 32-byte hunk we calculate a 64-bit syndrome value, with
43 and little-endian systems). For each tuple, bit 0 is set iff
58 movk wtmp2, 0xc030, lsl 16
59 dup vrepchr.16b, chrin
60 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
66 /* Input string is not 32-byte aligned. Rather than forcing
[all …]
H A Dstrchrnul.S2 * strchrnul - find a character or nul in a string
4 * Copyright (c) 2014-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64
39 For each 32-byte hunk we calculate a 64-bit syndrome value, with
41 and little-endian systems). For each tuple, bit 0 is set iff
53 movk wtmp2, #0x4010, lsl #16
54 dup vrepchr.16b, chrin
55 bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
60 /* Input string is not 32-byte aligned. Rather than forcing
[all …]
H A Dstrrchr-mte.S2 * strrchr - find last position of a character in a string.
4 * Copyright (c) 2020-2023, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64, Advanced SIMD.
38 For each 16-byte chunk we calculate a 64-bit syndrome value, with
40 and little-endian systems). For each tuple, bits 0-1 are set if
41 the relevant byte matched the requested character; bits 2-3 are set
46 dup vrepchr.16b, chrin
47 movi vrepmask.16b, 0x33
48 ld1 {vdata.16b}, [src]
[all …]
H A Dstrchr-mte.S2 * strchr - find a character in a string
4 * Copyright (c) 2020-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64, Advanced SIMD.
35 For each 16-byte chunk we calculate a 64-bit syndrome value with four bits
36 per byte. Bits 0-1 are set if the relevant byte matched the requested
37 character, bits 2-3 are set if the byte is NUL or matched. Count trailing
43 dup vrepchr.16b, chrin
44 ld1 {vdata.16b}, [src]
45 movi vrepmask.16b, 0x33
[all …]
H A Dmemchr.S2 * memchr - find a character in a memory zone
4 * Copyright (c) 2014-2022, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
10 * ARMv8-a, AArch64
41 * For each 32-byte chunk we calculate a 64-bit syndrome value, with two bits
57 movk wtmp2, #0x4010, lsl #16
58 dup vrepchr.16b, chrin
59 /* Work with aligned 32-byte chunks */
67 * Input string is not 32-byte aligned. We calculate the syndrome
72 ld1 {vdata1.16b, vdata2.16b}, [src], #32
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-aarch64/blake3/
H A Db3_aarch64_sse2.S9 * or https://opensource.org/licenses/CDDL-1.0.
23 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
24 * Copyright (c) 2019-2022 Samuel Neves and Matthew Krupcale
25 * Copyright (c) 2022-2023 Tino Reichardt <milky-zfs@mcmilk.de>
27 * This is converted assembly: SSE2 -> ARMv8-A
28 * Used tools: SIMDe https://github.com/simd-everywhere/simde
31 * see: https://github.com/mcmilk/BLAKE3-tests/blob/master/contrib/simde.sh
47 .word 16
[all...]
H A Db3_aarch64_sse41.S9 * or https://opensource.org/licenses/CDDL-1.0.
23 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
24 * Copyright (c) 2019-2022 Samuel Neves
25 * Copyright (c) 2022-2023 Tino Reichardt <milky-zfs@mcmilk.de>
27 * This is converted assembly: SSE4.1 -> ARMv8-A
28 * Used tools: SIMDe https://github.com/simd-everywhere/simde
31 * see: https://github.com/mcmilk/BLAKE3-tests/blob/master/contrib/simde.sh
47 .word 16
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsAsmBackend.cpp1 //===-- MipsAsmBackend.cpp - Mips Asm Backend ----------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
81 // We now check if Value can be encoded as a 16-bit signed immediate. in adjustFixupValue()
82 if (!isInt<16>(Value)) { in adjustFixupValue()
91 // We now check if Value can be encoded as a 19-bit signed immediate. in adjustFixupValue()
110 // Get the 2nd 16-bits. Also add 1 if bit 15 is 1. in adjustFixupValue()
111 Value = ((Value + 0x8000) >> 16) & 0xffff; in adjustFixupValue()
115 // Get the 3rd 16-bits. in adjustFixupValue()
[all …]
/freebsd/lib/libc/aarch64/string/
H A Dstrncmp.S1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
24 mov x13, #-1 // save constants for later
29 * into unmapped page. If so, we load 16 bytes from the nearest
33 add x3, x0, #16 // end of head
34 add x4, x1, #16
38 cmp x2,#16
50 cmeq v5.16b, v0.16b, #0
51 cmeq v6.16b, v1.16b, #0
66 tbl v0.16b, {v0.16b}, v4.16b
[all …]
H A Dstrcmp.S1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
21 mov x13, #-1
25 * into unmapped page. If so, we load 16 bytes from the nearest
29 add x3, x0, #16 // end of head
30 add x4, x1, #16
44 cmeq v5.16b, v0.16b, #0
45 cmeq v6.16b, v2.16b, #0
60 tbl v0.16b, {v0.16b}, v4.16b
71 tbl v4.16b, {v2.16b}, v4.16b
[all …]
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DRISCVVTypes.def1 //===-- RISCVVTypes.def - Metadata for the RISC-V V types ------*- C++ -*--===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines various RISC-V V builtin types. The macros are:
11 // - RVV_TYPE(Name, Id, SingletonId)
15 // - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP,
17 // A RISC-V V scalable vector.
19 // - RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls)
20 // An RISC-V V scalable mask.
24 // - Name is the name of the builtin type.
[all …]
/freebsd/contrib/byacc/test/btyacc/
H A Dbtyacc_calc1.output15 11 | dexp '-' dexp
18 14 | '-' dexp
21 16 vexp : dexp
26 21 | vexp '-' vexp
27 22 | dexp '-' vexp
32 27 | '-' vexp
54 '-' shift 6
76 '-' reduce 9
88 '-' reduce 18
101 dexp : '-' . dexp (14)
[all …]
/freebsd/crypto/heimdal/lib/wind/
H A Dnormalize_table.c2 /* Automatically generated at 2012-01-11T14:07:01.714581 */
9 {0xa0, 1, 0}, /* NO-BREAK SPACE */
462 {0xddc, 2, 855}, /* SINHALA VOWEL SIGN KOMBUVA HAA AELA-PILLA */
463 {0xddd, 2, 857}, /* SINHALA VOWEL SIGN KOMBUVA HAA DIGA AELA-PILLA */
1033 {0x2004, 1, 1874}, /* THREE-PER-EM SPACE */
1034 {0x2005, 1, 1875}, /* FOUR-PER-EM SPACE */
1035 {0x2006, 1, 1876}, /* SIX-PER-EM SPACE */
1040 {0x2011, 1, 1881}, /* NON-BREAKING HYPHEN */
1045 {0x202f, 1, 1887}, /* NARROW NO-BREAK SPACE */
1089 {0x2102, 1, 36}, /* DOUBLE-STRUCK CAPITAL C */
[all …]
/freebsd/sys/powerpc/ps3/
H A Dps3-hvcall.S7 std %r0,16(%r1)
8 stdu %r1,-48(%r1)
19 ld %r0,16(%r1)
26 std %r0,16(%r1)
27 stdu %r1,-32(%r1)
32 ld %r0,16(%r1)
39 std %r0,16(%r1)
40 stdu %r1,-48(%r1)
51 ld %r0,16(%r1)
58 std %r0,16(%r1)
[all …]
/freebsd/crypto/openssl/crypto/modes/
H A Dcts128.c2 * Copyright 2008-2016 The OpenSSL Project Authors. All Rights Reserved.
29 const void *key, unsigned char ivec[16], in CRYPTO_cts128_encrypt_block() argument
34 if (len <= 16) in CRYPTO_cts128_encrypt_block()
37 if ((residue = len % 16) == 0) in CRYPTO_cts128_encrypt_block()
38 residue = 16; in CRYPTO_cts128_encrypt_block()
40 len -= residue; in CRYPTO_cts128_encrypt_block()
50 memcpy(out, out - 16, residue); in CRYPTO_cts128_encrypt_block()
51 memcpy(out - 16, ivec, 16); in CRYPTO_cts128_encrypt_block()
59 unsigned char ivec[16], in CRYPTO_nistcts128_encrypt_block() argument
64 if (len < 16) in CRYPTO_nistcts128_encrypt_block()
[all …]
/freebsd/sys/crypto/openssl/powerpc64/
H A Decp_nistp521-ppc64.S1 /* Do not modify. This file is auto-generated from ecp_nistp521-ppc64.pl. */
14 stdu 1,-16*13(1)
16 stxv 52,-16*12(12)
17 stxv 53,-16*11(12)
18 stxv 54,-16*10(12)
19 stxv 55,-16*9(12)
20 stxv 56,-16*8(12)
21 stxv 57,-16*7(12)
22 stxv 58,-16*6(12)
23 stxv 59,-16*5(12)
[all …]
/freebsd/sys/crypto/openssl/powerpc64le/
H A Decp_nistp521-ppc64.S1 /* Do not modify. This file is auto-generated from ecp_nistp521-ppc64.pl. */
14 stdu 1,-16*13(1)
16 stxv 52,-16*12(12)
17 stxv 53,-16*11(12)
18 stxv 54,-16*10(12)
19 stxv 55,-16*9(12)
20 stxv 56,-16*8(12)
21 stxv 57,-16*7(12)
22 stxv 58,-16*6(12)
23 stxv 59,-16*5(12)
[all …]
/freebsd/sys/crypto/openssl/i386/
H A De_padlock-x86.S1 /* Do not modify. This file is auto-generated from e_padlock-x86.pl. */
6 .align 16
68 .size padlock_capability,.-.L_padlock_capability_begin
71 .align 16
91 .size padlock_key_bswap,.-.L_padlock_key_bswap_begin
94 .align 16
103 leal .Lpadlock_saved_context-.L004verify_pic_point,%eax
109 .size padlock_verify_context,.-.L_padlock_verify_context_begin
111 .align 16
128 .size _padlock_verify_ctx,.-_padlock_verify_ctx
[all …]

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