/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/ |
H A D | tsan_vector_clock.cpp | 1 //===-- tsan_vector_clock.cpp ---------------------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 31 m128* vclk = reinterpret_cast<m128*>(clk_); in Reset() 32 for (uptr i = 0; i < kVectorClockSize; i++) _mm_store_si128(&vclk[i], z); in Reset() 41 clk_[i] = max(clk_[i], src->clk_[i]); in Acquire() 44 m128 const* __restrict vsrc = reinterpret_cast<m128 const*>(src->clk_); in Acquire() 62 dst->Acquire(this); in Release() 89 Epoch tmp = dst->clk_[i]; in ReleaseStoreAcquire() [all …]
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | aspeed-video.txt | 7 - compatible: "aspeed,ast2400-video-engine" or 8 "aspeed,ast2500-video-engine" or 9 "aspeed,ast2600-video-engine" 10 - reg: contains the offset and length of the VE memory region 11 - clocks: clock specifiers for the syscon clocks associated with 12 the VE (ordering must match the clock-names property) 13 - clock-names: "vclk" and "eclk" 14 - resets: reset specifier for the syscon reset associated with 16 - interrupts: the interrupt associated with the VE on this platform 19 - memory-region: [all …]
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H A D | renesas,fcp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car Frame Compression Processor (FCP) 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 14 R-Car Gen3 and RZ/G2 SoCs. It provides data compression and decompression, 25 - enum: 26 - renesas,fcpv # FCP for VSP 27 - renesas,fcpf # FCP for FDP 28 - items: [all …]
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H A D | renesas,vsp1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 13 The VSP is a video processing engine that supports up-/down-scaling, alpha 15 It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs. 20 - enum: 21 - renesas,r9a07g044-vsp2 # RZ/G2L 22 - renesas,vsp1 # R-Car Gen2 and RZ/G1 23 - renesas,vsp2 # R-Car Gen3 and RZ/G2 [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/samsung/ |
H A D | samsung,fimd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 18 - samsung,s3c2443-fimd 19 - samsung,s3c6400-fimd 20 - samsung,s5pv210-fimd [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/ |
H A D | xylon,logicvc-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com> 16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs. 20 synthesis time. As a result, many of the device-tree bindings are meant to 24 Layers are declared in the "layers" sub-node and have dedicated configuration. 32 - xylon,logicvc-3.02.a-display 33 - xylon,logicvc-4.01.a-display [all …]
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H A D | amlogic,meson-vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------| 19 D |-------| |----| | | | | HDMI PLL | 20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK | 21 R |-------| |----| Processing | | | | | 22 | osd2 | | | |---| Enci ----------|----|-----VDAC------| [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
H A D | renesas,dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biju Das <biju.das.jz@bp.renesas.com> 18 - $ref: /schemas/display/dsi-controller.yaml# 23 - enum: 24 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC} 25 - renesas,r9a07g054-mipi-dsi # RZ/V2L 26 - const: renesas,rzg2l-mipi-dsi 33 - description: Sequence operation channel 0 interrupt [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/exynos/ |
H A D | samsung-fimd.txt | 1 Device-Tree bindings for Samsung SoC display controller (FIMD) 8 - compatible: value should be one of the following 9 "samsung,s3c2443-fimd"; /* for S3C24XX SoCs */ 10 "samsung,s3c6400-fimd"; /* for S3C64XX SoCs */ 11 "samsung,s5pv210-fimd"; /* for S5PV210 SoC */ 12 "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */ 13 "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */ 14 "samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */ 15 "samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */ 17 - reg: physical base address and length of the FIMD registers set. [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/ |
H A D | r9a07g054.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g054-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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H A D | r9a07g044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g044-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos5250-spring.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/clock/samsung,s2mps11.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/input/input.h> 19 chassis-type = "laptop"; 33 stdout-path = "serial3:115200n8"; 36 gpio-keys { 37 compatible = "gpio-keys"; [all …]
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H A D | exynos4210-universal_c210.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 12 /dts-v1/; 14 #include <dt-bindings/gpio/gpio.h> 19 chassis-type = "handset"; 35 stdout-path = "serial2:115200n8"; 39 fixed-rate-clock [all...] |
H A D | exynos5250-snow-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/samsung-i2 [all...] |
H A D | exynos4210-i9100.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree 11 /dts-v1/; 13 #include "exynos4412-ppmu-common.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/linux-even [all...] |
H A D | s5pv210-aries.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 32 reserved-memory { 33 #address-cells = <1>; 34 #size-cells = <1>; 38 compatible = "shared-dma-pool"; 39 no-map; 44 compatible = "shared-dma-pool"; [all …]
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H A D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pi-rev16", [all …]
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H A D | exynos5420-peach-pit.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pit-rev16", [all …]
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H A D | exynos4412-p4note.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 * Based on exynos4412-midas.dtsi. 10 /dts-v1/; 12 #include "exynos4412-ppmu-common.dtsi" 14 #include <dt-bindings/clock/maxim,max77686.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/linux-event-codes.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 18 #include <dt-bindings/power/summit,smb347-charger.h> 19 #include "exynos-pinctrl.h" [all …]
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/freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
H A D | aspeed-g4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 2 #include <dt-bindings/clock/aspeed-clock.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 9 interrupt-parent = <&vic>; 35 #address-cells = <1>; 36 #size-cell [all...] |
H A D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/interrupt-controlle [all...] |
H A D | aspeed-g5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 2 #include <dt-bindings/clock/aspeed-clock.h> 3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 8 #address-cell [all...] |