1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright IBM Corp. 2012
4 *
5 * Author(s):
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 *
8 * The System z PCI code is a rewrite from a prototype by
9 * the following people (Kudoz!):
10 * Alexander Schmidt
11 * Christoph Raisch
12 * Hannes Hering
13 * Hoang-Nam Nguyen
14 * Jan-Bernd Themann
15 * Stefan Roscher
16 * Thomas Klein
17 */
18
19 #define KMSG_COMPONENT "zpci"
20 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22 #include <linux/kernel.h>
23 #include <linux/slab.h>
24 #include <linux/err.h>
25 #include <linux/export.h>
26 #include <linux/delay.h>
27 #include <linux/seq_file.h>
28 #include <linux/jump_label.h>
29 #include <linux/pci.h>
30 #include <linux/printk.h>
31 #include <linux/lockdep.h>
32
33 #include <asm/isc.h>
34 #include <asm/airq.h>
35 #include <asm/facility.h>
36 #include <asm/pci_insn.h>
37 #include <asm/pci_clp.h>
38 #include <asm/pci_dma.h>
39
40 #include "pci_bus.h"
41 #include "pci_iov.h"
42
43 /* list of all detected zpci devices */
44 static LIST_HEAD(zpci_list);
45 static DEFINE_SPINLOCK(zpci_list_lock);
46
47 static DECLARE_BITMAP(zpci_domain, ZPCI_DOMAIN_BITMAP_SIZE);
48 static DEFINE_SPINLOCK(zpci_domain_lock);
49
50 #define ZPCI_IOMAP_ENTRIES \
51 min(((unsigned long) ZPCI_NR_DEVICES * PCI_STD_NUM_BARS / 2), \
52 ZPCI_IOMAP_MAX_ENTRIES)
53
54 unsigned int s390_pci_no_rid;
55
56 static DEFINE_SPINLOCK(zpci_iomap_lock);
57 static unsigned long *zpci_iomap_bitmap;
58 struct zpci_iomap_entry *zpci_iomap_start;
59 EXPORT_SYMBOL_GPL(zpci_iomap_start);
60
61 DEFINE_STATIC_KEY_FALSE(have_mio);
62
63 static struct kmem_cache *zdev_fmb_cache;
64
65 /* AEN structures that must be preserved over KVM module re-insertion */
66 union zpci_sic_iib *zpci_aipb;
67 EXPORT_SYMBOL_GPL(zpci_aipb);
68 struct airq_iv *zpci_aif_sbv;
69 EXPORT_SYMBOL_GPL(zpci_aif_sbv);
70
get_zdev_by_fid(u32 fid)71 struct zpci_dev *get_zdev_by_fid(u32 fid)
72 {
73 struct zpci_dev *tmp, *zdev = NULL;
74
75 spin_lock(&zpci_list_lock);
76 list_for_each_entry(tmp, &zpci_list, entry) {
77 if (tmp->fid == fid) {
78 zdev = tmp;
79 zpci_zdev_get(zdev);
80 break;
81 }
82 }
83 spin_unlock(&zpci_list_lock);
84 return zdev;
85 }
86
zpci_remove_reserved_devices(void)87 void zpci_remove_reserved_devices(void)
88 {
89 struct zpci_dev *tmp, *zdev;
90 enum zpci_state state;
91 LIST_HEAD(remove);
92
93 spin_lock(&zpci_list_lock);
94 list_for_each_entry_safe(zdev, tmp, &zpci_list, entry) {
95 if (zdev->state == ZPCI_FN_STATE_STANDBY &&
96 !clp_get_state(zdev->fid, &state) &&
97 state == ZPCI_FN_STATE_RESERVED)
98 list_move_tail(&zdev->entry, &remove);
99 }
100 spin_unlock(&zpci_list_lock);
101
102 list_for_each_entry_safe(zdev, tmp, &remove, entry)
103 zpci_device_reserved(zdev);
104 }
105
pci_domain_nr(struct pci_bus * bus)106 int pci_domain_nr(struct pci_bus *bus)
107 {
108 return ((struct zpci_bus *) bus->sysdata)->domain_nr;
109 }
110 EXPORT_SYMBOL_GPL(pci_domain_nr);
111
pci_proc_domain(struct pci_bus * bus)112 int pci_proc_domain(struct pci_bus *bus)
113 {
114 return pci_domain_nr(bus);
115 }
116 EXPORT_SYMBOL_GPL(pci_proc_domain);
117
118 /* Modify PCI: Register I/O address translation parameters */
zpci_register_ioat(struct zpci_dev * zdev,u8 dmaas,u64 base,u64 limit,u64 iota,u8 * status)119 int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
120 u64 base, u64 limit, u64 iota, u8 *status)
121 {
122 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_REG_IOAT);
123 struct zpci_fib fib = {0};
124 u8 cc;
125
126 WARN_ON_ONCE(iota & 0x3fff);
127 fib.pba = base;
128 /* Work around off by one in ISM virt device */
129 if (zdev->pft == PCI_FUNC_TYPE_ISM && limit > base)
130 fib.pal = limit + (1 << 12);
131 else
132 fib.pal = limit;
133 fib.iota = iota | ZPCI_IOTA_RTTO_FLAG;
134 fib.gd = zdev->gisa;
135 cc = zpci_mod_fc(req, &fib, status);
136 if (cc)
137 zpci_dbg(3, "reg ioat fid:%x, cc:%d, status:%d\n", zdev->fid, cc, *status);
138 return cc;
139 }
140 EXPORT_SYMBOL_GPL(zpci_register_ioat);
141
142 /* Modify PCI: Unregister I/O address translation parameters */
zpci_unregister_ioat(struct zpci_dev * zdev,u8 dmaas)143 int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
144 {
145 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_DEREG_IOAT);
146 struct zpci_fib fib = {0};
147 u8 cc, status;
148
149 fib.gd = zdev->gisa;
150
151 cc = zpci_mod_fc(req, &fib, &status);
152 if (cc)
153 zpci_dbg(3, "unreg ioat fid:%x, cc:%d, status:%d\n", zdev->fid, cc, status);
154 return cc;
155 }
156
157 /* Modify PCI: Set PCI function measurement parameters */
zpci_fmb_enable_device(struct zpci_dev * zdev)158 int zpci_fmb_enable_device(struct zpci_dev *zdev)
159 {
160 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
161 struct zpci_iommu_ctrs *ctrs;
162 struct zpci_fib fib = {0};
163 u8 cc, status;
164
165 if (zdev->fmb || sizeof(*zdev->fmb) < zdev->fmb_length)
166 return -EINVAL;
167
168 zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
169 if (!zdev->fmb)
170 return -ENOMEM;
171 WARN_ON((u64) zdev->fmb & 0xf);
172
173 /* reset software counters */
174 ctrs = zpci_get_iommu_ctrs(zdev);
175 if (ctrs) {
176 atomic64_set(&ctrs->mapped_pages, 0);
177 atomic64_set(&ctrs->unmapped_pages, 0);
178 atomic64_set(&ctrs->global_rpcits, 0);
179 atomic64_set(&ctrs->sync_map_rpcits, 0);
180 atomic64_set(&ctrs->sync_rpcits, 0);
181 }
182
183
184 fib.fmb_addr = virt_to_phys(zdev->fmb);
185 fib.gd = zdev->gisa;
186 cc = zpci_mod_fc(req, &fib, &status);
187 if (cc) {
188 kmem_cache_free(zdev_fmb_cache, zdev->fmb);
189 zdev->fmb = NULL;
190 }
191 return cc ? -EIO : 0;
192 }
193
194 /* Modify PCI: Disable PCI function measurement */
zpci_fmb_disable_device(struct zpci_dev * zdev)195 int zpci_fmb_disable_device(struct zpci_dev *zdev)
196 {
197 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
198 struct zpci_fib fib = {0};
199 u8 cc, status;
200
201 if (!zdev->fmb)
202 return -EINVAL;
203
204 fib.gd = zdev->gisa;
205
206 /* Function measurement is disabled if fmb address is zero */
207 cc = zpci_mod_fc(req, &fib, &status);
208 if (cc == 3) /* Function already gone. */
209 cc = 0;
210
211 if (!cc) {
212 kmem_cache_free(zdev_fmb_cache, zdev->fmb);
213 zdev->fmb = NULL;
214 }
215 return cc ? -EIO : 0;
216 }
217
zpci_cfg_load(struct zpci_dev * zdev,int offset,u32 * val,u8 len)218 static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
219 {
220 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
221 u64 data;
222 int rc;
223
224 rc = __zpci_load(&data, req, offset);
225 if (!rc) {
226 data = le64_to_cpu((__force __le64) data);
227 data >>= (8 - len) * 8;
228 *val = (u32) data;
229 } else
230 *val = 0xffffffff;
231 return rc;
232 }
233
zpci_cfg_store(struct zpci_dev * zdev,int offset,u32 val,u8 len)234 static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
235 {
236 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
237 u64 data = val;
238 int rc;
239
240 data <<= (8 - len) * 8;
241 data = (__force u64) cpu_to_le64(data);
242 rc = __zpci_store(data, req, offset);
243 return rc;
244 }
245
pcibios_align_resource(void * data,const struct resource * res,resource_size_t size,resource_size_t align)246 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
247 resource_size_t size,
248 resource_size_t align)
249 {
250 return 0;
251 }
252
ioremap_prot(phys_addr_t phys_addr,size_t size,unsigned long prot)253 void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size,
254 unsigned long prot)
255 {
256 /*
257 * When PCI MIO instructions are unavailable the "physical" address
258 * encodes a hint for accessing the PCI memory space it represents.
259 * Just pass it unchanged such that ioread/iowrite can decode it.
260 */
261 if (!static_branch_unlikely(&have_mio))
262 return (void __iomem *)phys_addr;
263
264 return generic_ioremap_prot(phys_addr, size, __pgprot(prot));
265 }
266 EXPORT_SYMBOL(ioremap_prot);
267
iounmap(volatile void __iomem * addr)268 void iounmap(volatile void __iomem *addr)
269 {
270 if (static_branch_likely(&have_mio))
271 generic_iounmap(addr);
272 }
273 EXPORT_SYMBOL(iounmap);
274
275 /* Create a virtual mapping cookie for a PCI BAR */
pci_iomap_range_fh(struct pci_dev * pdev,int bar,unsigned long offset,unsigned long max)276 static void __iomem *pci_iomap_range_fh(struct pci_dev *pdev, int bar,
277 unsigned long offset, unsigned long max)
278 {
279 struct zpci_dev *zdev = to_zpci(pdev);
280 int idx;
281
282 idx = zdev->bars[bar].map_idx;
283 spin_lock(&zpci_iomap_lock);
284 /* Detect overrun */
285 WARN_ON(!++zpci_iomap_start[idx].count);
286 zpci_iomap_start[idx].fh = zdev->fh;
287 zpci_iomap_start[idx].bar = bar;
288 spin_unlock(&zpci_iomap_lock);
289
290 return (void __iomem *) ZPCI_ADDR(idx) + offset;
291 }
292
pci_iomap_range_mio(struct pci_dev * pdev,int bar,unsigned long offset,unsigned long max)293 static void __iomem *pci_iomap_range_mio(struct pci_dev *pdev, int bar,
294 unsigned long offset,
295 unsigned long max)
296 {
297 unsigned long barsize = pci_resource_len(pdev, bar);
298 struct zpci_dev *zdev = to_zpci(pdev);
299 void __iomem *iova;
300
301 iova = ioremap((unsigned long) zdev->bars[bar].mio_wt, barsize);
302 return iova ? iova + offset : iova;
303 }
304
pci_iomap_range(struct pci_dev * pdev,int bar,unsigned long offset,unsigned long max)305 void __iomem *pci_iomap_range(struct pci_dev *pdev, int bar,
306 unsigned long offset, unsigned long max)
307 {
308 if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
309 return NULL;
310
311 if (static_branch_likely(&have_mio))
312 return pci_iomap_range_mio(pdev, bar, offset, max);
313 else
314 return pci_iomap_range_fh(pdev, bar, offset, max);
315 }
316 EXPORT_SYMBOL(pci_iomap_range);
317
pci_iomap(struct pci_dev * dev,int bar,unsigned long maxlen)318 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
319 {
320 return pci_iomap_range(dev, bar, 0, maxlen);
321 }
322 EXPORT_SYMBOL(pci_iomap);
323
pci_iomap_wc_range_mio(struct pci_dev * pdev,int bar,unsigned long offset,unsigned long max)324 static void __iomem *pci_iomap_wc_range_mio(struct pci_dev *pdev, int bar,
325 unsigned long offset, unsigned long max)
326 {
327 unsigned long barsize = pci_resource_len(pdev, bar);
328 struct zpci_dev *zdev = to_zpci(pdev);
329 void __iomem *iova;
330
331 iova = ioremap((unsigned long) zdev->bars[bar].mio_wb, barsize);
332 return iova ? iova + offset : iova;
333 }
334
pci_iomap_wc_range(struct pci_dev * pdev,int bar,unsigned long offset,unsigned long max)335 void __iomem *pci_iomap_wc_range(struct pci_dev *pdev, int bar,
336 unsigned long offset, unsigned long max)
337 {
338 if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
339 return NULL;
340
341 if (static_branch_likely(&have_mio))
342 return pci_iomap_wc_range_mio(pdev, bar, offset, max);
343 else
344 return pci_iomap_range_fh(pdev, bar, offset, max);
345 }
346 EXPORT_SYMBOL(pci_iomap_wc_range);
347
pci_iomap_wc(struct pci_dev * dev,int bar,unsigned long maxlen)348 void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
349 {
350 return pci_iomap_wc_range(dev, bar, 0, maxlen);
351 }
352 EXPORT_SYMBOL(pci_iomap_wc);
353
pci_iounmap_fh(struct pci_dev * pdev,void __iomem * addr)354 static void pci_iounmap_fh(struct pci_dev *pdev, void __iomem *addr)
355 {
356 unsigned int idx = ZPCI_IDX(addr);
357
358 spin_lock(&zpci_iomap_lock);
359 /* Detect underrun */
360 WARN_ON(!zpci_iomap_start[idx].count);
361 if (!--zpci_iomap_start[idx].count) {
362 zpci_iomap_start[idx].fh = 0;
363 zpci_iomap_start[idx].bar = 0;
364 }
365 spin_unlock(&zpci_iomap_lock);
366 }
367
pci_iounmap_mio(struct pci_dev * pdev,void __iomem * addr)368 static void pci_iounmap_mio(struct pci_dev *pdev, void __iomem *addr)
369 {
370 iounmap(addr);
371 }
372
pci_iounmap(struct pci_dev * pdev,void __iomem * addr)373 void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
374 {
375 if (static_branch_likely(&have_mio))
376 pci_iounmap_mio(pdev, addr);
377 else
378 pci_iounmap_fh(pdev, addr);
379 }
380 EXPORT_SYMBOL(pci_iounmap);
381
pci_read(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 * val)382 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
383 int size, u32 *val)
384 {
385 struct zpci_dev *zdev = zdev_from_bus(bus, devfn);
386
387 return (zdev) ? zpci_cfg_load(zdev, where, val, size) : -ENODEV;
388 }
389
pci_write(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 val)390 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
391 int size, u32 val)
392 {
393 struct zpci_dev *zdev = zdev_from_bus(bus, devfn);
394
395 return (zdev) ? zpci_cfg_store(zdev, where, val, size) : -ENODEV;
396 }
397
398 static struct pci_ops pci_root_ops = {
399 .read = pci_read,
400 .write = pci_write,
401 };
402
zpci_map_resources(struct pci_dev * pdev)403 static void zpci_map_resources(struct pci_dev *pdev)
404 {
405 struct zpci_dev *zdev = to_zpci(pdev);
406 resource_size_t len;
407 int i;
408
409 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
410 len = pci_resource_len(pdev, i);
411 if (!len)
412 continue;
413
414 if (zpci_use_mio(zdev))
415 pdev->resource[i].start =
416 (resource_size_t __force) zdev->bars[i].mio_wt;
417 else
418 pdev->resource[i].start = (resource_size_t __force)
419 pci_iomap_range_fh(pdev, i, 0, 0);
420 pdev->resource[i].end = pdev->resource[i].start + len - 1;
421 }
422
423 zpci_iov_map_resources(pdev);
424 }
425
zpci_unmap_resources(struct pci_dev * pdev)426 static void zpci_unmap_resources(struct pci_dev *pdev)
427 {
428 struct zpci_dev *zdev = to_zpci(pdev);
429 resource_size_t len;
430 int i;
431
432 if (zpci_use_mio(zdev))
433 return;
434
435 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
436 len = pci_resource_len(pdev, i);
437 if (!len)
438 continue;
439 pci_iounmap_fh(pdev, (void __iomem __force *)
440 pdev->resource[i].start);
441 }
442 }
443
zpci_alloc_iomap(struct zpci_dev * zdev)444 static int zpci_alloc_iomap(struct zpci_dev *zdev)
445 {
446 unsigned long entry;
447
448 spin_lock(&zpci_iomap_lock);
449 entry = find_first_zero_bit(zpci_iomap_bitmap, ZPCI_IOMAP_ENTRIES);
450 if (entry == ZPCI_IOMAP_ENTRIES) {
451 spin_unlock(&zpci_iomap_lock);
452 return -ENOSPC;
453 }
454 set_bit(entry, zpci_iomap_bitmap);
455 spin_unlock(&zpci_iomap_lock);
456 return entry;
457 }
458
zpci_free_iomap(struct zpci_dev * zdev,int entry)459 static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
460 {
461 spin_lock(&zpci_iomap_lock);
462 memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
463 clear_bit(entry, zpci_iomap_bitmap);
464 spin_unlock(&zpci_iomap_lock);
465 }
466
zpci_do_update_iomap_fh(struct zpci_dev * zdev,u32 fh)467 static void zpci_do_update_iomap_fh(struct zpci_dev *zdev, u32 fh)
468 {
469 int bar, idx;
470
471 spin_lock(&zpci_iomap_lock);
472 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
473 if (!zdev->bars[bar].size)
474 continue;
475 idx = zdev->bars[bar].map_idx;
476 if (!zpci_iomap_start[idx].count)
477 continue;
478 WRITE_ONCE(zpci_iomap_start[idx].fh, zdev->fh);
479 }
480 spin_unlock(&zpci_iomap_lock);
481 }
482
zpci_update_fh(struct zpci_dev * zdev,u32 fh)483 void zpci_update_fh(struct zpci_dev *zdev, u32 fh)
484 {
485 if (!fh || zdev->fh == fh)
486 return;
487
488 zdev->fh = fh;
489 if (zpci_use_mio(zdev))
490 return;
491 if (zdev->has_resources && zdev_enabled(zdev))
492 zpci_do_update_iomap_fh(zdev, fh);
493 }
494
__alloc_res(struct zpci_dev * zdev,unsigned long start,unsigned long size,unsigned long flags)495 static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
496 unsigned long size, unsigned long flags)
497 {
498 struct resource *r;
499
500 r = kzalloc(sizeof(*r), GFP_KERNEL);
501 if (!r)
502 return NULL;
503
504 r->start = start;
505 r->end = r->start + size - 1;
506 r->flags = flags;
507 r->name = zdev->res_name;
508
509 if (request_resource(&iomem_resource, r)) {
510 kfree(r);
511 return NULL;
512 }
513 return r;
514 }
515
zpci_setup_bus_resources(struct zpci_dev * zdev)516 int zpci_setup_bus_resources(struct zpci_dev *zdev)
517 {
518 unsigned long addr, size, flags;
519 struct resource *res;
520 int i, entry;
521
522 snprintf(zdev->res_name, sizeof(zdev->res_name),
523 "PCI Bus %04x:%02x", zdev->uid, ZPCI_BUS_NR);
524
525 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
526 if (!zdev->bars[i].size)
527 continue;
528 entry = zpci_alloc_iomap(zdev);
529 if (entry < 0)
530 return entry;
531 zdev->bars[i].map_idx = entry;
532
533 /* only MMIO is supported */
534 flags = IORESOURCE_MEM;
535 if (zdev->bars[i].val & 8)
536 flags |= IORESOURCE_PREFETCH;
537 if (zdev->bars[i].val & 4)
538 flags |= IORESOURCE_MEM_64;
539
540 if (zpci_use_mio(zdev))
541 addr = (unsigned long) zdev->bars[i].mio_wt;
542 else
543 addr = ZPCI_ADDR(entry);
544 size = 1UL << zdev->bars[i].size;
545
546 res = __alloc_res(zdev, addr, size, flags);
547 if (!res) {
548 zpci_free_iomap(zdev, entry);
549 return -ENOMEM;
550 }
551 zdev->bars[i].res = res;
552 }
553 zdev->has_resources = 1;
554
555 return 0;
556 }
557
zpci_cleanup_bus_resources(struct zpci_dev * zdev)558 static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
559 {
560 struct resource *res;
561 int i;
562
563 pci_lock_rescan_remove();
564 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
565 res = zdev->bars[i].res;
566 if (!res)
567 continue;
568
569 release_resource(res);
570 pci_bus_remove_resource(zdev->zbus->bus, res);
571 zpci_free_iomap(zdev, zdev->bars[i].map_idx);
572 zdev->bars[i].res = NULL;
573 kfree(res);
574 }
575 zdev->has_resources = 0;
576 pci_unlock_rescan_remove();
577 }
578
pcibios_device_add(struct pci_dev * pdev)579 int pcibios_device_add(struct pci_dev *pdev)
580 {
581 struct zpci_dev *zdev = to_zpci(pdev);
582 struct resource *res;
583 int i;
584
585 /* The pdev has a reference to the zdev via its bus */
586 zpci_zdev_get(zdev);
587 if (pdev->is_physfn)
588 pdev->no_vf_scan = 1;
589
590 pdev->dev.groups = zpci_attr_groups;
591 zpci_map_resources(pdev);
592
593 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
594 res = &pdev->resource[i];
595 if (res->parent || !res->flags)
596 continue;
597 pci_claim_resource(pdev, i);
598 }
599
600 return 0;
601 }
602
pcibios_release_device(struct pci_dev * pdev)603 void pcibios_release_device(struct pci_dev *pdev)
604 {
605 struct zpci_dev *zdev = to_zpci(pdev);
606
607 zpci_unmap_resources(pdev);
608 zpci_zdev_put(zdev);
609 }
610
pcibios_enable_device(struct pci_dev * pdev,int mask)611 int pcibios_enable_device(struct pci_dev *pdev, int mask)
612 {
613 struct zpci_dev *zdev = to_zpci(pdev);
614
615 zpci_debug_init_device(zdev, dev_name(&pdev->dev));
616 zpci_fmb_enable_device(zdev);
617
618 return pci_enable_resources(pdev, mask);
619 }
620
pcibios_disable_device(struct pci_dev * pdev)621 void pcibios_disable_device(struct pci_dev *pdev)
622 {
623 struct zpci_dev *zdev = to_zpci(pdev);
624
625 zpci_fmb_disable_device(zdev);
626 zpci_debug_exit_device(zdev);
627 }
628
__zpci_register_domain(int domain)629 static int __zpci_register_domain(int domain)
630 {
631 spin_lock(&zpci_domain_lock);
632 if (test_bit(domain, zpci_domain)) {
633 spin_unlock(&zpci_domain_lock);
634 pr_err("Domain %04x is already assigned\n", domain);
635 return -EEXIST;
636 }
637 set_bit(domain, zpci_domain);
638 spin_unlock(&zpci_domain_lock);
639 return domain;
640 }
641
__zpci_alloc_domain(void)642 static int __zpci_alloc_domain(void)
643 {
644 int domain;
645
646 spin_lock(&zpci_domain_lock);
647 /*
648 * We can always auto allocate domains below ZPCI_NR_DEVICES.
649 * There is either a free domain or we have reached the maximum in
650 * which case we would have bailed earlier.
651 */
652 domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
653 set_bit(domain, zpci_domain);
654 spin_unlock(&zpci_domain_lock);
655 return domain;
656 }
657
zpci_alloc_domain(int domain)658 int zpci_alloc_domain(int domain)
659 {
660 if (zpci_unique_uid) {
661 if (domain)
662 return __zpci_register_domain(domain);
663 pr_warn("UID checking was active but no UID is provided: switching to automatic domain allocation\n");
664 update_uid_checking(false);
665 }
666 return __zpci_alloc_domain();
667 }
668
zpci_free_domain(int domain)669 void zpci_free_domain(int domain)
670 {
671 spin_lock(&zpci_domain_lock);
672 clear_bit(domain, zpci_domain);
673 spin_unlock(&zpci_domain_lock);
674 }
675
676
zpci_enable_device(struct zpci_dev * zdev)677 int zpci_enable_device(struct zpci_dev *zdev)
678 {
679 u32 fh = zdev->fh;
680 int rc = 0;
681
682 if (clp_enable_fh(zdev, &fh, ZPCI_NR_DMA_SPACES))
683 rc = -EIO;
684 else
685 zpci_update_fh(zdev, fh);
686 return rc;
687 }
688 EXPORT_SYMBOL_GPL(zpci_enable_device);
689
zpci_disable_device(struct zpci_dev * zdev)690 int zpci_disable_device(struct zpci_dev *zdev)
691 {
692 u32 fh = zdev->fh;
693 int cc, rc = 0;
694
695 cc = clp_disable_fh(zdev, &fh);
696 if (!cc) {
697 zpci_update_fh(zdev, fh);
698 } else if (cc == CLP_RC_SETPCIFN_ALRDY) {
699 pr_info("Disabling PCI function %08x had no effect as it was already disabled\n",
700 zdev->fid);
701 /* Function is already disabled - update handle */
702 rc = clp_refresh_fh(zdev->fid, &fh);
703 if (!rc) {
704 zpci_update_fh(zdev, fh);
705 rc = -EINVAL;
706 }
707 } else {
708 rc = -EIO;
709 }
710 return rc;
711 }
712 EXPORT_SYMBOL_GPL(zpci_disable_device);
713
714 /**
715 * zpci_hot_reset_device - perform a reset of the given zPCI function
716 * @zdev: the slot which should be reset
717 *
718 * Performs a low level reset of the zPCI function. The reset is low level in
719 * the sense that the zPCI function can be reset without detaching it from the
720 * common PCI subsystem. The reset may be performed while under control of
721 * either DMA or IOMMU APIs in which case the existing DMA/IOMMU translation
722 * table is reinstated at the end of the reset.
723 *
724 * After the reset the functions internal state is reset to an initial state
725 * equivalent to its state during boot when first probing a driver.
726 * Consequently after reset the PCI function requires re-initialization via the
727 * common PCI code including re-enabling IRQs via pci_alloc_irq_vectors()
728 * and enabling the function via e.g. pci_enable_device_flags(). The caller
729 * must guard against concurrent reset attempts.
730 *
731 * In most cases this function should not be called directly but through
732 * pci_reset_function() or pci_reset_bus() which handle the save/restore and
733 * locking - asserted by lockdep.
734 *
735 * Return: 0 on success and an error value otherwise
736 */
zpci_hot_reset_device(struct zpci_dev * zdev)737 int zpci_hot_reset_device(struct zpci_dev *zdev)
738 {
739 u8 status;
740 int rc;
741
742 lockdep_assert_held(&zdev->state_lock);
743 zpci_dbg(3, "rst fid:%x, fh:%x\n", zdev->fid, zdev->fh);
744 if (zdev_enabled(zdev)) {
745 /* Disables device access, DMAs and IRQs (reset state) */
746 rc = zpci_disable_device(zdev);
747 /*
748 * Due to a z/VM vs LPAR inconsistency in the error state the
749 * FH may indicate an enabled device but disable says the
750 * device is already disabled don't treat it as an error here.
751 */
752 if (rc == -EINVAL)
753 rc = 0;
754 if (rc)
755 return rc;
756 }
757
758 rc = zpci_enable_device(zdev);
759 if (rc)
760 return rc;
761
762 if (zdev->dma_table)
763 rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
764 virt_to_phys(zdev->dma_table), &status);
765 if (rc) {
766 zpci_disable_device(zdev);
767 return rc;
768 }
769
770 return 0;
771 }
772
773 /**
774 * zpci_create_device() - Create a new zpci_dev and add it to the zbus
775 * @fid: Function ID of the device to be created
776 * @fh: Current Function Handle of the device to be created
777 * @state: Initial state after creation either Standby or Configured
778 *
779 * Creates a new zpci device and adds it to its, possibly newly created, zbus
780 * as well as zpci_list.
781 *
782 * Returns: the zdev on success or an error pointer otherwise
783 */
zpci_create_device(u32 fid,u32 fh,enum zpci_state state)784 struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state)
785 {
786 struct zpci_dev *zdev;
787 int rc;
788
789 zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", fid, fh, state);
790 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
791 if (!zdev)
792 return ERR_PTR(-ENOMEM);
793
794 /* FID and Function Handle are the static/dynamic identifiers */
795 zdev->fid = fid;
796 zdev->fh = fh;
797
798 /* Query function properties and update zdev */
799 rc = clp_query_pci_fn(zdev);
800 if (rc)
801 goto error;
802 zdev->state = state;
803
804 kref_init(&zdev->kref);
805 mutex_init(&zdev->state_lock);
806 mutex_init(&zdev->fmb_lock);
807 mutex_init(&zdev->kzdev_lock);
808
809 rc = zpci_init_iommu(zdev);
810 if (rc)
811 goto error;
812
813 rc = zpci_bus_device_register(zdev, &pci_root_ops);
814 if (rc)
815 goto error_destroy_iommu;
816
817 spin_lock(&zpci_list_lock);
818 list_add_tail(&zdev->entry, &zpci_list);
819 spin_unlock(&zpci_list_lock);
820
821 return zdev;
822
823 error_destroy_iommu:
824 zpci_destroy_iommu(zdev);
825 error:
826 zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
827 kfree(zdev);
828 return ERR_PTR(rc);
829 }
830
zpci_is_device_configured(struct zpci_dev * zdev)831 bool zpci_is_device_configured(struct zpci_dev *zdev)
832 {
833 enum zpci_state state = zdev->state;
834
835 return state != ZPCI_FN_STATE_RESERVED &&
836 state != ZPCI_FN_STATE_STANDBY;
837 }
838
839 /**
840 * zpci_scan_configured_device() - Scan a freshly configured zpci_dev
841 * @zdev: The zpci_dev to be configured
842 * @fh: The general function handle supplied by the platform
843 *
844 * Given a device in the configuration state Configured, enables, scans and
845 * adds it to the common code PCI subsystem if possible. If any failure occurs,
846 * the zpci_dev is left disabled.
847 *
848 * Return: 0 on success, or an error code otherwise
849 */
zpci_scan_configured_device(struct zpci_dev * zdev,u32 fh)850 int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh)
851 {
852 zpci_update_fh(zdev, fh);
853 return zpci_bus_scan_device(zdev);
854 }
855
856 /**
857 * zpci_deconfigure_device() - Deconfigure a zpci_dev
858 * @zdev: The zpci_dev to configure
859 *
860 * Deconfigure a zPCI function that is currently configured and possibly known
861 * to the common code PCI subsystem.
862 * If any failure occurs the device is left as is.
863 *
864 * Return: 0 on success, or an error code otherwise
865 */
zpci_deconfigure_device(struct zpci_dev * zdev)866 int zpci_deconfigure_device(struct zpci_dev *zdev)
867 {
868 int rc;
869
870 lockdep_assert_held(&zdev->state_lock);
871 if (zdev->state != ZPCI_FN_STATE_CONFIGURED)
872 return 0;
873
874 if (zdev->zbus->bus)
875 zpci_bus_remove_device(zdev, false);
876
877 if (zdev_enabled(zdev)) {
878 rc = zpci_disable_device(zdev);
879 if (rc)
880 return rc;
881 }
882
883 rc = sclp_pci_deconfigure(zdev->fid);
884 zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, rc);
885 if (rc)
886 return rc;
887 zdev->state = ZPCI_FN_STATE_STANDBY;
888
889 return 0;
890 }
891
892 /**
893 * zpci_device_reserved() - Mark device as reserved
894 * @zdev: the zpci_dev that was reserved
895 *
896 * Handle the case that a given zPCI function was reserved by another system.
897 * After a call to this function the zpci_dev can not be found via
898 * get_zdev_by_fid() anymore but may still be accessible via existing
899 * references though it will not be functional anymore.
900 */
zpci_device_reserved(struct zpci_dev * zdev)901 void zpci_device_reserved(struct zpci_dev *zdev)
902 {
903 /*
904 * Remove device from zpci_list as it is going away. This also
905 * makes sure we ignore subsequent zPCI events for this device.
906 */
907 spin_lock(&zpci_list_lock);
908 list_del(&zdev->entry);
909 spin_unlock(&zpci_list_lock);
910 zdev->state = ZPCI_FN_STATE_RESERVED;
911 zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
912 zpci_zdev_put(zdev);
913 }
914
zpci_release_device(struct kref * kref)915 void zpci_release_device(struct kref *kref)
916 {
917 struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);
918 int ret;
919
920 if (zdev->has_hp_slot)
921 zpci_exit_slot(zdev);
922
923 if (zdev->zbus->bus)
924 zpci_bus_remove_device(zdev, false);
925
926 if (zdev_enabled(zdev))
927 zpci_disable_device(zdev);
928
929 switch (zdev->state) {
930 case ZPCI_FN_STATE_CONFIGURED:
931 ret = sclp_pci_deconfigure(zdev->fid);
932 zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, ret);
933 fallthrough;
934 case ZPCI_FN_STATE_STANDBY:
935 if (zdev->has_hp_slot)
936 zpci_exit_slot(zdev);
937 spin_lock(&zpci_list_lock);
938 list_del(&zdev->entry);
939 spin_unlock(&zpci_list_lock);
940 zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
941 fallthrough;
942 case ZPCI_FN_STATE_RESERVED:
943 if (zdev->has_resources)
944 zpci_cleanup_bus_resources(zdev);
945 zpci_bus_device_unregister(zdev);
946 zpci_destroy_iommu(zdev);
947 fallthrough;
948 default:
949 break;
950 }
951 zpci_dbg(3, "rem fid:%x\n", zdev->fid);
952 kfree_rcu(zdev, rcu);
953 }
954
zpci_report_error(struct pci_dev * pdev,struct zpci_report_error_header * report)955 int zpci_report_error(struct pci_dev *pdev,
956 struct zpci_report_error_header *report)
957 {
958 struct zpci_dev *zdev = to_zpci(pdev);
959
960 return sclp_pci_report(report, zdev->fh, zdev->fid);
961 }
962 EXPORT_SYMBOL(zpci_report_error);
963
964 /**
965 * zpci_clear_error_state() - Clears the zPCI error state of the device
966 * @zdev: The zdev for which the zPCI error state should be reset
967 *
968 * Clear the zPCI error state of the device. If clearing the zPCI error state
969 * fails the device is left in the error state. In this case it may make sense
970 * to call zpci_io_perm_failure() on the associated pdev if it exists.
971 *
972 * Returns: 0 on success, -EIO otherwise
973 */
zpci_clear_error_state(struct zpci_dev * zdev)974 int zpci_clear_error_state(struct zpci_dev *zdev)
975 {
976 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_RESET_ERROR);
977 struct zpci_fib fib = {0};
978 u8 status;
979 int cc;
980
981 cc = zpci_mod_fc(req, &fib, &status);
982 if (cc) {
983 zpci_dbg(3, "ces fid:%x, cc:%d, status:%x\n", zdev->fid, cc, status);
984 return -EIO;
985 }
986
987 return 0;
988 }
989
990 /**
991 * zpci_reset_load_store_blocked() - Re-enables L/S from error state
992 * @zdev: The zdev for which to unblock load/store access
993 *
994 * Re-enables load/store access for a PCI function in the error state while
995 * keeping DMA blocked. In this state drivers can poke MMIO space to determine
996 * if error recovery is possible while catching any rogue DMA access from the
997 * device.
998 *
999 * Returns: 0 on success, -EIO otherwise
1000 */
zpci_reset_load_store_blocked(struct zpci_dev * zdev)1001 int zpci_reset_load_store_blocked(struct zpci_dev *zdev)
1002 {
1003 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_RESET_BLOCK);
1004 struct zpci_fib fib = {0};
1005 u8 status;
1006 int cc;
1007
1008 cc = zpci_mod_fc(req, &fib, &status);
1009 if (cc) {
1010 zpci_dbg(3, "rls fid:%x, cc:%d, status:%x\n", zdev->fid, cc, status);
1011 return -EIO;
1012 }
1013
1014 return 0;
1015 }
1016
zpci_mem_init(void)1017 static int zpci_mem_init(void)
1018 {
1019 BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
1020 __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
1021
1022 zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
1023 __alignof__(struct zpci_fmb), 0, NULL);
1024 if (!zdev_fmb_cache)
1025 goto error_fmb;
1026
1027 zpci_iomap_start = kcalloc(ZPCI_IOMAP_ENTRIES,
1028 sizeof(*zpci_iomap_start), GFP_KERNEL);
1029 if (!zpci_iomap_start)
1030 goto error_iomap;
1031
1032 zpci_iomap_bitmap = kcalloc(BITS_TO_LONGS(ZPCI_IOMAP_ENTRIES),
1033 sizeof(*zpci_iomap_bitmap), GFP_KERNEL);
1034 if (!zpci_iomap_bitmap)
1035 goto error_iomap_bitmap;
1036
1037 if (static_branch_likely(&have_mio))
1038 clp_setup_writeback_mio();
1039
1040 return 0;
1041 error_iomap_bitmap:
1042 kfree(zpci_iomap_start);
1043 error_iomap:
1044 kmem_cache_destroy(zdev_fmb_cache);
1045 error_fmb:
1046 return -ENOMEM;
1047 }
1048
zpci_mem_exit(void)1049 static void zpci_mem_exit(void)
1050 {
1051 kfree(zpci_iomap_bitmap);
1052 kfree(zpci_iomap_start);
1053 kmem_cache_destroy(zdev_fmb_cache);
1054 }
1055
1056 static unsigned int s390_pci_probe __initdata = 1;
1057 unsigned int s390_pci_force_floating __initdata;
1058 static unsigned int s390_pci_initialized;
1059
pcibios_setup(char * str)1060 char * __init pcibios_setup(char *str)
1061 {
1062 if (!strcmp(str, "off")) {
1063 s390_pci_probe = 0;
1064 return NULL;
1065 }
1066 if (!strcmp(str, "nomio")) {
1067 get_lowcore()->machine_flags &= ~MACHINE_FLAG_PCI_MIO;
1068 return NULL;
1069 }
1070 if (!strcmp(str, "force_floating")) {
1071 s390_pci_force_floating = 1;
1072 return NULL;
1073 }
1074 if (!strcmp(str, "norid")) {
1075 s390_pci_no_rid = 1;
1076 return NULL;
1077 }
1078 return str;
1079 }
1080
zpci_is_enabled(void)1081 bool zpci_is_enabled(void)
1082 {
1083 return s390_pci_initialized;
1084 }
1085
pci_base_init(void)1086 static int __init pci_base_init(void)
1087 {
1088 int rc;
1089
1090 if (!s390_pci_probe)
1091 return 0;
1092
1093 if (!test_facility(69) || !test_facility(71)) {
1094 pr_info("PCI is not supported because CPU facilities 69 or 71 are not available\n");
1095 return 0;
1096 }
1097
1098 if (MACHINE_HAS_PCI_MIO) {
1099 static_branch_enable(&have_mio);
1100 system_ctl_set_bit(2, CR2_MIO_ADDRESSING_BIT);
1101 }
1102
1103 rc = zpci_debug_init();
1104 if (rc)
1105 goto out;
1106
1107 rc = zpci_mem_init();
1108 if (rc)
1109 goto out_mem;
1110
1111 rc = zpci_irq_init();
1112 if (rc)
1113 goto out_irq;
1114
1115 rc = clp_scan_pci_devices();
1116 if (rc)
1117 goto out_find;
1118 zpci_bus_scan_busses();
1119
1120 s390_pci_initialized = 1;
1121 return 0;
1122
1123 out_find:
1124 zpci_irq_exit();
1125 out_irq:
1126 zpci_mem_exit();
1127 out_mem:
1128 zpci_debug_exit();
1129 out:
1130 return rc;
1131 }
1132 subsys_initcall_sync(pci_base_init);
1133