1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device tree for the Tolino Shine 2 HD ebook reader 4 * 5 * Name on mainboard is: 37NB-E60QF0+4A2 or 37NB-E60QF0+4A3 6 * Serials start with: E60QF2 7 * 8 * Copyright 2020 Andreas Kemnade 9 */ 10 11/dts-v1/; 12 13#include <dt-bindings/input/input.h> 14#include <dt-bindings/gpio/gpio.h> 15#include "imx6sl.dtsi" 16 17/ { 18 model = "Tolino Shine 2 HD"; 19 compatible = "kobo,tolino-shine2hd", "fsl,imx6sl"; 20 21 backlight { 22 compatible = "pwm-backlight"; 23 pwms = <&ec 0 50000>; 24 power-supply = <&backlight_regulator>; 25 }; 26 27 backlight_regulator: regulator-backlight { 28 compatible = "regulator-fixed"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_backlight_power>; 31 regulator-name = "backlight"; 32 gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>; 33 enable-active-high; 34 }; 35 36 chosen { 37 stdout-path = &uart1; 38 }; 39 40 epd_pmic_supply: regulator-epd-pmic-in { 41 compatible = "regulator-fixed"; 42 pinctrl-names = "default"; 43 pinctrl-0 = <&pinctrl_epd_pmic_supply>; 44 regulator-name = "epd_pmic_supply"; 45 gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>; 46 enable-active-high; 47 startup-delay-us = <20000>; 48 }; 49 50 gpio_keys: gpio-keys { 51 compatible = "gpio-keys"; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_gpio_keys>; 54 55 key-cover { 56 label = "Cover"; 57 gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; 58 linux,code = <SW_LID>; 59 linux,input-type = <EV_SW>; 60 wakeup-source; 61 }; 62 63 key-fl { 64 label = "Frontlight"; 65 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; 66 linux,code = <KEY_BRIGHTNESS_CYCLE>; 67 }; 68 69 key-home { 70 label = "Home"; 71 gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 72 linux,code = <KEY_HOME>; 73 }; 74 75 key-power { 76 label = "Power"; 77 gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; 78 linux,code = <KEY_POWER>; 79 wakeup-source; 80 }; 81 }; 82 83 leds: leds { 84 compatible = "gpio-leds"; 85 pinctrl-names = "default"; 86 pinctrl-0 = <&pinctrl_led>; 87 88 led-0 { 89 label = "tolinoshine2hd:white:on"; 90 gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 91 linux,default-trigger = "timer"; 92 }; 93 94 led-1 { 95 label = "tolinoshine2hd:white:backlightboost"; 96 gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; 97 linux,default-trigger = "none"; 98 }; 99 }; 100 101 memory@80000000 { 102 device_type = "memory"; 103 reg = <0x80000000 0x20000000>; 104 }; 105 106 reg_wifi: regulator-wifi { 107 compatible = "regulator-fixed"; 108 pinctrl-names = "default"; 109 pinctrl-0 = <&pinctrl_wifi_power>; 110 regulator-name = "SD3_SPWR"; 111 regulator-min-microvolt = <3000000>; 112 regulator-max-microvolt = <3000000>; 113 gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; 114 }; 115 116 wifi_pwrseq: wifi_pwrseq { 117 compatible = "mmc-pwrseq-simple"; 118 pinctrl-names = "default"; 119 pinctrl-0 = <&pinctrl_wifi_reset>; 120 post-power-on-delay-ms = <20>; 121 reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 122 }; 123}; 124 125&i2c1 { 126 pinctrl-names = "default","sleep"; 127 pinctrl-0 = <&pinctrl_i2c1>; 128 pinctrl-1 = <&pinctrl_i2c1_sleep>; 129 status = "okay"; 130 131 ec: embedded-controller@43 { 132 compatible = "netronix,ntxec"; 133 reg = <0x43>; 134 #pwm-cells = <2>; 135 }; 136}; 137 138&i2c2 { 139 pinctrl-names = "default","sleep"; 140 pinctrl-0 = <&pinctrl_i2c2>; 141 pinctrl-1 = <&pinctrl_i2c2_sleep>; 142 clock-frequency = <100000>; 143 status = "okay"; 144 145 zforce: touchscreen@50 { 146 compatible = "neonode,zforce"; 147 pinctrl-names = "default"; 148 pinctrl-0 = <&pinctrl_zforce>; 149 reg = <0x50>; 150 interrupt-parent = <&gpio5>; 151 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 152 vdd-supply = <&ldo1_reg>; 153 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 154 touchscreen-size-x = <1072>; 155 touchscreen-size-y = <1448>; 156 touchscreen-swapped-x-y; 157 touchscreen-inverted-x; 158 }; 159 160 tps65185: pmic@68 { 161 compatible = "ti,tps65185"; 162 pinctrl-names = "default"; 163 pinctrl-0 = <&pinctrl_tps65185_gpio>; 164 reg = <0x68>; 165 interrupt-parent = <&gpio2>; 166 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 167 vin-supply = <&epd_pmic_supply>; 168 pwr-good-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; 169 vcom-ctrl-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; 170 wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; 171 enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; 172 173 regulators { 174 vcom_reg: vcom { 175 regulator-name = "vcom"; 176 }; 177 178 vposneg_reg: vposneg { 179 regulator-name = "vposneg"; 180 regulator-min-microvolt = <15000000>; 181 regulator-max-microvolt = <15000000>; 182 }; 183 184 v3p3_reg: v3p3 { 185 regulator-name = "v3p3"; 186 }; 187 }; 188 }; 189}; 190 191&i2c3 { 192 pinctrl-names = "default"; 193 pinctrl-0 = <&pinctrl_i2c3>; 194 clock-frequency = <400000>; 195 status = "okay"; 196 197 ricoh619: pmic@32 { 198 compatible = "ricoh,rc5t619"; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&pinctrl_ricoh_gpio>; 201 reg = <0x32>; 202 interrupt-parent = <&gpio5>; 203 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 204 system-power-controller; 205 206 regulators { 207 dcdc1_reg: DCDC1 { 208 regulator-name = "DCDC1"; 209 regulator-min-microvolt = <300000>; 210 regulator-max-microvolt = <1875000>; 211 regulator-always-on; 212 regulator-boot-on; 213 214 regulator-state-mem { 215 regulator-on-in-suspend; 216 regulator-suspend-max-microvolt = <900000>; 217 regulator-suspend-min-microvolt = <900000>; 218 }; 219 }; 220 221 /* Core3_3V3 */ 222 dcdc2_reg: DCDC2 { 223 regulator-name = "DCDC2"; 224 regulator-always-on; 225 regulator-boot-on; 226 227 regulator-state-mem { 228 regulator-on-in-suspend; 229 regulator-suspend-max-microvolt = <3100000>; 230 regulator-suspend-min-microvolt = <3100000>; 231 }; 232 }; 233 234 dcdc3_reg: DCDC3 { 235 regulator-name = "DCDC3"; 236 regulator-min-microvolt = <300000>; 237 regulator-max-microvolt = <1875000>; 238 regulator-always-on; 239 regulator-boot-on; 240 241 regulator-state-mem { 242 regulator-on-in-suspend; 243 regulator-suspend-max-microvolt = <1140000>; 244 regulator-suspend-min-microvolt = <1140000>; 245 }; 246 }; 247 248 /* Core4_1V2 */ 249 dcdc4_reg: DCDC4 { 250 regulator-name = "DCDC4"; 251 regulator-min-microvolt = <1200000>; 252 regulator-max-microvolt = <1200000>; 253 regulator-always-on; 254 regulator-boot-on; 255 256 regulator-state-mem { 257 regulator-on-in-suspend; 258 regulator-suspend-max-microvolt = <1140000>; 259 regulator-suspend-min-microvolt = <1140000>; 260 }; 261 }; 262 263 /* Core4_1V8 */ 264 dcdc5_reg: DCDC5 { 265 regulator-name = "DCDC5"; 266 regulator-min-microvolt = <1800000>; 267 regulator-max-microvolt = <1800000>; 268 regulator-always-on; 269 regulator-boot-on; 270 271 regulator-state-mem { 272 regulator-on-in-suspend; 273 regulator-suspend-max-microvolt = <1700000>; 274 regulator-suspend-min-microvolt = <1700000>; 275 }; 276 }; 277 278 /* IR_3V3 */ 279 ldo1_reg: LDO1 { 280 regulator-name = "LDO1"; 281 regulator-boot-on; 282 }; 283 284 /* Core1_3V3 */ 285 ldo2_reg: LDO2 { 286 regulator-name = "LDO2"; 287 regulator-always-on; 288 regulator-boot-on; 289 290 regulator-state-mem { 291 regulator-on-in-suspend; 292 regulator-suspend-max-microvolt = <3000000>; 293 regulator-suspend-min-microvolt = <3000000>; 294 }; 295 }; 296 297 /* Core5_1V2 */ 298 ldo3_reg: LDO3 { 299 regulator-name = "LDO3"; 300 regulator-always-on; 301 regulator-boot-on; 302 }; 303 304 ldo4_reg: LDO4 { 305 regulator-name = "LDO4"; 306 regulator-boot-on; 307 }; 308 309 /* SPD_3V3 */ 310 ldo5_reg: LDO5 { 311 regulator-name = "LDO5"; 312 regulator-always-on; 313 regulator-boot-on; 314 }; 315 316 /* DDR_0V6 */ 317 ldo6_reg: LDO6 { 318 regulator-name = "LDO6"; 319 regulator-always-on; 320 regulator-boot-on; 321 }; 322 323 /* VDD_PWM */ 324 ldo7_reg: LDO7 { 325 regulator-name = "LDO7"; 326 regulator-always-on; 327 regulator-boot-on; 328 }; 329 330 /* ldo_1v8 */ 331 ldo8_reg: LDO8 { 332 regulator-name = "LDO8"; 333 regulator-min-microvolt = <1800000>; 334 regulator-max-microvolt = <1800000>; 335 regulator-always-on; 336 regulator-boot-on; 337 }; 338 339 ldo9_reg: LDO9 { 340 regulator-name = "LDO9"; 341 regulator-boot-on; 342 }; 343 344 ldo10_reg: LDO10 { 345 regulator-name = "LDO10"; 346 regulator-boot-on; 347 }; 348 349 ldortc1_reg: LDORTC1 { 350 regulator-name = "LDORTC1"; 351 regulator-always-on; 352 regulator-boot-on; 353 }; 354 }; 355 }; 356}; 357 358&iomuxc { 359 pinctrl-names = "default"; 360 pinctrl-0 = <&pinctrl_hog>; 361 362 pinctrl_backlight_power: backlight-powergrp { 363 fsl,pins = < 364 MX6SL_PAD_EPDC_PWRCTRL3__GPIO2_IO10 0x10059 365 >; 366 }; 367 368 pinctrl_epd_pmic_supply: epdc-pmic-supplygrp { 369 fsl,pins = < 370 MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x40010059 /* pwrall */ 371 >; 372 }; 373 374 pinctrl_gpio_keys: gpio-keysgrp { 375 fsl,pins = < 376 MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059 377 MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0x17059 378 MX6SL_PAD_KEY_COL1__GPIO3_IO26 0x17059 379 MX6SL_PAD_KEY_ROW0__GPIO3_IO25 0x17059 380 >; 381 }; 382 383 pinctrl_hog: hoggrp { 384 fsl,pins = < 385 MX6SL_PAD_LCD_DAT0__GPIO2_IO20 0x79 386 MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x79 387 MX6SL_PAD_LCD_DAT2__GPIO2_IO22 0x79 388 MX6SL_PAD_LCD_DAT3__GPIO2_IO23 0x79 389 MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x79 390 MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x79 391 MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x79 392 MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x79 393 MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x79 394 MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x79 395 MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79 396 MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79 397 MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79 398 MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79 399 MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79 400 MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79 401 MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79 402 MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79 403 MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79 404 MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79 405 MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79 406 MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79 407 MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79 408 MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79 409 MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x79 410 MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x79 411 MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79 412 MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79 413 MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79 414 MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x79 415 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x79 416 MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x79 417 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x79 418 >; 419 }; 420 421 pinctrl_i2c1: i2c1grp { 422 fsl,pins = < 423 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1 424 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1 425 >; 426 }; 427 428 pinctrl_i2c1_sleep: i2c1sleep-grp { 429 fsl,pins = < 430 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1 431 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1 432 >; 433 }; 434 435 pinctrl_i2c2: i2c2grp { 436 fsl,pins = < 437 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1 438 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1 439 >; 440 }; 441 442 pinctrl_i2c2_sleep: i2c2sleep-grp { 443 fsl,pins = < 444 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1 445 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1 446 >; 447 }; 448 449 pinctrl_i2c3: i2c3grp { 450 fsl,pins = < 451 MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1 452 MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1 453 >; 454 }; 455 456 pinctrl_led: ledgrp { 457 fsl,pins = < 458 MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x17059 459 MX6SL_PAD_EPDC_SDCE2__GPIO1_IO29 0x17059 460 >; 461 }; 462 463 pinctrl_ricoh_gpio: ricoh_gpiogrp { 464 fsl,pins = < 465 MX6SL_PAD_SD1_CLK__GPIO5_IO15 0x1b8b1 /* ricoh619 chg */ 466 MX6SL_PAD_SD1_DAT0__GPIO5_IO11 0x1b8b1 /* ricoh619 irq */ 467 MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */ 468 >; 469 }; 470 471 pinctrl_tps65185_gpio: tps65185-gpio-grp { 472 fsl,pins = < 473 MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* vcom_ctrl */ 474 MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x40010059 /* wakeup */ 475 MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 0x40010059 /* enable */ 476 MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x17059 /* nINT */ 477 MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x17059 /* pwr-good */ 478 >; 479 }; 480 481 pinctrl_uart1: uart1grp { 482 fsl,pins = < 483 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 484 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 485 >; 486 }; 487 488 pinctrl_uart4: uart4grp { 489 fsl,pins = < 490 MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1b0b1 491 MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x1b0b1 492 >; 493 }; 494 495 pinctrl_usbotg1: usbotg1grp { 496 fsl,pins = < 497 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 498 >; 499 }; 500 501 pinctrl_usdhc2: usdhc2grp { 502 fsl,pins = < 503 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059 504 MX6SL_PAD_SD2_CLK__SD2_CLK 0x13059 505 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059 506 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059 507 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059 508 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 509 >; 510 }; 511 512 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 513 fsl,pins = < 514 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9 515 MX6SL_PAD_SD2_CLK__SD2_CLK 0x130b9 516 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 517 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 518 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 519 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 520 >; 521 }; 522 523 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 524 fsl,pins = < 525 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9 526 MX6SL_PAD_SD2_CLK__SD2_CLK 0x130f9 527 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 528 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 529 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 530 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 531 >; 532 }; 533 534 pinctrl_usdhc2_sleep: usdhc2sleep-grp { 535 fsl,pins = < 536 MX6SL_PAD_SD2_CMD__GPIO5_IO04 0x100f9 537 MX6SL_PAD_SD2_CLK__GPIO5_IO05 0x100f9 538 MX6SL_PAD_SD2_DAT0__GPIO5_IO01 0x100f9 539 MX6SL_PAD_SD2_DAT1__GPIO4_IO30 0x100f9 540 MX6SL_PAD_SD2_DAT2__GPIO5_IO03 0x100f9 541 MX6SL_PAD_SD2_DAT3__GPIO4_IO28 0x100f9 542 >; 543 }; 544 545 pinctrl_usdhc3: usdhc3grp { 546 fsl,pins = < 547 MX6SL_PAD_SD3_CMD__SD3_CMD 0x11059 548 MX6SL_PAD_SD3_CLK__SD3_CLK 0x11059 549 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x11059 550 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x11059 551 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x11059 552 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x11059 553 >; 554 }; 555 556 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 557 fsl,pins = < 558 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 559 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170b9 560 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 561 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 562 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 563 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 564 >; 565 }; 566 567 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 568 fsl,pins = < 569 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 570 MX6SL_PAD_SD3_CLK__SD3_CLK 0x170f9 571 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 572 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 573 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 574 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 575 >; 576 }; 577 578 pinctrl_usdhc3_sleep: usdhc3sleep-grp { 579 fsl,pins = < 580 MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x100c1 581 MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x100c1 582 MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x100c1 583 MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x100c1 584 MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x100c1 585 MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x100c1 586 >; 587 }; 588 589 pinctrl_wifi_power: wifi-powergrp { 590 fsl,pins = < 591 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */ 592 >; 593 }; 594 595 pinctrl_wifi_reset: wifi-resetgrp { 596 fsl,pins = < 597 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x10059 /* WIFI_RST */ 598 >; 599 }; 600 601 pinctrl_zforce: zforcegrp { 602 fsl,pins = < 603 MX6SL_PAD_SD1_DAT3__GPIO5_IO06 0x17059 /* TP_INT */ 604 MX6SL_PAD_SD1_DAT5__GPIO5_IO09 0x10059 /* TP_RST */ 605 >; 606 }; 607}; 608 609®_vdd1p1 { 610 vin-supply = <&dcdc2_reg>; 611}; 612 613®_vdd2p5 { 614 vin-supply = <&dcdc2_reg>; 615}; 616 617®_arm { 618 vin-supply = <&dcdc3_reg>; 619}; 620 621®_soc { 622 vin-supply = <&dcdc1_reg>; 623}; 624 625®_pu { 626 vin-supply = <&dcdc1_reg>; 627}; 628 629&snvs_rtc { 630 /* 631 * We are using the RTC in the PMIC, but this one is not disabled 632 * in imx6sl.dtsi. 633 */ 634 status = "disabled"; 635}; 636 637&uart1 { 638 /* J4, through-holes */ 639 pinctrl-names = "default"; 640 pinctrl-0 = <&pinctrl_uart1>; 641 status = "okay"; 642}; 643 644&uart4 { 645 /* TP198, next to J4, SMD pads */ 646 pinctrl-names = "default"; 647 pinctrl-0 = <&pinctrl_uart4>; 648 status = "okay"; 649}; 650 651&usdhc2 { 652 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 653 pinctrl-0 = <&pinctrl_usdhc2>; 654 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 655 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 656 pinctrl-3 = <&pinctrl_usdhc2_sleep>; 657 non-removable; 658 status = "okay"; 659 660 /* internal uSD card */ 661}; 662 663&usdhc3 { 664 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 665 pinctrl-0 = <&pinctrl_usdhc3>; 666 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 667 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 668 pinctrl-3 = <&pinctrl_usdhc3_sleep>; 669 vmmc-supply = <®_wifi>; 670 mmc-pwrseq = <&wifi_pwrseq>; 671 cap-power-off-card; 672 non-removable; 673 status = "okay"; 674 675 /* 676 * 37NB-E60QF0+4A2: CyberTan WC121 (BCM43362) SDIO WiFi 677 * 37NB-E60QF0+4A3: RTL8189F SDIO WiFi 678 */ 679}; 680 681&usbotg1 { 682 pinctrl-names = "default"; 683 pinctrl-0 = <&pinctrl_usbotg1>; 684 disable-over-current; 685 srp-disable; 686 hnp-disable; 687 adp-disable; 688 status = "okay"; 689}; 690