1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/kernel.h>
3 #include <linux/sched.h>
4 #include <linux/sched/clock.h>
5 #include <linux/mm.h>
6 #include <asm/cpufeature.h>
7 #include <asm/msr.h>
8 #include "cpu.h"
9
early_init_transmeta(struct cpuinfo_x86 * c)10 static void early_init_transmeta(struct cpuinfo_x86 *c)
11 {
12 u32 xlvl;
13
14 /* Transmeta-defined flags: level 0x80860001 */
15 xlvl = cpuid_eax(0x80860000);
16 if ((xlvl & 0xffff0000) == 0x80860000) {
17 if (xlvl >= 0x80860001)
18 c->x86_capability[CPUID_8086_0001_EDX] = cpuid_edx(0x80860001);
19 }
20 }
21
init_transmeta(struct cpuinfo_x86 * c)22 static void init_transmeta(struct cpuinfo_x86 *c)
23 {
24 unsigned int cap_mask, uk, max, dummy;
25 unsigned int cms_rev1, cms_rev2;
26 unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev;
27 char cpu_info[65];
28
29 early_init_transmeta(c);
30
31 cpu_detect_cache_sizes(c);
32
33 /* Print CMS and CPU revision */
34 max = cpuid_eax(0x80860000);
35 cpu_rev = 0;
36 if (max >= 0x80860001) {
37 cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
38 if (cpu_rev != 0x02000000) {
39 pr_info("CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
40 (cpu_rev >> 24) & 0xff,
41 (cpu_rev >> 16) & 0xff,
42 (cpu_rev >> 8) & 0xff,
43 cpu_rev & 0xff,
44 cpu_freq);
45 }
46 }
47 if (max >= 0x80860002) {
48 cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
49 if (cpu_rev == 0x02000000) {
50 pr_info("CPU: Processor revision %08X, %u MHz\n",
51 new_cpu_rev, cpu_freq);
52 }
53 pr_info("CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n",
54 (cms_rev1 >> 24) & 0xff,
55 (cms_rev1 >> 16) & 0xff,
56 (cms_rev1 >> 8) & 0xff,
57 cms_rev1 & 0xff,
58 cms_rev2);
59 }
60 if (max >= 0x80860006) {
61 cpuid(0x80860003,
62 (void *)&cpu_info[0],
63 (void *)&cpu_info[4],
64 (void *)&cpu_info[8],
65 (void *)&cpu_info[12]);
66 cpuid(0x80860004,
67 (void *)&cpu_info[16],
68 (void *)&cpu_info[20],
69 (void *)&cpu_info[24],
70 (void *)&cpu_info[28]);
71 cpuid(0x80860005,
72 (void *)&cpu_info[32],
73 (void *)&cpu_info[36],
74 (void *)&cpu_info[40],
75 (void *)&cpu_info[44]);
76 cpuid(0x80860006,
77 (void *)&cpu_info[48],
78 (void *)&cpu_info[52],
79 (void *)&cpu_info[56],
80 (void *)&cpu_info[60]);
81 cpu_info[64] = '\0';
82 pr_info("CPU: %s\n", cpu_info);
83 }
84
85 /* Unhide possibly hidden capability flags */
86 rdmsr(0x80860004, cap_mask, uk);
87 wrmsr(0x80860004, ~0, uk);
88 c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001);
89 wrmsr(0x80860004, cap_mask, uk);
90
91 /* All Transmeta CPUs have a constant TSC */
92 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
93
94 #ifdef CONFIG_SYSCTL
95 /*
96 * randomize_va_space slows us down enormously;
97 * it probably triggers retranslation of x86->native bytecode
98 */
99 randomize_va_space = 0;
100 #endif
101 }
102
103 static const struct cpu_dev transmeta_cpu_dev = {
104 .c_vendor = "Transmeta",
105 .c_ident = { "GenuineTMx86", "TransmetaCPU" },
106 .c_early_init = early_init_transmeta,
107 .c_init = init_transmeta,
108 .c_x86_vendor = X86_VENDOR_TRANSMETA,
109 };
110
111 cpu_dev_register(transmeta_cpu_dev);
112