xref: /illumos-gate/usr/src/uts/common/io/usb/hcd/xhci/xhci_usba.c (revision 113ae9130ee83ef358c36cc3521d4a55e3e9da00)
1 /*
2  * This file and its contents are supplied under the terms of the
3  * Common Development and Distribution License ("CDDL"), version 1.0.
4  * You may only use this file in accordance with the terms of version
5  * 1.0 of the CDDL.
6  *
7  * A full copy of the text of the CDDL should have accompanied this
8  * source.  A copy of the CDDL is also available via the Internet at
9  * http://www.illumos.org/license/CDDL.
10  */
11 
12 /*
13  * Copyright (c) 2018, Joyent, Inc.
14  * Copyright (c) 2019 by Western Digital Corporation
15  * Copyright 2024 Oxide Computer Company
16  */
17 
18 /*
19  * illumos USB framework endpoints and functions for xHCI.
20  *
21  * Please see the big theory statement in xhci.c for more information.
22  */
23 
24 #include <sys/usb/hcd/xhci/xhci.h>
25 #include <sys/sysmacros.h>
26 #include <sys/strsun.h>
27 #include <sys/strsubr.h>
28 
29 xhci_t *
xhci_hcdi_get_xhcip_from_dev(usba_device_t * ud)30 xhci_hcdi_get_xhcip_from_dev(usba_device_t *ud)
31 {
32 	dev_info_t *dip = ud->usb_root_hub_dip;
33 	xhci_t *xhcip = ddi_get_soft_state(xhci_soft_state,
34 	    ddi_get_instance(dip));
35 	VERIFY(xhcip != NULL);
36 	return (xhcip);
37 }
38 
39 static xhci_t *
xhci_hcdi_get_xhcip(usba_pipe_handle_data_t * ph)40 xhci_hcdi_get_xhcip(usba_pipe_handle_data_t *ph)
41 {
42 	return (xhci_hcdi_get_xhcip_from_dev(ph->p_usba_device));
43 }
44 
45 /*
46  * While the xHCI hardware is capable of supporting power management, we don't
47  * in the driver right now. Note, USBA doesn't seem to end up calling this entry
48  * point.
49  */
50 /* ARGSUSED */
51 static int
xhci_hcdi_pm_support(dev_info_t * dip)52 xhci_hcdi_pm_support(dev_info_t *dip)
53 {
54 	return (USB_FAILURE);
55 }
56 
57 static int
xhci_hcdi_pipe_open(usba_pipe_handle_data_t * ph,usb_flags_t usb_flags)58 xhci_hcdi_pipe_open(usba_pipe_handle_data_t *ph, usb_flags_t usb_flags)
59 {
60 	xhci_t *xhcip = xhci_hcdi_get_xhcip(ph);
61 	xhci_pipe_t *pipe;
62 	xhci_endpoint_t *xep = NULL;
63 	xhci_device_t *xd;
64 	int kmflags = usb_flags & USB_FLAGS_SLEEP ? KM_SLEEP : KM_NOSLEEP;
65 	int ret;
66 	uint_t epid;
67 
68 	mutex_enter(&xhcip->xhci_lock);
69 	if (xhcip->xhci_state & XHCI_S_ERROR) {
70 		mutex_exit(&xhcip->xhci_lock);
71 		return (USB_HC_HARDWARE_ERROR);
72 	}
73 	mutex_exit(&xhcip->xhci_lock);
74 
75 	/*
76 	 * If we're here, something must be trying to open an already-opened
77 	 * pipe which is bad news.
78 	 */
79 	if (ph->p_hcd_private != NULL) {
80 		return (USB_FAILURE);
81 	}
82 
83 	pipe = kmem_zalloc(sizeof (xhci_pipe_t), kmflags);
84 	if (pipe == NULL) {
85 		return (USB_NO_RESOURCES);
86 	}
87 	pipe->xp_opentime = gethrtime();
88 	pipe->xp_pipe = ph;
89 
90 	/*
91 	 * If this is the root hub, there's nothing special to do on open. Just
92 	 * go ahead and allow it to be opened. All we have to do is add this to
93 	 * the list of our tracking structures for open pipes.
94 	 */
95 	if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR) {
96 		xep = NULL;
97 		goto add;
98 	}
99 
100 	/*
101 	 * Now that we're here, we're being asked to open up an endpoint of some
102 	 * kind. Because we've already handled the case of the root hub,
103 	 * everything should have a device.
104 	 */
105 	epid = xhci_endpoint_pipe_to_epid(ph);
106 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
107 	if (xd == NULL) {
108 		xhci_error(xhcip, "!encountered endpoint (%d) without device "
109 		    "during pipe open", epid);
110 		kmem_free(pipe, sizeof (xhci_pipe_t));
111 		return (USB_FAILURE);
112 	}
113 
114 	/*
115 	 * See if this endpoint exists or not, in general endpoints should not
116 	 * exist except for the default control endpoint, which we don't tear
117 	 * down until the device itself is cleaned up. Otherwise, a given pipe
118 	 * can only be open once.
119 	 */
120 	mutex_enter(&xhcip->xhci_lock);
121 	if (epid == XHCI_DEFAULT_ENDPOINT) {
122 		xep = xd->xd_endpoints[epid];
123 		VERIFY(xep != NULL);
124 		VERIFY(xep->xep_pipe == NULL);
125 		xep->xep_pipe = ph;
126 		mutex_exit(&xhcip->xhci_lock);
127 		ret = xhci_endpoint_update_default(xhcip, xd, xep);
128 		if (ret != USB_SUCCESS) {
129 			kmem_free(pipe, sizeof (xhci_pipe_t));
130 			return (ret);
131 		}
132 		goto add;
133 	}
134 
135 	/*
136 	 * If we're opening an endpoint other than the default control endpoint,
137 	 * then the device should have had a USB address assigned by the
138 	 * controller. Sanity check that before continuing.
139 	 */
140 	VERIFY(xd->xd_addressed == B_TRUE);
141 
142 	/*
143 	 * We may have already initialized the endpoint with a previous pipe
144 	 * open.
145 	 */
146 	if ((xep = xd->xd_endpoints[epid]) != NULL &&
147 	    (xep->xep_state & XHCI_ENDPOINT_OPEN)) {
148 		mutex_exit(&xhcip->xhci_lock);
149 
150 		kmem_free(pipe, sizeof (xhci_pipe_t));
151 		xhci_log(xhcip, "!asked to open endpoint %d on slot %d and "
152 		    "port %d, but endpoint already exists", epid, xd->xd_slot,
153 		    xd->xd_port);
154 		return (USB_FAILURE);
155 	}
156 
157 	if (xep != NULL) {
158 		/*
159 		 * The endpoint is already initialized but is not presently
160 		 * open so we can take it over here.
161 		 */
162 		if ((ret = xhci_endpoint_reopen(xhcip, xd, xep, ph) != 0)) {
163 			mutex_exit(&xhcip->xhci_lock);
164 
165 			kmem_free(pipe, sizeof (xhci_pipe_t));
166 			xhci_log(xhcip, "!asked to reopen endpoint %d on "
167 			    "slot %d and port %d, but reopen failed (%d)",
168 			    epid, xd->xd_slot, xd->xd_port, ret);
169 			return (ret);
170 		}
171 
172 		/*
173 		 * We need to ensure the endpoint is stopped before we try to
174 		 * reset the transfer ring.
175 		 */
176 		xep->xep_state |= XHCI_ENDPOINT_QUIESCE;
177 		if ((ret = xhci_endpoint_quiesce(xhcip, xd, xep)) !=
178 		    USB_SUCCESS) {
179 			/*
180 			 * If we could not quiesce the endpoint, close it so
181 			 * that another open can try again.
182 			 */
183 			xep->xep_state &= ~XHCI_ENDPOINT_QUIESCE;
184 			xhci_endpoint_close(xhcip, xep);
185 			mutex_exit(&xhcip->xhci_lock);
186 
187 			kmem_free(pipe, sizeof (xhci_pipe_t));
188 			xhci_log(xhcip, "!asked to reopen endpoint %d on "
189 			    "slot %d and port %d, but quiesce failed (%d)",
190 			    epid, xd->xd_slot, xd->xd_port, ret);
191 			return (ret);
192 		}
193 
194 		/*
195 		 * Reset the transfer ring dequeue pointer.  The initial
196 		 * Configure Endpoint command leaves the endpoint in the
197 		 * Running state (xHCI 1.2 / 4.6.6), so even though the ring is
198 		 * still empty we ring the doorbell to end up in the same state
199 		 * (Running but Inactive).
200 		 */
201 		mutex_exit(&xhcip->xhci_lock);
202 		if ((ret = xhci_command_set_tr_dequeue(xhcip, xd, xep)) != 0 ||
203 		    (ret = xhci_endpoint_ring(xhcip, xd, xep)) != 0) {
204 			mutex_enter(&xhcip->xhci_lock);
205 			xep->xep_state &= ~XHCI_ENDPOINT_QUIESCE;
206 			xhci_endpoint_close(xhcip, xep);
207 			mutex_exit(&xhcip->xhci_lock);
208 
209 			kmem_free(pipe, sizeof (xhci_pipe_t));
210 			xhci_log(xhcip, "!asked to open endpoint %d on "
211 			    "slot %d and port %d, but restart failed (%d)",
212 			    epid, xd->xd_slot, xd->xd_port, ret);
213 			return (USB_FAILURE);
214 		}
215 		mutex_enter(&xhcip->xhci_lock);
216 		xep->xep_state &= ~XHCI_ENDPOINT_QUIESCE;
217 		mutex_exit(&xhcip->xhci_lock);
218 
219 		goto add;
220 	}
221 
222 	/*
223 	 * Okay, at this point we need to go create and set up an endpoint from
224 	 * scratch.  Once we're done, we'll try to install it and make sure
225 	 * that it doesn't conflict with something else going on.
226 	 */
227 	ret = xhci_endpoint_init(xhcip, xd, ph);
228 	if (ret != 0) {
229 		mutex_exit(&xhcip->xhci_lock);
230 		kmem_free(pipe, sizeof (xhci_pipe_t));
231 		if (ret == EIO) {
232 			xhci_error(xhcip, "failed to initialize endpoint %d "
233 			    "on device slot %d and port %d: encountered fatal "
234 			    "FM error, resetting device", epid, xd->xd_slot,
235 			    xd->xd_port);
236 			xhci_fm_runtime_reset(xhcip);
237 		}
238 		return (USB_HC_HARDWARE_ERROR);
239 	}
240 	xep = xd->xd_endpoints[epid];
241 
242 	/*
243 	 * At this point the endpoint is marked open and if it needs to be torn
244 	 * down, xhci_endpoint_close() must be called before anything else to
245 	 * clear that state.
246 	 */
247 
248 	mutex_enter(&xd->xd_imtx);
249 	mutex_exit(&xhcip->xhci_lock);
250 
251 	/*
252 	 * Update the slot and input context for this endpoint. We make sure to
253 	 * always set the slot as having changed in the context field as the
254 	 * specification suggests we should and some hardware requires it.
255 	 */
256 	xd->xd_input->xic_drop_flags = LE_32(0);
257 	xd->xd_input->xic_add_flags = LE_32(XHCI_INCTX_MASK_DCI(0) |
258 	    XHCI_INCTX_MASK_DCI(epid + 1));
259 
260 	if (epid + 1 > XHCI_SCTX_GET_DCI(LE_32(xd->xd_slotin->xsc_info))) {
261 		uint32_t info;
262 
263 		info = xd->xd_slotin->xsc_info;
264 		info &= ~XHCI_SCTX_DCI_MASK;
265 		info |= XHCI_SCTX_SET_DCI(epid + 1);
266 		xd->xd_slotin->xsc_info = info;
267 	}
268 
269 	XHCI_DMA_SYNC(xd->xd_ictx, DDI_DMA_SYNC_FORDEV);
270 	if (xhci_check_dma_handle(xhcip, &xd->xd_ictx) != DDI_FM_OK) {
271 		mutex_exit(&xd->xd_imtx);
272 
273 		/*
274 		 * Because this failure occured prior to the configure endpoint
275 		 * command, the controller has no knowledge of it.  We must
276 		 * immediately mark it closed and free it.
277 		 */
278 		mutex_enter(&xhcip->xhci_lock);
279 		xhci_endpoint_close(xhcip, xep);
280 		xhci_endpoint_fini(xd, epid);
281 		mutex_exit(&xhcip->xhci_lock);
282 
283 		kmem_free(pipe, sizeof (xhci_pipe_t));
284 		xhci_error(xhcip, "failed to open pipe on endpoint %d of "
285 		    "device with slot %d and port %d: encountered fatal FM "
286 		    "error syncing device input context, resetting device",
287 		    epid, xd->xd_slot, xd->xd_port);
288 		xhci_fm_runtime_reset(xhcip);
289 		return (USB_HC_HARDWARE_ERROR);
290 	}
291 
292 	if ((ret = xhci_command_configure_endpoint(xhcip, xd)) != USB_SUCCESS) {
293 		mutex_exit(&xd->xd_imtx);
294 
295 		xhci_error(xhcip, "failed to open pipe on endpoint %d of "
296 		    "device with slot %d and port %d: configure endpoint "
297 		    "command failed (%d)", epid, xd->xd_slot, xd->xd_port, ret);
298 
299 		/*
300 		 * Because the configure endpoint command failed, we must
301 		 * assume the controller still doesn't know anything about it
302 		 * and immediately close and free the endpoint.  If we don't do
303 		 * this, the endpoint will remain stuck in the open state until
304 		 * it is removed and reinserted.
305 		 */
306 		mutex_enter(&xhcip->xhci_lock);
307 		xhci_endpoint_close(xhcip, xep);
308 		xhci_endpoint_fini(xd, epid);
309 		mutex_exit(&xhcip->xhci_lock);
310 
311 		kmem_free(pipe, sizeof (xhci_pipe_t));
312 		return (ret);
313 	}
314 
315 	mutex_exit(&xd->xd_imtx);
316 add:
317 	pipe->xp_ep = xep;
318 	ph->p_hcd_private = (usb_opaque_t)pipe;
319 	mutex_enter(&xhcip->xhci_lock);
320 	list_insert_tail(&xhcip->xhci_usba.xa_pipes, pipe);
321 	mutex_exit(&xhcip->xhci_lock);
322 
323 	return (USB_SUCCESS);
324 }
325 
326 static void
xhci_hcdi_periodic_free(xhci_t * xhcip,xhci_pipe_t * xp)327 xhci_hcdi_periodic_free(xhci_t *xhcip, xhci_pipe_t *xp)
328 {
329 	int i;
330 	xhci_periodic_pipe_t *xpp = &xp->xp_periodic;
331 
332 	if (xpp->xpp_tsize == 0)
333 		return;
334 
335 	for (i = 0; i < xpp->xpp_ntransfers; i++) {
336 		if (xpp->xpp_transfers[i] == NULL)
337 			continue;
338 		xhci_transfer_free(xhcip, xpp->xpp_transfers[i]);
339 		xpp->xpp_transfers[i] = NULL;
340 	}
341 
342 	xpp->xpp_ntransfers = 0;
343 	xpp->xpp_tsize = 0;
344 }
345 
346 /*
347  * Iterate over all transfers and free everything on the pipe. Once done, update
348  * the ring to basically 'consume' everything. For periodic IN endpoints, we
349  * need to handle this somewhat differently and actually close the original
350  * request and not deallocate the related pieces as those exist for the lifetime
351  * of the endpoint and are constantly reused. While interrupt IN endpoints are
352  * mostly seen as periodic, oneshot transfers on those endpoints still bear a
353  * USB request that must be completed, and are a special case where we must
354  * still free the transfer.
355  */
356 static void
xhci_hcdi_pipe_flush(xhci_t * xhcip,xhci_endpoint_t * xep,int intr_code)357 xhci_hcdi_pipe_flush(xhci_t *xhcip, xhci_endpoint_t *xep, int intr_code)
358 {
359 	xhci_transfer_t *xt;
360 
361 	ASSERT(MUTEX_HELD(&xhcip->xhci_lock));
362 
363 	while ((xt = list_remove_head(&xep->xep_transfers)) != NULL) {
364 		if (xhci_endpoint_is_periodic_in(xep) == B_FALSE ||
365 		    XHCI_IS_ONESHOT_XFER(xt)) {
366 			usba_hcdi_cb(xep->xep_pipe, xt->xt_usba_req,
367 			    USB_CR_FLUSHED);
368 			xhci_transfer_free(xhcip, xt);
369 		}
370 	}
371 
372 	if (xhci_endpoint_is_periodic_in(xep) == B_TRUE) {
373 		xhci_pipe_t *xp = (xhci_pipe_t *)xep->xep_pipe->p_hcd_private;
374 		xhci_periodic_pipe_t *xpp = &xp->xp_periodic;
375 
376 		if (xpp->xpp_usb_req != NULL) {
377 			usba_hcdi_cb(xep->xep_pipe, xpp->xpp_usb_req,
378 			    intr_code);
379 			xpp->xpp_usb_req = NULL;
380 		}
381 	}
382 }
383 
384 /*
385  * We've been asked to terminate some set of regular I/O on an interrupt pipe.
386  * If this is for the root device, e.g. the xhci driver itself, then we remove
387  * our interrupt callback. Otherwise we stop the device for interrupt polling as
388  * follows:
389  *
390  * 1. Issue a stop endpoint command
391  * 2. Check to make sure that the endpoint stopped and reset it if needed.
392  * 3. Any thing that gets resolved can callback in the interim.
393  * 4. Ensure that nothing is scheduled on the ring
394  * 5. Skip the contents of the ring and set the TR dequeue pointer.
395  * 6. Return the original callback with a USB_CR_STOPPED_POLLING, NULL out the
396  *    callback in the process.
397  */
398 static int
xhci_hcdi_pipe_poll_fini(usba_pipe_handle_data_t * ph,boolean_t is_close)399 xhci_hcdi_pipe_poll_fini(usba_pipe_handle_data_t *ph, boolean_t is_close)
400 {
401 	int ret;
402 	uint_t epid;
403 	xhci_t *xhcip = xhci_hcdi_get_xhcip(ph);
404 	xhci_device_t *xd;
405 	xhci_endpoint_t *xep;
406 	xhci_pipe_t *xp;
407 	xhci_periodic_pipe_t *xpp;
408 	usb_opaque_t urp;
409 
410 	mutex_enter(&xhcip->xhci_lock);
411 	if (xhcip->xhci_state & XHCI_S_ERROR) {
412 		mutex_exit(&xhcip->xhci_lock);
413 		return (USB_HC_HARDWARE_ERROR);
414 	}
415 
416 	if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR) {
417 		xhci_root_hub_intr_root_disable(xhcip);
418 		ret = USB_SUCCESS;
419 		mutex_exit(&xhcip->xhci_lock);
420 		return (ret);
421 	}
422 
423 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
424 	epid = xhci_endpoint_pipe_to_epid(ph);
425 	if (xd->xd_endpoints[epid] == NULL) {
426 		mutex_exit(&xhcip->xhci_lock);
427 		xhci_error(xhcip, "asked to stop intr polling on slot %d, "
428 		    "port %d, endpoint: %d, but no endpoint structure",
429 		    xd->xd_slot, xd->xd_port, epid);
430 		return (USB_FAILURE);
431 	}
432 	xep = xd->xd_endpoints[epid];
433 	xp = (xhci_pipe_t *)ph->p_hcd_private;
434 	if (xp == NULL) {
435 		mutex_exit(&xhcip->xhci_lock);
436 		xhci_error(xhcip, "asked to do finish polling on slot %d, "
437 		    "port %d, endpoint: %d, but no pipe structure",
438 		    xd->xd_slot, xd->xd_port, epid);
439 		return (USB_FAILURE);
440 	}
441 	xpp = &xp->xp_periodic;
442 
443 	/*
444 	 * Ensure that no other resets or time outs are going on right now.
445 	 */
446 	xhci_endpoint_serialize(xhcip, xep);
447 
448 	if (xpp->xpp_poll_state == XHCI_PERIODIC_POLL_IDLE) {
449 		mutex_exit(&xhcip->xhci_lock);
450 		return (USB_SUCCESS);
451 	}
452 
453 	if (xpp->xpp_poll_state == XHCI_PERIODIC_POLL_STOPPING) {
454 		mutex_exit(&xhcip->xhci_lock);
455 		return (USB_FAILURE);
456 	}
457 
458 	xpp->xpp_poll_state = XHCI_PERIODIC_POLL_STOPPING;
459 	xep->xep_state |= XHCI_ENDPOINT_QUIESCE;
460 	ret = xhci_endpoint_quiesce(xhcip, xd, xep);
461 	if (ret != USB_SUCCESS) {
462 		xhci_error(xhcip, "!failed to quiesce endpoint on slot %d, "
463 		    "port %d, endpoint: %d, failed with %d.",
464 		    xd->xd_slot, xd->xd_port, epid, ret);
465 		xep->xep_state &= ~XHCI_ENDPOINT_QUIESCE;
466 		cv_broadcast(&xep->xep_state_cv);
467 		mutex_exit(&xhcip->xhci_lock);
468 		return (ret);
469 	}
470 
471 	/*
472 	 * Okay, we've stopped this ring time to wrap it all up. Remove all the
473 	 * transfers, note they aren't freed like a pipe reset.
474 	 */
475 	while (list_is_empty(&xep->xep_transfers) == 0)
476 		(void) list_remove_head(&xep->xep_transfers);
477 	xhci_ring_skip(&xep->xep_ring);
478 	mutex_exit(&xhcip->xhci_lock);
479 
480 	if ((ret = xhci_command_set_tr_dequeue(xhcip, xd, xep)) !=
481 	    USB_SUCCESS) {
482 		xhci_error(xhcip, "!failed to reset endpoint ring on slot %d, "
483 		    "port %d, endpoint: %d, failed with %d.",
484 		    xd->xd_slot, xd->xd_port, epid, ret);
485 		mutex_enter(&xhcip->xhci_lock);
486 		xep->xep_state &= ~XHCI_ENDPOINT_QUIESCE;
487 		cv_broadcast(&xep->xep_state_cv);
488 		mutex_exit(&xhcip->xhci_lock);
489 		return (ret);
490 	}
491 
492 	mutex_enter(&xhcip->xhci_lock);
493 	urp = xpp->xpp_usb_req;
494 	xpp->xpp_usb_req = NULL;
495 	xpp->xpp_poll_state = XHCI_PERIODIC_POLL_IDLE;
496 	xep->xep_state &= ~XHCI_ENDPOINT_PERIODIC;
497 	mutex_exit(&xhcip->xhci_lock);
498 
499 	/*
500 	 * It's possible that with a persistent pipe, we may not actually have
501 	 * anything left to call back on, because we already had.
502 	 */
503 	if (urp != NULL) {
504 		usba_hcdi_cb(ph, urp, is_close == B_TRUE ?
505 		    USB_CR_PIPE_CLOSING : USB_CR_STOPPED_POLLING);
506 	}
507 
508 	/*
509 	 * Notify anything waiting for us that we're done quiescing this device.
510 	 */
511 	mutex_enter(&xhcip->xhci_lock);
512 	xep->xep_state &= ~XHCI_ENDPOINT_QUIESCE;
513 	cv_broadcast(&xep->xep_state_cv);
514 	mutex_exit(&xhcip->xhci_lock);
515 
516 	return (USB_SUCCESS);
517 
518 }
519 
520 /*
521  * Tear down everything that we did in open. After this, the consumer of this
522  * USB device is done.
523  */
524 static int
xhci_hcdi_pipe_close(usba_pipe_handle_data_t * ph,usb_flags_t usb_flags)525 xhci_hcdi_pipe_close(usba_pipe_handle_data_t *ph, usb_flags_t usb_flags)
526 {
527 	xhci_t *xhcip = xhci_hcdi_get_xhcip(ph);
528 	xhci_pipe_t *xp;
529 	xhci_device_t *xd;
530 	xhci_endpoint_t *xep;
531 	int ret;
532 	uint_t epid;
533 
534 	if ((ph->p_ep.bmAttributes & USB_EP_ATTR_MASK) == USB_EP_ATTR_INTR &&
535 	    xhcip->xhci_usba.xa_intr_cb_ph != NULL) {
536 		if ((ret = xhci_hcdi_pipe_poll_fini(ph, B_TRUE)) !=
537 		    USB_SUCCESS) {
538 			return (ret);
539 		}
540 	}
541 
542 	mutex_enter(&xhcip->xhci_lock);
543 
544 	xp = (xhci_pipe_t *)ph->p_hcd_private;
545 	VERIFY(xp != NULL);
546 
547 	/*
548 	 * The default endpoint is special. It is created and destroyed with the
549 	 * device. So like with open, closing it is just state tracking. The
550 	 * same is true for the root hub.
551 	 */
552 	if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR)
553 		goto remove;
554 
555 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
556 	epid = xhci_endpoint_pipe_to_epid(ph);
557 	if (xd->xd_endpoints[epid] == NULL) {
558 		mutex_exit(&xhcip->xhci_lock);
559 		xhci_error(xhcip, "asked to do close pipe on slot %d, "
560 		    "port %d, endpoint: %d, but no endpoint structure",
561 		    xd->xd_slot, xd->xd_port, epid);
562 		return (USB_FAILURE);
563 	}
564 	xep = xd->xd_endpoints[epid];
565 
566 	if (xp->xp_ep != NULL && xp->xp_ep->xep_num == XHCI_DEFAULT_ENDPOINT) {
567 		xep->xep_pipe = NULL;
568 		goto remove;
569 	}
570 
571 	/*
572 	 * We clean up the endpoint by stopping it and cancelling any transfers
573 	 * that were in flight at the time.
574 	 */
575 	xhci_endpoint_timeout_cancel(xhcip, xep);
576 	xep->xep_state |= XHCI_ENDPOINT_QUIESCE;
577 	if ((ret = xhci_endpoint_quiesce(xhcip, xd, xep)) != USB_SUCCESS) {
578 		/*
579 		 * If we cannot stop the ring, it is not safe to proceed and we
580 		 * must keep the pipe open.
581 		 */
582 		xep->xep_state &=
583 		    ~(XHCI_ENDPOINT_TEARDOWN | XHCI_ENDPOINT_QUIESCE);
584 		cv_broadcast(&xep->xep_state_cv);
585 		mutex_exit(&xhcip->xhci_lock);
586 		xhci_error(xhcip, "asked to do close pipe on slot %d, "
587 		    "port %d, endpoint: %d, but quiesce failed %d",
588 		    xd->xd_slot, xd->xd_port, epid, ret);
589 		return (USB_FAILURE);
590 	}
591 
592 	/*
593 	 * Now that we've stopped the endpoint, see if we need to flush any
594 	 * transfers.
595 	 */
596 	xhci_hcdi_pipe_flush(xhcip, xep, USB_CR_PIPE_CLOSING);
597 	if ((ph->p_ep.bEndpointAddress & USB_EP_DIR_MASK) == USB_EP_DIR_IN) {
598 		xhci_hcdi_periodic_free(xhcip, xp);
599 	}
600 
601 	xhci_endpoint_close(xhcip, xep);
602 
603 	/*
604 	 * The endpoint is now totally detached and inactive.  We leave bulk
605 	 * and control endpoints configured (see endpoint management comments
606 	 * in xhci.c).  Periodic endpoints maintain a bandwidth reservation
607 	 * which inhibits the use of other devices, so we attempt to
608 	 * unconfigure those here.
609 	 */
610 	if (xep->xep_type == USB_EP_ATTR_INTR ||
611 	    xep->xep_type == USB_EP_ATTR_ISOCH) {
612 		if ((ret = xhci_endpoint_unconfigure(xhcip, xd, xep)) ==
613 		    USB_SUCCESS) {
614 			/*
615 			 * If we were able to unconfigure the endpoint from the
616 			 * device we can free everything.  The endpoint will be
617 			 * recreated if a pipe is opened again later.
618 			 */
619 			xhci_endpoint_fini(xd, epid);
620 		} else {
621 			/*
622 			 * Report the error and keep the endpoint object around
623 			 * as we do for a bulk endpoint.  From the USB
624 			 * framework perspective the pipe is closed, so don't
625 			 * fail the whole operation.
626 			 */
627 			xhci_error(xhcip, "failed to unconfigure periodic "
628 			    "endpoint %u of device with slot %hhu and port %hd "
629 			    "(%d)",
630 			    epid, xd->xd_slot, xd->xd_port, ret);
631 		}
632 	}
633 
634 remove:
635 	ph->p_hcd_private = NULL;
636 	list_remove(&xhcip->xhci_usba.xa_pipes, xp);
637 	kmem_free(xp, sizeof (xhci_pipe_t));
638 
639 	mutex_exit(&xhcip->xhci_lock);
640 
641 	return (USB_SUCCESS);
642 }
643 
644 /*
645  * We've been asked to reset a pipe aka an endpoint. This endpoint may be in an
646  * arbitrary state, it may be running or it may be halted. In this case, we go
647  * through and check whether or not we know it's been halted or not. If it has
648  * not, then we stop the endpoint.
649  *
650  * Once the endpoint has been stopped, walk all transfers and go ahead and
651  * basically return them as being flushed. Then finally set the dequeue point
652  * for this endpoint.
653  */
654 /* ARGSUSED */
655 static int
xhci_hcdi_pipe_reset(usba_pipe_handle_data_t * ph,usb_flags_t usb_flags)656 xhci_hcdi_pipe_reset(usba_pipe_handle_data_t *ph, usb_flags_t usb_flags)
657 {
658 	xhci_t *xhcip = xhci_hcdi_get_xhcip(ph);
659 	xhci_device_t *xd;
660 	xhci_endpoint_t *xep;
661 	uint_t epid;
662 	int ret;
663 
664 	mutex_enter(&xhcip->xhci_lock);
665 	if (xhcip->xhci_state & XHCI_S_ERROR) {
666 		mutex_exit(&xhcip->xhci_lock);
667 		return (USB_HC_HARDWARE_ERROR);
668 	}
669 
670 	if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR) {
671 		mutex_exit(&xhcip->xhci_lock);
672 		return (USB_NOT_SUPPORTED);
673 	}
674 
675 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
676 	epid = xhci_endpoint_pipe_to_epid(ph);
677 	if (xd->xd_endpoints[epid] == NULL) {
678 		mutex_exit(&xhcip->xhci_lock);
679 		xhci_error(xhcip, "asked to do reset pipe on slot %d, "
680 		    "port %d, endpoint: %d, but no endpoint structure",
681 		    xd->xd_slot, xd->xd_port, epid);
682 		return (USB_FAILURE);
683 	}
684 
685 	xep = xd->xd_endpoints[epid];
686 
687 	/*
688 	 * Ensure that no other resets or time outs are going on right now.
689 	 */
690 	xhci_endpoint_serialize(xhcip, xep);
691 
692 	xep->xep_state |= XHCI_ENDPOINT_QUIESCE;
693 	ret = xhci_endpoint_quiesce(xhcip, xd, xep);
694 	if (ret != USB_SUCCESS) {
695 		/*
696 		 * We failed to quiesce for some reason, remove the flag and let
697 		 * someone else give it a shot.
698 		 */
699 		xhci_error(xhcip, "!failed to quiesce endpoint on slot %d, "
700 		    "port %d, endpoint: %d, failed with %d.",
701 		    xd->xd_slot, xd->xd_port, epid, ret);
702 		xep->xep_state &= ~XHCI_ENDPOINT_QUIESCE;
703 		cv_broadcast(&xep->xep_state_cv);
704 		mutex_exit(&xhcip->xhci_lock);
705 		return (ret);
706 	}
707 
708 	xhci_ring_skip(&xep->xep_ring);
709 
710 	mutex_exit(&xhcip->xhci_lock);
711 	if ((ret = xhci_command_set_tr_dequeue(xhcip, xd, xep)) !=
712 	    USB_SUCCESS) {
713 		xhci_error(xhcip, "!failed to reset endpoint ring on slot %d, "
714 		    "port %d, endpoint: %d, failed setting ring dequeue with "
715 		    "%d.", xd->xd_slot, xd->xd_port, epid, ret);
716 		mutex_enter(&xhcip->xhci_lock);
717 		xep->xep_state &= ~XHCI_ENDPOINT_QUIESCE;
718 		cv_broadcast(&xep->xep_state_cv);
719 		mutex_exit(&xhcip->xhci_lock);
720 		return (ret);
721 	}
722 
723 	mutex_enter(&xhcip->xhci_lock);
724 	xhci_hcdi_pipe_flush(xhcip, xep, USB_CR_PIPE_RESET);
725 
726 	/*
727 	 * We need to remove the periodic flag as part of resetting, as if this
728 	 * was used for periodic activity, it no longer is and therefore can now
729 	 * be used for such purposes.
730 	 *
731 	 * Notify anything waiting for us that we're done quiescing this device.
732 	 */
733 	xep->xep_state &= ~(XHCI_ENDPOINT_QUIESCE | XHCI_ENDPOINT_PERIODIC);
734 	cv_broadcast(&xep->xep_state_cv);
735 	mutex_exit(&xhcip->xhci_lock);
736 
737 	return (USB_SUCCESS);
738 }
739 
740 /*
741  * We're asked to reset or change the data toggle, which is used in a few cases.
742  * However, there doesn't seem to be a good way to do this in xHCI as the data
743  * toggle isn't exposed. It seems that dropping a reset endpoint would
744  * theoretically do this; however, that can only be used when in the HALTED
745  * state. As such, for now we just return.
746  */
747 /* ARGSUSED */
748 void
xhci_hcdi_pipe_reset_data_toggle(usba_pipe_handle_data_t * pipe_handle)749 xhci_hcdi_pipe_reset_data_toggle(usba_pipe_handle_data_t *pipe_handle)
750 {
751 }
752 
753 /*
754  * We need to convert the USB request to an 8-byte little endian value. If we
755  * didn't have to think about big endian systems, this would be fine.
756  * Unfortunately, with them, this is a bit confusing. The problem is that if you
757  * think of this as a struct layout, the order that we or things together
758  * represents their byte layout. e.g. ctrl_bRequest is at offset 1 in the SETUP
759  * STAGE trb. However, when it becomes a part of a 64-bit big endian number, if
760  * ends up at byte 7, where as it needs to be at one. Hence why we do a final
761  * LE_64 at the end of this, to convert this into the byte order that it's
762  * expected to be in.
763  */
764 static uint64_t
xhci_hcdi_ctrl_req_to_trb(usb_ctrl_req_t * ucrp)765 xhci_hcdi_ctrl_req_to_trb(usb_ctrl_req_t *ucrp)
766 {
767 	uint64_t ret = ucrp->ctrl_bmRequestType |
768 	    (ucrp->ctrl_bRequest << 8) |
769 	    ((uint64_t)LE_16(ucrp->ctrl_wValue) << 16) |
770 	    ((uint64_t)LE_16(ucrp->ctrl_wIndex) << 32) |
771 	    ((uint64_t)LE_16(ucrp->ctrl_wLength) << 48);
772 	return (LE_64(ret));
773 }
774 
775 /*
776  * USBA calls us in order to make a specific control type request to a device,
777  * potentially even the root hub. If the request is for the root hub, then we
778  * need to intercept this and cons up the requested data.
779  */
780 static int
xhci_hcdi_pipe_ctrl_xfer(usba_pipe_handle_data_t * ph,usb_ctrl_req_t * ucrp,usb_flags_t usb_flags)781 xhci_hcdi_pipe_ctrl_xfer(usba_pipe_handle_data_t *ph, usb_ctrl_req_t *ucrp,
782     usb_flags_t usb_flags)
783 {
784 	int ret, statusdir, trt;
785 	uint_t ep;
786 	xhci_device_t *xd;
787 	xhci_endpoint_t *xep;
788 	xhci_transfer_t *xt;
789 	boolean_t datain;
790 
791 	xhci_t *xhcip = xhci_hcdi_get_xhcip(ph);
792 
793 	mutex_enter(&xhcip->xhci_lock);
794 	if (xhcip->xhci_state & XHCI_S_ERROR) {
795 		mutex_exit(&xhcip->xhci_lock);
796 		return (USB_HC_HARDWARE_ERROR);
797 	}
798 
799 	if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR) {
800 		ret = xhci_root_hub_ctrl_req(xhcip, ph, ucrp);
801 		mutex_exit(&xhcip->xhci_lock);
802 		return (ret);
803 	}
804 
805 	/*
806 	 * Determine the device and endpoint.
807 	 */
808 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
809 	ep = xhci_endpoint_pipe_to_epid(ph);
810 	if (xd->xd_endpoints[ep] == NULL) {
811 		mutex_exit(&xhcip->xhci_lock);
812 		xhci_error(xhcip, "asked to do control transfer on slot %d, "
813 		    "port %d, endpoint: %d, but no endpoint structure",
814 		    xd->xd_slot, xd->xd_port, ep);
815 		return (USB_FAILURE);
816 	}
817 	xep = xd->xd_endpoints[ep];
818 
819 	/*
820 	 * There are several types of requests that we have to handle in special
821 	 * ways in xHCI. If we have one of those requests, then we don't
822 	 * necessarily go through the normal path. These special cases are all
823 	 * documented in xHCI 1.1 / 4.5.4.
824 	 *
825 	 * Looking at that, you may ask why aren't SET_CONFIGURATION and SET_IF
826 	 * special cased here. This action is a little confusing by default. The
827 	 * xHCI specification requires that we may need to issue a configure
828 	 * endpoint command as part of this. However, the xHCI 1.1 / 4.5.4.2
829 	 * states that we don't actually need to if nothing in the endpoint
830 	 * configuration context has changed. Because nothing in it should have
831 	 * changed as part of this, we don't need to do anything and instead
832 	 * just can issue the request normally. We're also assuming in the
833 	 * USB_REQ_SET_IF case that if something's changing the interface, the
834 	 * non-default endpoint will have yet to be opened.
835 	 */
836 	if (ucrp->ctrl_bmRequestType == USB_DEV_REQ_HOST_TO_DEV &&
837 	    ucrp->ctrl_bRequest == USB_REQ_SET_ADDRESS) {
838 		/*
839 		 * As we've defined an explicit set-address endpoint, we should
840 		 * never call this function. If we get here, always fail.
841 		 */
842 		mutex_exit(&xhcip->xhci_lock);
843 		usba_hcdi_cb(ph, (usb_opaque_t)ucrp, USB_CR_NOT_SUPPORTED);
844 		return (USB_SUCCESS);
845 	}
846 
847 	mutex_exit(&xhcip->xhci_lock);
848 
849 	/*
850 	 * Allocate the transfer memory, etc.
851 	 */
852 	xt = xhci_transfer_alloc(xhcip, xep, ucrp->ctrl_wLength, 2, usb_flags);
853 	if (xt == NULL) {
854 		return (USB_NO_RESOURCES);
855 	}
856 	xt->xt_usba_req = (usb_opaque_t)ucrp;
857 	xt->xt_timeout = ucrp->ctrl_timeout;
858 	if (xt->xt_timeout == 0) {
859 		xt->xt_timeout = HCDI_DEFAULT_TIMEOUT;
860 	}
861 
862 	if (ucrp->ctrl_wLength > 0) {
863 		if ((ucrp->ctrl_bmRequestType & USB_DEV_REQ_DEV_TO_HOST) != 0) {
864 			trt = XHCI_TRB_TRT_IN;
865 			datain = B_TRUE;
866 			statusdir = 0;
867 		} else {
868 			trt = XHCI_TRB_TRT_OUT;
869 			datain = B_FALSE;
870 			statusdir = XHCI_TRB_DIR_IN;
871 
872 			xhci_transfer_copy(xt, ucrp->ctrl_data->b_rptr,
873 			    ucrp->ctrl_wLength, B_FALSE);
874 			if (xhci_transfer_sync(xhcip, xt,
875 			    DDI_DMA_SYNC_FORDEV) != DDI_FM_OK) {
876 				xhci_transfer_free(xhcip, xt);
877 				xhci_error(xhcip, "failed to synchronize ctrl "
878 				    "transfer DMA memory on endpoint %u of "
879 				    "device on slot %d and port %d: resetting "
880 				    "device", xep->xep_num, xd->xd_slot,
881 				    xd->xd_port);
882 				xhci_fm_runtime_reset(xhcip);
883 				return (USB_HC_HARDWARE_ERROR);
884 			}
885 		}
886 	} else {
887 		trt = 0;
888 		datain = B_FALSE;
889 		statusdir = XHCI_TRB_DIR_IN;
890 	}
891 
892 	/*
893 	 * We always fill in the required setup and status TRBs ourselves;
894 	 * however, to minimize our knowledge about how the data has been split
895 	 * across multiple DMA cookies in an SGL, we leave that to the transfer
896 	 * logic to fill in.
897 	 */
898 	xt->xt_trbs[0].trb_addr = xhci_hcdi_ctrl_req_to_trb(ucrp);
899 	xt->xt_trbs[0].trb_status = LE_32(XHCI_TRB_LEN(8) | XHCI_TRB_INTR(0));
900 	xt->xt_trbs[0].trb_flags = LE_32(trt | XHCI_TRB_IDT |
901 	    XHCI_TRB_TYPE_SETUP);
902 
903 	if (ucrp->ctrl_wLength > 0)
904 		xhci_transfer_trb_fill_data(xep, xt, 1, datain);
905 
906 	xt->xt_trbs[xt->xt_ntrbs - 1].trb_addr = 0;
907 	xt->xt_trbs[xt->xt_ntrbs - 1].trb_status = LE_32(XHCI_TRB_INTR(0));
908 	xt->xt_trbs[xt->xt_ntrbs - 1].trb_flags = LE_32(XHCI_TRB_TYPE_STATUS |
909 	    XHCI_TRB_IOC | statusdir);
910 
911 
912 	mutex_enter(&xhcip->xhci_lock);
913 
914 	/*
915 	 * Schedule the transfer, allocating resources in the process.
916 	 */
917 	if (xhci_endpoint_schedule(xhcip, xd, xep, xt, B_TRUE) != 0) {
918 		xhci_transfer_free(xhcip, xt);
919 		mutex_exit(&xhcip->xhci_lock);
920 		return (USB_NO_RESOURCES);
921 	}
922 
923 	mutex_exit(&xhcip->xhci_lock);
924 
925 	return (USB_SUCCESS);
926 }
927 
928 /*
929  * This request is trying to get the upper bound on the amount of data we're
930  * willing transfer in one go. Note that this amount can be broken down into
931  * multiple SGL entries, this interface doesn't particularly care about that.
932  */
933 /* ARGSUSED */
934 static int
xhci_hcdi_bulk_transfer_size(usba_device_t * ud,size_t * sizep)935 xhci_hcdi_bulk_transfer_size(usba_device_t *ud, size_t *sizep)
936 {
937 	if (sizep != NULL)
938 		*sizep = XHCI_MAX_TRANSFER;
939 	return (USB_SUCCESS);
940 }
941 
942 /*
943  * Perform a bulk transfer. This is a pretty straightforward action. We
944  * basically just allocate the appropriate transfer and try to schedule it,
945  * hoping there is enough space.
946  */
947 static int
xhci_hcdi_pipe_bulk_xfer(usba_pipe_handle_data_t * ph,usb_bulk_req_t * ubrp,usb_flags_t usb_flags)948 xhci_hcdi_pipe_bulk_xfer(usba_pipe_handle_data_t *ph, usb_bulk_req_t *ubrp,
949     usb_flags_t usb_flags)
950 {
951 	uint_t epid;
952 	xhci_device_t *xd;
953 	xhci_endpoint_t *xep;
954 	xhci_transfer_t *xt;
955 	boolean_t datain;
956 
957 	xhci_t *xhcip = xhci_hcdi_get_xhcip(ph);
958 
959 	mutex_enter(&xhcip->xhci_lock);
960 	if (xhcip->xhci_state & XHCI_S_ERROR) {
961 		mutex_exit(&xhcip->xhci_lock);
962 		return (USB_HC_HARDWARE_ERROR);
963 	}
964 
965 	if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR) {
966 		mutex_exit(&xhcip->xhci_lock);
967 		return (USB_NOT_SUPPORTED);
968 	}
969 
970 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
971 	epid = xhci_endpoint_pipe_to_epid(ph);
972 	if (xd->xd_endpoints[epid] == NULL) {
973 		mutex_exit(&xhcip->xhci_lock);
974 		xhci_error(xhcip, "asked to do bulk transfer on slot %d, "
975 		    "port %d, endpoint: %d, but no endpoint structure",
976 		    xd->xd_slot, xd->xd_port, epid);
977 		return (USB_FAILURE);
978 	}
979 	xep = xd->xd_endpoints[epid];
980 	mutex_exit(&xhcip->xhci_lock);
981 
982 	if ((ph->p_ep.bEndpointAddress & USB_EP_DIR_MASK) == USB_EP_DIR_IN) {
983 		datain = B_TRUE;
984 	} else {
985 		datain = B_FALSE;
986 	}
987 
988 	xt = xhci_transfer_alloc(xhcip, xep, ubrp->bulk_len, 0, usb_flags);
989 	if (xt == NULL) {
990 		return (USB_NO_RESOURCES);
991 	}
992 	xt->xt_usba_req = (usb_opaque_t)ubrp;
993 	xt->xt_timeout = ubrp->bulk_timeout;
994 	if (xt->xt_timeout == 0) {
995 		xt->xt_timeout = HCDI_DEFAULT_TIMEOUT;
996 	}
997 
998 	if (ubrp->bulk_len > 0 && datain == B_FALSE) {
999 		xhci_transfer_copy(xt, ubrp->bulk_data->b_rptr, ubrp->bulk_len,
1000 		    B_FALSE);
1001 		if (xhci_transfer_sync(xhcip, xt, DDI_DMA_SYNC_FORDEV) !=
1002 		    DDI_FM_OK) {
1003 			xhci_transfer_free(xhcip, xt);
1004 			xhci_error(xhcip, "failed to synchronize bulk "
1005 			    "transfer DMA memory on endpoint %u of "
1006 			    "device on slot %d and port %d: resetting "
1007 			    "device", xep->xep_num, xd->xd_slot,
1008 			    xd->xd_port);
1009 			xhci_fm_runtime_reset(xhcip);
1010 			return (USB_HC_HARDWARE_ERROR);
1011 		}
1012 	}
1013 
1014 	xhci_transfer_trb_fill_data(xep, xt, 0, datain);
1015 	mutex_enter(&xhcip->xhci_lock);
1016 	if (xhci_endpoint_schedule(xhcip, xd, xep, xt, B_TRUE) != 0) {
1017 		xhci_transfer_free(xhcip, xt);
1018 		mutex_exit(&xhcip->xhci_lock);
1019 		return (USB_NO_RESOURCES);
1020 	}
1021 	mutex_exit(&xhcip->xhci_lock);
1022 
1023 	return (USB_SUCCESS);
1024 }
1025 
1026 static void
xhci_hcdi_isoc_transfer_fill(xhci_device_t * xd,xhci_endpoint_t * xep,xhci_transfer_t * xt,usb_isoc_req_t * usrp)1027 xhci_hcdi_isoc_transfer_fill(xhci_device_t *xd, xhci_endpoint_t *xep,
1028     xhci_transfer_t *xt, usb_isoc_req_t *usrp)
1029 {
1030 	int i;
1031 	uintptr_t buf;
1032 
1033 	buf = xt->xt_buffer.xdb_cookies[0].dmac_laddress;
1034 	for (i = 0; i < usrp->isoc_pkts_count; i++) {
1035 		int flags;
1036 		uint_t tbc, tlbpc;
1037 
1038 		ushort_t len = usrp->isoc_pkt_descr[i].isoc_pkt_length;
1039 		xhci_trb_t *trb = &xt->xt_trbs[i];
1040 
1041 		trb->trb_addr = LE_64(buf);
1042 
1043 		/*
1044 		 * Because we know that a single frame can have all of its data
1045 		 * in a single instance, we know that we don't need to do
1046 		 * anything special here.
1047 		 */
1048 		trb->trb_status = LE_32(XHCI_TRB_LEN(len) | XHCI_TRB_TDREM(0) |
1049 		    XHCI_TRB_INTR(0));
1050 
1051 		/*
1052 		 * Always enable SIA to start the frame ASAP. We also always
1053 		 * enable an interrupt on a short packet. If this is the last
1054 		 * trb, then we will set IOC. Each TRB created here is really
1055 		 * its own TD. However, we only set an interrupt on the last
1056 		 * entry to better deal with scheduling.
1057 		 */
1058 		flags = XHCI_TRB_SIA | XHCI_TRB_ISP | XHCI_TRB_SET_FRAME(0);
1059 		flags |= XHCI_TRB_TYPE_ISOCH;
1060 
1061 		if (i + 1 == usrp->isoc_pkts_count)
1062 			flags |= XHCI_TRB_IOC;
1063 
1064 		/*
1065 		 * Now we need to calculate the TBC and the TLBPC.
1066 		 */
1067 		xhci_transfer_calculate_isoc(xd, xep, len, &tbc, &tlbpc);
1068 		flags |= XHCI_TRB_SET_TBC(tbc);
1069 		flags |= XHCI_TRB_SET_TLBPC(tlbpc);
1070 
1071 		trb->trb_flags = LE_32(flags);
1072 		buf += len;
1073 
1074 		/*
1075 		 * Go through and copy the required data to our local copy of
1076 		 * the isoc descriptor. By default, we assume that all data will
1077 		 * be copied and the status set to OK. This mirrors the fact
1078 		 * that we won't get a notification unless there's been an
1079 		 * error or short packet transfer.
1080 		 */
1081 		xt->xt_isoc[i].isoc_pkt_length = len;
1082 		xt->xt_isoc[i].isoc_pkt_actual_length = len;
1083 		xt->xt_isoc[i].isoc_pkt_status = USB_CR_OK;
1084 	}
1085 }
1086 
1087 /*
1088  * Initialize periodic IN requests (both interrupt and isochronous)
1089  */
1090 static int
xhci_hcdi_periodic_init(xhci_t * xhcip,usba_pipe_handle_data_t * ph,usb_opaque_t usb_req,size_t len,int usb_flags)1091 xhci_hcdi_periodic_init(xhci_t *xhcip, usba_pipe_handle_data_t *ph,
1092     usb_opaque_t usb_req, size_t len, int usb_flags)
1093 {
1094 	int i, ret;
1095 	uint_t epid;
1096 	xhci_device_t *xd;
1097 	xhci_endpoint_t *xep;
1098 	xhci_pipe_t *xp;
1099 	xhci_periodic_pipe_t *xpp;
1100 
1101 	mutex_enter(&xhcip->xhci_lock);
1102 	if (xhcip->xhci_state & XHCI_S_ERROR) {
1103 		mutex_exit(&xhcip->xhci_lock);
1104 		return (USB_HC_HARDWARE_ERROR);
1105 	}
1106 
1107 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
1108 	epid = xhci_endpoint_pipe_to_epid(ph);
1109 	if (xd->xd_endpoints[epid] == NULL) {
1110 		xhci_error(xhcip, "asked to do periodic transfer on slot %d, "
1111 		    "port %d, endpoint: %d, but no endpoint structure",
1112 		    xd->xd_slot, xd->xd_port, epid);
1113 		mutex_exit(&xhcip->xhci_lock);
1114 		return (USB_FAILURE);
1115 	}
1116 	xep = xd->xd_endpoints[epid];
1117 	xp = (xhci_pipe_t *)ph->p_hcd_private;
1118 	if (xp == NULL) {
1119 		xhci_error(xhcip, "asked to do periodic transfer on slot %d, "
1120 		    "port %d, endpoint: %d, but no pipe structure",
1121 		    xd->xd_slot, xd->xd_port, epid);
1122 		mutex_exit(&xhcip->xhci_lock);
1123 		return (USB_FAILURE);
1124 	}
1125 	xpp = &xp->xp_periodic;
1126 
1127 	/*
1128 	 * Only allow a single polling request at any given time.
1129 	 */
1130 	if (xpp->xpp_usb_req != NULL) {
1131 		mutex_exit(&xhcip->xhci_lock);
1132 		return (USB_BUSY);
1133 	}
1134 
1135 	/*
1136 	 * We keep allocations around in case we restart polling, which most
1137 	 * devices do (not really caring about a lost event). However, we don't
1138 	 * support a driver changing that size on us, which it probably won't.
1139 	 * If we stumble across driver that does, then this will need to become
1140 	 * a lot more complicated.
1141 	 */
1142 	if (xpp->xpp_tsize > 0 && xpp->xpp_tsize < len) {
1143 		mutex_exit(&xhcip->xhci_lock);
1144 		return (USB_INVALID_REQUEST);
1145 	}
1146 
1147 	if (xpp->xpp_tsize == 0) {
1148 		int ntrbs;
1149 		int ntransfers;
1150 
1151 		/*
1152 		 * What we allocate varies based on whether or not this is an
1153 		 * isochronous or interrupt IN periodic.
1154 		 */
1155 		if (xep->xep_type == USB_EP_ATTR_INTR) {
1156 			ntrbs = 0;
1157 			ntransfers = XHCI_INTR_IN_NTRANSFERS;
1158 		} else {
1159 			usb_isoc_req_t *usrp;
1160 			ASSERT(xep->xep_type == USB_EP_ATTR_ISOCH);
1161 
1162 			usrp = (usb_isoc_req_t *)usb_req;
1163 			ntrbs = usrp->isoc_pkts_count;
1164 			ntransfers = XHCI_ISOC_IN_NTRANSFERS;
1165 		}
1166 
1167 		xpp->xpp_tsize = len;
1168 		xpp->xpp_ntransfers = ntransfers;
1169 
1170 		for (i = 0; i < xpp->xpp_ntransfers; i++) {
1171 			xhci_transfer_t *xt = xhci_transfer_alloc(xhcip, xep,
1172 			    len, ntrbs, usb_flags);
1173 			if (xt == NULL) {
1174 				xhci_hcdi_periodic_free(xhcip, xp);
1175 				mutex_exit(&xhcip->xhci_lock);
1176 				return (USB_NO_RESOURCES);
1177 			}
1178 
1179 			if (xep->xep_type == USB_EP_ATTR_INTR) {
1180 				xhci_transfer_trb_fill_data(xep, xt, 0, B_TRUE);
1181 			} else {
1182 				usb_isoc_req_t *usrp;
1183 				usrp = (usb_isoc_req_t *)usb_req;
1184 				xhci_hcdi_isoc_transfer_fill(xd, xep, xt, usrp);
1185 				xt->xt_data_tohost = B_TRUE;
1186 			}
1187 			xpp->xpp_transfers[i] = xt;
1188 		}
1189 	}
1190 
1191 	/*
1192 	 * Mark the endpoint as periodic so we don't have timeouts at play.
1193 	 */
1194 	xep->xep_state |= XHCI_ENDPOINT_PERIODIC;
1195 
1196 	/*
1197 	 * Now that we've allocated everything, go ahead and schedule them and
1198 	 * kick off the ring.
1199 	 */
1200 	for (i = 0; i < xpp->xpp_ntransfers; i++) {
1201 		int ret;
1202 		ret = xhci_endpoint_schedule(xhcip, xd, xep,
1203 		    xpp->xpp_transfers[i], B_FALSE);
1204 		if (ret != 0) {
1205 			(void) xhci_ring_reset(xhcip, &xep->xep_ring);
1206 			xep->xep_state &= ~XHCI_ENDPOINT_PERIODIC;
1207 			mutex_exit(&xhcip->xhci_lock);
1208 			return (ret);
1209 		}
1210 	}
1211 
1212 	/*
1213 	 * Don't worry about freeing memory, it'll be done when the endpoint
1214 	 * closes and the whole system is reset.
1215 	 */
1216 	xpp->xpp_usb_req = usb_req;
1217 	xpp->xpp_poll_state = XHCI_PERIODIC_POLL_ACTIVE;
1218 
1219 	ret = xhci_endpoint_ring(xhcip, xd, xep);
1220 	mutex_exit(&xhcip->xhci_lock);
1221 	return (ret);
1222 }
1223 
1224 static int
xhci_hcdi_intr_oneshot(xhci_t * xhcip,usba_pipe_handle_data_t * ph,usb_intr_req_t * uirp,usb_flags_t usb_flags)1225 xhci_hcdi_intr_oneshot(xhci_t *xhcip, usba_pipe_handle_data_t *ph,
1226     usb_intr_req_t *uirp, usb_flags_t usb_flags)
1227 {
1228 	uint_t epid;
1229 	xhci_device_t *xd;
1230 	xhci_endpoint_t *xep;
1231 	xhci_transfer_t *xt;
1232 	boolean_t datain;
1233 	mblk_t *mp = NULL;
1234 
1235 	mutex_enter(&xhcip->xhci_lock);
1236 	if (xhcip->xhci_state & XHCI_S_ERROR) {
1237 		mutex_exit(&xhcip->xhci_lock);
1238 		return (USB_HC_HARDWARE_ERROR);
1239 	}
1240 
1241 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
1242 	epid = xhci_endpoint_pipe_to_epid(ph);
1243 	if (xd->xd_endpoints[epid] == NULL) {
1244 		xhci_error(xhcip, "asked to do interrupt transfer on slot %d, "
1245 		    "port %d, endpoint: %d, but no endpoint structure",
1246 		    xd->xd_slot, xd->xd_port, epid);
1247 		mutex_exit(&xhcip->xhci_lock);
1248 		return (USB_FAILURE);
1249 	}
1250 	xep = xd->xd_endpoints[epid];
1251 
1252 	mutex_exit(&xhcip->xhci_lock);
1253 
1254 	if ((ph->p_ep.bEndpointAddress & USB_EP_DIR_MASK) == USB_EP_DIR_IN) {
1255 		datain = B_TRUE;
1256 	} else {
1257 		datain = B_FALSE;
1258 	}
1259 
1260 	xt = xhci_transfer_alloc(xhcip, xep, uirp->intr_len, 0, usb_flags);
1261 	if (xt == NULL) {
1262 		return (USB_NO_RESOURCES);
1263 	}
1264 
1265 	xt->xt_usba_req = (usb_opaque_t)uirp;
1266 	xt->xt_timeout = uirp->intr_timeout;
1267 	if (xt->xt_timeout == 0) {
1268 		xt->xt_timeout = HCDI_DEFAULT_TIMEOUT;
1269 	}
1270 
1271 	/*
1272 	 * Unlike other request types, USB Interrupt-IN requests aren't required
1273 	 * to have allocated the message block for data. If they haven't, we
1274 	 * take care of that now.
1275 	 */
1276 	if (uirp->intr_len > 0 && datain == B_TRUE && uirp->intr_data == NULL) {
1277 		if (usb_flags & USB_FLAGS_SLEEP) {
1278 			mp = allocb_wait(uirp->intr_len, BPRI_LO, STR_NOSIG,
1279 			    NULL);
1280 		} else {
1281 			mp = allocb(uirp->intr_len, 0);
1282 		}
1283 		if (mp == NULL) {
1284 			xhci_transfer_free(xhcip, xt);
1285 			mutex_exit(&xhcip->xhci_lock);
1286 			return (USB_NO_RESOURCES);
1287 		}
1288 		uirp->intr_data = mp;
1289 	}
1290 
1291 	if (uirp->intr_len > 0 && datain == B_FALSE) {
1292 		xhci_transfer_copy(xt, uirp->intr_data->b_rptr, uirp->intr_len,
1293 		    B_FALSE);
1294 		if (xhci_transfer_sync(xhcip, xt, DDI_DMA_SYNC_FORDEV) !=
1295 		    DDI_FM_OK) {
1296 			xhci_transfer_free(xhcip, xt);
1297 			xhci_error(xhcip, "failed to synchronize interrupt "
1298 			    "transfer DMA memory on endpoint %u of "
1299 			    "device on slot %d and port %d: resetting "
1300 			    "device", xep->xep_num, xd->xd_slot,
1301 			    xd->xd_port);
1302 			xhci_fm_runtime_reset(xhcip);
1303 			return (USB_HC_HARDWARE_ERROR);
1304 		}
1305 	}
1306 
1307 	xhci_transfer_trb_fill_data(xep, xt, 0, datain);
1308 	mutex_enter(&xhcip->xhci_lock);
1309 	if (xhci_endpoint_schedule(xhcip, xd, xep, xt, B_TRUE) != 0) {
1310 		if (mp != NULL) {
1311 			uirp->intr_data = NULL;
1312 			freemsg(mp);
1313 		}
1314 		xhci_transfer_free(xhcip, xt);
1315 		mutex_exit(&xhcip->xhci_lock);
1316 		return (USB_NO_RESOURCES);
1317 	}
1318 	mutex_exit(&xhcip->xhci_lock);
1319 
1320 	return (USB_SUCCESS);
1321 }
1322 
1323 /*
1324  * We've been asked to perform an interrupt transfer. When this is an interrupt
1325  * IN endpoint, that means that the hcd is being asked to start polling on the
1326  * endpoint. When the endpoint is the root hub, it effectively becomes synthetic
1327  * polling.
1328  *
1329  * When we have an interrupt out endpoint, then this is just a single simple
1330  * interrupt request that we send out and there isn't much special to do beyond
1331  * the normal activity.
1332  */
1333 static int
xhci_hcdi_pipe_intr_xfer(usba_pipe_handle_data_t * ph,usb_intr_req_t * uirp,usb_flags_t usb_flags)1334 xhci_hcdi_pipe_intr_xfer(usba_pipe_handle_data_t *ph, usb_intr_req_t *uirp,
1335     usb_flags_t usb_flags)
1336 {
1337 	int ret;
1338 	xhci_t *xhcip = xhci_hcdi_get_xhcip(ph);
1339 
1340 	if ((ph->p_ep.bEndpointAddress & USB_EP_DIR_MASK) == USB_EP_DIR_IN) {
1341 		if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR) {
1342 			ret = xhci_root_hub_intr_root_enable(xhcip, ph, uirp);
1343 		} else if (uirp->intr_attributes & USB_ATTRS_ONE_XFER) {
1344 			ret = xhci_hcdi_intr_oneshot(xhcip, ph, uirp,
1345 			    usb_flags);
1346 		} else {
1347 			ret = xhci_hcdi_periodic_init(xhcip, ph,
1348 			    (usb_opaque_t)uirp, uirp->intr_len, usb_flags);
1349 		}
1350 	} else {
1351 		if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR) {
1352 			return (USB_NOT_SUPPORTED);
1353 		}
1354 		ret = xhci_hcdi_intr_oneshot(xhcip, ph, uirp, usb_flags);
1355 	}
1356 
1357 	return (ret);
1358 }
1359 
1360 /* ARGSUSED */
1361 static int
xhci_hcdi_pipe_stop_intr_polling(usba_pipe_handle_data_t * ph,usb_flags_t usb_flags)1362 xhci_hcdi_pipe_stop_intr_polling(usba_pipe_handle_data_t *ph,
1363     usb_flags_t usb_flags)
1364 {
1365 	return (xhci_hcdi_pipe_poll_fini(ph, B_FALSE));
1366 }
1367 
1368 static int
xhci_hcdi_isoc_periodic(xhci_t * xhcip,usba_pipe_handle_data_t * ph,usb_isoc_req_t * usrp,usb_flags_t usb_flags)1369 xhci_hcdi_isoc_periodic(xhci_t *xhcip, usba_pipe_handle_data_t *ph,
1370     usb_isoc_req_t *usrp, usb_flags_t usb_flags)
1371 {
1372 	int i;
1373 	size_t count;
1374 
1375 	count = 0;
1376 	for (i = 0; i < usrp->isoc_pkts_count; i++) {
1377 		count += usrp->isoc_pkt_descr[i].isoc_pkt_length;
1378 	}
1379 
1380 	return (xhci_hcdi_periodic_init(xhcip, ph, (usb_opaque_t)usrp, count,
1381 	    usb_flags));
1382 }
1383 
1384 /*
1385  * This is used to create an isochronous request to send data out to the device.
1386  * This is a single one shot request, it is not something that we'll have to
1387  * repeat over and over.
1388  */
1389 static int
xhci_hcdi_isoc_oneshot(xhci_t * xhcip,usba_pipe_handle_data_t * ph,usb_isoc_req_t * usrp,usb_flags_t usb_flags)1390 xhci_hcdi_isoc_oneshot(xhci_t *xhcip, usba_pipe_handle_data_t *ph,
1391     usb_isoc_req_t *usrp, usb_flags_t usb_flags)
1392 {
1393 	int i, ret;
1394 	uint_t epid;
1395 	size_t count, mblen;
1396 	xhci_device_t *xd;
1397 	xhci_endpoint_t *xep;
1398 	xhci_transfer_t *xt;
1399 
1400 	count = 0;
1401 	for (i = 0; i < usrp->isoc_pkts_count; i++) {
1402 		count += usrp->isoc_pkt_descr[i].isoc_pkt_length;
1403 	}
1404 	mblen = MBLKL(usrp->isoc_data);
1405 
1406 	if (count != mblen) {
1407 		return (USB_INVALID_ARGS);
1408 	}
1409 
1410 	mutex_enter(&xhcip->xhci_lock);
1411 	if (xhcip->xhci_state & XHCI_S_ERROR) {
1412 		mutex_exit(&xhcip->xhci_lock);
1413 		return (USB_HC_HARDWARE_ERROR);
1414 	}
1415 
1416 	xd = usba_hcdi_get_device_private(ph->p_usba_device);
1417 	epid = xhci_endpoint_pipe_to_epid(ph);
1418 	if (xd->xd_endpoints[epid] == NULL) {
1419 		xhci_error(xhcip, "asked to do isochronous transfer on slot "
1420 		    "%d, port %d, endpoint: %d, but no endpoint structure",
1421 		    xd->xd_slot, xd->xd_port, epid);
1422 		mutex_exit(&xhcip->xhci_lock);
1423 		return (USB_FAILURE);
1424 	}
1425 	xep = xd->xd_endpoints[epid];
1426 	mutex_exit(&xhcip->xhci_lock);
1427 
1428 	xt = xhci_transfer_alloc(xhcip, xep, mblen, usrp->isoc_pkts_count,
1429 	    usb_flags);
1430 	if (xt == NULL) {
1431 		return (USB_NO_RESOURCES);
1432 	}
1433 	xt->xt_usba_req = (usb_opaque_t)usrp;
1434 
1435 	/*
1436 	 * USBA doesn't provide any real way for a timeout to be defined for an
1437 	 * isochronous event. However, since we technically aren't a periodic
1438 	 * endpoint, go ahead and always set the default timeout. It's better
1439 	 * than nothing.
1440 	 */
1441 	xt->xt_timeout = HCDI_DEFAULT_TIMEOUT;
1442 
1443 	xhci_transfer_copy(xt, usrp->isoc_data->b_rptr, mblen, B_FALSE);
1444 	if (xhci_transfer_sync(xhcip, xt, DDI_DMA_SYNC_FORDEV) != DDI_FM_OK) {
1445 		xhci_transfer_free(xhcip, xt);
1446 		xhci_error(xhcip, "failed to synchronize isochronous "
1447 		    "transfer DMA memory on endpoint %u of "
1448 		    "device on slot %d and port %d: resetting "
1449 		    "device", xep->xep_num, xd->xd_slot,
1450 		    xd->xd_port);
1451 		xhci_fm_runtime_reset(xhcip);
1452 		return (USB_HC_HARDWARE_ERROR);
1453 	}
1454 
1455 	/*
1456 	 * Fill in the ISOC data. Note, that we always use ASAP scheduling and
1457 	 * we don't support specifying the frame at this time, for better or
1458 	 * worse.
1459 	 */
1460 	xhci_hcdi_isoc_transfer_fill(xd, xep, xt, usrp);
1461 
1462 	mutex_enter(&xhcip->xhci_lock);
1463 	ret = xhci_endpoint_schedule(xhcip, xd, xep, xt, B_TRUE);
1464 	mutex_exit(&xhcip->xhci_lock);
1465 
1466 	return (ret);
1467 }
1468 
1469 static int
xhci_hcdi_pipe_isoc_xfer(usba_pipe_handle_data_t * ph,usb_isoc_req_t * usrp,usb_flags_t usb_flags)1470 xhci_hcdi_pipe_isoc_xfer(usba_pipe_handle_data_t *ph, usb_isoc_req_t *usrp,
1471     usb_flags_t usb_flags)
1472 {
1473 	int ret;
1474 	xhci_t *xhcip;
1475 
1476 	xhcip = xhci_hcdi_get_xhcip(ph);
1477 
1478 	/*
1479 	 * We don't support isochronous transactions on the root hub at all.
1480 	 * Always fail them if for some reason we end up here.
1481 	 */
1482 	if (ph->p_usba_device->usb_addr == ROOT_HUB_ADDR) {
1483 		return (USB_NOT_SUPPORTED);
1484 	}
1485 
1486 	/*
1487 	 * We do not support being asked to set the frame ID at this time. We
1488 	 * require that everything specify the attribute
1489 	 * USB_ATTRS_ISOC_XFER_ASAP.
1490 	 */
1491 	if (!(usrp->isoc_attributes & USB_ATTRS_ISOC_XFER_ASAP)) {
1492 		return (USB_NOT_SUPPORTED);
1493 	}
1494 
1495 	if ((ph->p_ep.bEndpointAddress & USB_EP_DIR_MASK) == USB_EP_DIR_IN) {
1496 		/*
1497 		 * Note, there is no such thing as a non-periodic isochronous
1498 		 * incoming transfer.
1499 		 */
1500 		ret = xhci_hcdi_isoc_periodic(xhcip, ph, usrp, usb_flags);
1501 	} else {
1502 		ret = xhci_hcdi_isoc_oneshot(xhcip, ph, usrp, usb_flags);
1503 	}
1504 
1505 	return (ret);
1506 }
1507 
1508 /* ARGSUSED */
1509 static int
xhci_hcdi_pipe_stop_isoc_polling(usba_pipe_handle_data_t * ph,usb_flags_t usb_flags)1510 xhci_hcdi_pipe_stop_isoc_polling(usba_pipe_handle_data_t *ph,
1511     usb_flags_t usb_flags)
1512 {
1513 	return (xhci_hcdi_pipe_poll_fini(ph, B_FALSE));
1514 }
1515 
1516 /*
1517  * This is asking us for the current frame number. The USBA expects this to
1518  * actually be a bit of a fiction, as it tries to maintain a frame number well
1519  * beyond what the hardware actually contains in its registers. Hardware
1520  * basically has a 14-bit counter, whereas we need to have a constant amount of
1521  * milliseconds.
1522  *
1523  * Today, no client drivers actually use this API and everyone specifies the
1524  * attribute to say that we should schedule things ASAP. So until we have some
1525  * real device that want this functionality, we're going to fail.
1526  */
1527 /* ARGSUSED */
1528 static int
xhci_hcdi_get_current_frame_number(usba_device_t * usba_device,usb_frame_number_t * frame_number)1529 xhci_hcdi_get_current_frame_number(usba_device_t *usba_device,
1530     usb_frame_number_t *frame_number)
1531 {
1532 	return (USB_FAILURE);
1533 }
1534 
1535 /*
1536  * See the comments around the XHCI_ISOC_MAX_TRB macro for more information.
1537  */
1538 /* ARGSUSED */
1539 static int
xhci_hcdi_get_max_isoc_pkts(usba_device_t * usba_device,uint_t * max_isoc_pkts_per_request)1540 xhci_hcdi_get_max_isoc_pkts(usba_device_t *usba_device,
1541     uint_t *max_isoc_pkts_per_request)
1542 {
1543 	*max_isoc_pkts_per_request = XHCI_ISOC_MAX_TRB;
1544 	return (USB_SUCCESS);
1545 }
1546 
1547 /*
1548  * VERSION 2 ops and helpers
1549  */
1550 
1551 static void
xhci_hcdi_device_free(xhci_device_t * xd)1552 xhci_hcdi_device_free(xhci_device_t *xd)
1553 {
1554 	xhci_dma_free(&xd->xd_ictx);
1555 	xhci_dma_free(&xd->xd_octx);
1556 	mutex_destroy(&xd->xd_imtx);
1557 	kmem_free(xd, sizeof (xhci_device_t));
1558 }
1559 
1560 /*
1561  * Calculate the device's route string. In USB 3.0 the route string is a 20-bit
1562  * number. Each four bits represent a port number attached to a deeper hub.
1563  * Particularly it represents the port on that current hub that you need to go
1564  * down to reach the next device. Bits 0-3 represent the first *external* hub.
1565  * So a device connected to a root hub has a route string of zero. Imagine the
1566  * following set of devices:
1567  *
1568  *               . port 2      . port 5
1569  *               .             .
1570  *  +----------+ .  +--------+ .  +-------+
1571  *  | root hub |-*->| hub 1  |-*->| hub 2 |
1572  *  +----------+    +--------+    +-------+
1573  *       * . port 12    * . port 8    * . port 1
1574  *       v              v             v
1575  *   +-------+      +-------+     +-------+
1576  *   | dev a |      | dev b |     | dev c |
1577  *   +-------+      +-------+     +-------+
1578  *
1579  * So, based on the above diagram, device a should have a route string of 0,
1580  * because it's directly connected to the root port. Device b would simply have
1581  * a route string of 8. This is because it travels through one non-root hub, hub
1582  * 1, and it does so on port 8. The root ports basically don't matter. Device c
1583  * would then have a route string of 0x15, as it's first traversing through hub
1584  * 1 on port 2 and then hub 2 on port 5.
1585  *
1586  * Finally, it's worth mentioning that because it's a four bit field, if for
1587  * some reason a device has more than 15 ports, we just treat the value as 15.
1588  *
1589  * Note, as part of this, we also grab what port on the root hub this whole
1590  * chain is on, as we're required to store that information in the slot context.
1591  */
1592 static void
xhci_hcdi_device_route(usba_device_t * ud,uint32_t * routep,uint32_t * root_port)1593 xhci_hcdi_device_route(usba_device_t *ud, uint32_t *routep, uint32_t *root_port)
1594 {
1595 	uint32_t route = 0;
1596 	usba_device_t *hub = ud->usb_parent_hub;
1597 	usba_device_t *port_dev = ud;
1598 
1599 	ASSERT(hub != NULL);
1600 
1601 	/*
1602 	 * Iterate over every hub, updating the route as we go. When we
1603 	 * encounter a hub without a parent, then we're at the root hub. At
1604 	 * which point, the port we want is on port_dev (the child of hub).
1605 	 */
1606 	while (hub->usb_parent_hub != NULL) {
1607 		uint32_t p;
1608 
1609 		p = port_dev->usb_port;
1610 		if (p > 15)
1611 			p = 15;
1612 		route <<= 4;
1613 		route |= p & 0xf;
1614 		port_dev = hub;
1615 		hub = hub->usb_parent_hub;
1616 	}
1617 
1618 	ASSERT(port_dev->usb_parent_hub == hub);
1619 	*root_port = port_dev->usb_port;
1620 	*routep = XHCI_ROUTE_MASK(route);
1621 }
1622 
1623 /*
1624  * If a low or full speed device is behind a high-speed device that is not a
1625  * root hub, then we must include the port and slot of that device. USBA already
1626  * stores this device in the usb_hs_hub_usba_dev member.
1627  */
1628 static uint32_t
xhci_hcdi_device_tt(usba_device_t * ud)1629 xhci_hcdi_device_tt(usba_device_t *ud)
1630 {
1631 	uint32_t ret;
1632 	xhci_device_t *xd;
1633 
1634 	if (ud->usb_port_status >= USBA_HIGH_SPEED_DEV)
1635 		return (0);
1636 
1637 	if (ud->usb_hs_hub_usba_dev == NULL)
1638 		return (0);
1639 
1640 	ASSERT(ud->usb_hs_hub_usba_dev != NULL);
1641 	ASSERT(ud->usb_hs_hub_usba_dev->usb_parent_hub != NULL);
1642 	xd = usba_hcdi_get_device_private(ud->usb_hs_hub_usba_dev);
1643 	ASSERT(xd != NULL);
1644 
1645 	ret = XHCI_SCTX_SET_TT_HUB_SID(xd->xd_slot);
1646 	ret |= XHCI_SCTX_SET_TT_PORT_NUM(ud->usb_hs_hub_usba_dev->usb_port);
1647 
1648 	return (ret);
1649 }
1650 
1651 /*
1652  * Initialize a new device. This allocates a device slot from the controller,
1653  * which tranfers it to our control.
1654  */
1655 static int
xhci_hcdi_device_init(usba_device_t * ud,usb_port_t port,void ** hcdpp)1656 xhci_hcdi_device_init(usba_device_t *ud, usb_port_t port, void **hcdpp)
1657 {
1658 	int ret, i;
1659 	xhci_device_t *xd;
1660 	ddi_device_acc_attr_t acc;
1661 	ddi_dma_attr_t attr;
1662 	xhci_t *xhcip = xhci_hcdi_get_xhcip_from_dev(ud);
1663 	size_t isize, osize, incr;
1664 	uint32_t route, rp, info, info2, tt;
1665 
1666 	xd = kmem_zalloc(sizeof (xhci_device_t), KM_SLEEP);
1667 	xd->xd_port = port;
1668 	xd->xd_usbdev = ud;
1669 	mutex_init(&xd->xd_imtx, NULL, MUTEX_DRIVER,
1670 	    (void *)(uintptr_t)xhcip->xhci_intr_pri);
1671 
1672 	/*
1673 	 * The size of the context structures is based upon the presence of the
1674 	 * context flag which determines whether we have a 32-byte or 64-byte
1675 	 * context. Note that the input context always has to account for the
1676 	 * entire size of the xhci_input_contex_t, which is 32-bytes by default.
1677 	 */
1678 	if (xhcip->xhci_caps.xcap_flags & XCAP_CSZ) {
1679 		incr = 64;
1680 		osize = XHCI_DEVICE_CONTEXT_64;
1681 		isize = XHCI_DEVICE_CONTEXT_64 + incr;
1682 	} else {
1683 		incr = 32;
1684 		osize = XHCI_DEVICE_CONTEXT_32;
1685 		isize = XHCI_DEVICE_CONTEXT_32 + incr;
1686 	}
1687 
1688 	xhci_dma_acc_attr(xhcip, &acc);
1689 	xhci_dma_dma_attr(xhcip, &attr);
1690 	if (xhci_dma_alloc(xhcip, &xd->xd_ictx, &attr, &acc, B_TRUE,
1691 	    isize, B_FALSE) == B_FALSE) {
1692 		xhci_hcdi_device_free(xd);
1693 		return (USB_NO_RESOURCES);
1694 	}
1695 
1696 	xd->xd_input = (xhci_input_context_t *)xd->xd_ictx.xdb_va;
1697 	xd->xd_slotin = (xhci_slot_context_t *)(xd->xd_ictx.xdb_va + incr);
1698 	for (i = 0; i < XHCI_NUM_ENDPOINTS; i++) {
1699 		xd->xd_endin[i] =
1700 		    (xhci_endpoint_context_t *)(xd->xd_ictx.xdb_va +
1701 		    (i + 2) * incr);
1702 	}
1703 
1704 	if (xhci_dma_alloc(xhcip, &xd->xd_octx, &attr, &acc, B_TRUE,
1705 	    osize, B_FALSE) == B_FALSE) {
1706 		xhci_hcdi_device_free(xd);
1707 		return (USB_NO_RESOURCES);
1708 	}
1709 	xd->xd_slotout = (xhci_slot_context_t *)xd->xd_octx.xdb_va;
1710 	for (i = 0; i < XHCI_NUM_ENDPOINTS; i++) {
1711 		xd->xd_endout[i] =
1712 		    (xhci_endpoint_context_t *)(xd->xd_octx.xdb_va +
1713 		    (i + 1) * incr);
1714 	}
1715 
1716 	ret = xhci_command_enable_slot(xhcip, &xd->xd_slot);
1717 	if (ret != USB_SUCCESS) {
1718 		xhci_hcdi_device_free(xd);
1719 		return (ret);
1720 	}
1721 
1722 	/*
1723 	 * These are the default slot context and the endpoint zero context that
1724 	 * we're enabling. See 4.3.3.
1725 	 */
1726 	xd->xd_input->xic_add_flags = LE_32(XHCI_INCTX_MASK_DCI(0) |
1727 	    XHCI_INCTX_MASK_DCI(1));
1728 
1729 	/*
1730 	 * Note, we never need to set the MTT bit as illumos never enables the
1731 	 * alternate MTT interface.
1732 	 */
1733 	xhci_hcdi_device_route(ud, &route, &rp);
1734 	info = XHCI_SCTX_SET_ROUTE(route) | XHCI_SCTX_SET_DCI(1);
1735 	switch (ud->usb_port_status) {
1736 	case USBA_LOW_SPEED_DEV:
1737 		info |= XHCI_SCTX_SET_SPEED(XHCI_SPEED_LOW);
1738 		break;
1739 	case USBA_HIGH_SPEED_DEV:
1740 		info |= XHCI_SCTX_SET_SPEED(XHCI_SPEED_HIGH);
1741 		break;
1742 	case USBA_FULL_SPEED_DEV:
1743 		info |= XHCI_SCTX_SET_SPEED(XHCI_SPEED_FULL);
1744 		break;
1745 	case USBA_SUPER_SPEED_DEV:
1746 	default:
1747 		info |= XHCI_SCTX_SET_SPEED(XHCI_SPEED_SUPER);
1748 		break;
1749 	}
1750 	info2 = XHCI_SCTX_SET_RHPORT(rp);
1751 	tt = XHCI_SCTX_SET_IRQ_TARGET(0);
1752 	tt |= xhci_hcdi_device_tt(ud);
1753 
1754 	xd->xd_slotin->xsc_info = LE_32(info);
1755 	xd->xd_slotin->xsc_info2 = LE_32(info2);
1756 	xd->xd_slotin->xsc_tt = LE_32(tt);
1757 
1758 	if ((ret = xhci_endpoint_init(xhcip, xd, NULL)) != 0) {
1759 		(void) xhci_command_disable_slot(xhcip, xd->xd_slot);
1760 		xhci_hcdi_device_free(xd);
1761 		return (USB_HC_HARDWARE_ERROR);
1762 	}
1763 
1764 	if (xhci_context_slot_output_init(xhcip, xd) != B_TRUE) {
1765 		(void) xhci_command_disable_slot(xhcip, xd->xd_slot);
1766 		xhci_endpoint_fini(xd, 0);
1767 		xhci_hcdi_device_free(xd);
1768 		return (USB_HC_HARDWARE_ERROR);
1769 	}
1770 
1771 	if ((ret = xhci_command_set_address(xhcip, xd, B_TRUE)) != 0) {
1772 		(void) xhci_command_disable_slot(xhcip, xd->xd_slot);
1773 		xhci_context_slot_output_fini(xhcip, xd);
1774 		xhci_endpoint_fini(xd, 0);
1775 		xhci_hcdi_device_free(xd);
1776 		return (ret);
1777 	}
1778 
1779 	mutex_enter(&xhcip->xhci_lock);
1780 	list_insert_tail(&xhcip->xhci_usba.xa_devices, xd);
1781 	mutex_exit(&xhcip->xhci_lock);
1782 
1783 	*hcdpp = xd;
1784 	return (ret);
1785 }
1786 
1787 /*
1788  * We're tearing down a device now.
1789  */
1790 static void
xhci_hcdi_device_fini(usba_device_t * ud,void * hcdp)1791 xhci_hcdi_device_fini(usba_device_t *ud, void *hcdp)
1792 {
1793 	int ret;
1794 	xhci_endpoint_t *xep;
1795 	xhci_device_t *xd;
1796 	xhci_t *xhcip;
1797 
1798 	/*
1799 	 * Right now, it's theoretically possible that USBA may try and call
1800 	 * us here even if we hadn't successfully finished the device_init()
1801 	 * endpoint. We should probably modify the USBA to make sure that this
1802 	 * can't happen.
1803 	 */
1804 	if (hcdp == NULL)
1805 		return;
1806 
1807 	xd = hcdp;
1808 	xhcip = xhci_hcdi_get_xhcip_from_dev(ud);
1809 
1810 	/*
1811 	 * Make sure we have no timeout running on the default endpoint still.
1812 	 */
1813 	xep = xd->xd_endpoints[XHCI_DEFAULT_ENDPOINT];
1814 	mutex_enter(&xhcip->xhci_lock);
1815 	xep->xep_state |= XHCI_ENDPOINT_TEARDOWN;
1816 	mutex_exit(&xhcip->xhci_lock);
1817 	(void) untimeout(xep->xep_timeout);
1818 
1819 	/*
1820 	 * Go ahead and disable the slot. There's no reason to do anything
1821 	 * special about the default endpoint as it will be disabled as a part
1822 	 * of the slot disabling. However, if this all fails, we'll leave this
1823 	 * sitting here in a failed state, eating up a device slot. It is
1824 	 * unlikely this will occur.
1825 	 */
1826 	ret = xhci_command_disable_slot(xhcip, xd->xd_slot);
1827 	if (ret != USB_SUCCESS) {
1828 		xhci_error(xhcip, "failed to disable slot %d: %d",
1829 		    xd->xd_slot, ret);
1830 		return;
1831 	}
1832 
1833 	xhci_context_slot_output_fini(xhcip, xd);
1834 
1835 	/*
1836 	 * Once the slot is disabled, we can free any endpoints that were
1837 	 * opened.
1838 	 */
1839 	for (uint_t n = 0; n < XHCI_NUM_ENDPOINTS; n++) {
1840 		if (xd->xd_endpoints[n] != NULL) {
1841 			xhci_endpoint_fini(xd, n);
1842 		}
1843 	}
1844 
1845 	mutex_enter(&xhcip->xhci_lock);
1846 	list_remove(&xhcip->xhci_usba.xa_devices, xd);
1847 	mutex_exit(&xhcip->xhci_lock);
1848 
1849 	xhci_hcdi_device_free(xd);
1850 }
1851 
1852 /*
1853  * Synchronously attempt to set the device address. For xHCI this involves it
1854  * deciding what address to use.
1855  */
1856 static int
xhci_hcdi_device_address(usba_device_t * ud)1857 xhci_hcdi_device_address(usba_device_t *ud)
1858 {
1859 	int ret;
1860 	xhci_t *xhcip = xhci_hcdi_get_xhcip_from_dev(ud);
1861 	xhci_device_t *xd = usba_hcdi_get_device_private(ud);
1862 	xhci_endpoint_t *xep;
1863 
1864 	mutex_enter(&xhcip->xhci_lock);
1865 
1866 	/*
1867 	 * This device may already be addressed from the perspective of the xhci
1868 	 * controller. For example, the device this represents may have been
1869 	 * unconfigured, which does not actually remove the slot or other
1870 	 * information, merely tears down all the active use of it and the child
1871 	 * driver. In such cases, if we're already addressed, just return
1872 	 * success. The actual USB address is a fiction for USBA anyways.
1873 	 */
1874 	if (xd->xd_addressed == B_TRUE) {
1875 		mutex_exit(&xhcip->xhci_lock);
1876 		return (USB_SUCCESS);
1877 	}
1878 
1879 	ASSERT(xd->xd_addressed == B_FALSE);
1880 	xd->xd_addressed = B_TRUE;
1881 	VERIFY3P(xd->xd_endpoints[XHCI_DEFAULT_ENDPOINT], !=, NULL);
1882 	xep = xd->xd_endpoints[XHCI_DEFAULT_ENDPOINT];
1883 	mutex_exit(&xhcip->xhci_lock);
1884 
1885 	if ((ret = xhci_endpoint_setup_default_context(xhcip, xd, xep)) != 0) {
1886 		ASSERT(ret == EIO);
1887 		return (USB_HC_HARDWARE_ERROR);
1888 	}
1889 
1890 	ret = xhci_command_set_address(xhcip, xd, B_FALSE);
1891 
1892 	if (ret != USB_SUCCESS) {
1893 		mutex_enter(&xhcip->xhci_lock);
1894 		xd->xd_addressed = B_FALSE;
1895 		mutex_exit(&xhcip->xhci_lock);
1896 	}
1897 
1898 	return (ret);
1899 }
1900 
1901 /*
1902  * This is called relatively early on in a hub's life time. At this point, it's
1903  * descriptors have all been pulled and the default control pipe is still open.
1904  * What we need to do is go through and update the slot context to indicate that
1905  * this is a hub, otherwise, the controller will never let us speak to
1906  * downstream ports.
1907  */
1908 static int
xhci_hcdi_hub_update(usba_device_t * ud,uint8_t nports,uint8_t tt)1909 xhci_hcdi_hub_update(usba_device_t *ud, uint8_t nports, uint8_t tt)
1910 {
1911 	int ret;
1912 	xhci_t *xhcip = xhci_hcdi_get_xhcip_from_dev(ud);
1913 	xhci_device_t *xd = usba_hcdi_get_device_private(ud);
1914 
1915 	if (xd == NULL)
1916 		return (USB_FAILURE);
1917 
1918 	if (ud->usb_hubdi == NULL) {
1919 		return (USB_FAILURE);
1920 	}
1921 
1922 	mutex_enter(&xd->xd_imtx);
1923 
1924 	/*
1925 	 * Note, that usba never sets the interface of a hub to Multi TT. Hence
1926 	 * why we're never setting the MTT bit in xsc_info.
1927 	 */
1928 	xd->xd_slotin->xsc_info |= LE_32(XHCI_SCTX_SET_HUB(1));
1929 	xd->xd_slotin->xsc_info2 |= LE_32(XHCI_SCTX_SET_NPORTS(nports));
1930 	if (ud->usb_port_status == USBA_HIGH_SPEED_DEV)
1931 		xd->xd_slotin->xsc_tt |= LE_32(XHCI_SCTX_SET_TT_THINK_TIME(tt));
1932 
1933 	/*
1934 	 * We're only updating the slot context, no endpoint contexts should be
1935 	 * touched.
1936 	 */
1937 	xd->xd_input->xic_drop_flags = LE_32(0);
1938 	xd->xd_input->xic_add_flags = LE_32(XHCI_INCTX_MASK_DCI(0));
1939 
1940 	ret = xhci_command_evaluate_context(xhcip, xd);
1941 	mutex_exit(&xd->xd_imtx);
1942 	return (ret);
1943 }
1944 
1945 void
xhci_hcd_fini(xhci_t * xhcip)1946 xhci_hcd_fini(xhci_t *xhcip)
1947 {
1948 	usba_hcdi_unregister(xhcip->xhci_dip);
1949 	usba_free_hcdi_ops(xhcip->xhci_usba.xa_ops);
1950 	list_destroy(&xhcip->xhci_usba.xa_pipes);
1951 	list_destroy(&xhcip->xhci_usba.xa_devices);
1952 }
1953 
1954 int
xhci_hcd_init(xhci_t * xhcip)1955 xhci_hcd_init(xhci_t *xhcip)
1956 {
1957 	usba_hcdi_register_args_t hreg;
1958 	usba_hcdi_ops_t *ops;
1959 
1960 	ops = usba_alloc_hcdi_ops();
1961 	VERIFY(ops != NULL);
1962 
1963 	ops->usba_hcdi_ops_version = HCDI_OPS_VERSION;
1964 	ops->usba_hcdi_dip = xhcip->xhci_dip;
1965 
1966 	ops->usba_hcdi_pm_support = xhci_hcdi_pm_support;
1967 	ops->usba_hcdi_pipe_open = xhci_hcdi_pipe_open;
1968 	ops->usba_hcdi_pipe_close = xhci_hcdi_pipe_close;
1969 	ops->usba_hcdi_pipe_reset = xhci_hcdi_pipe_reset;
1970 	ops->usba_hcdi_pipe_reset_data_toggle =
1971 	    xhci_hcdi_pipe_reset_data_toggle;
1972 	ops->usba_hcdi_pipe_ctrl_xfer = xhci_hcdi_pipe_ctrl_xfer;
1973 	ops->usba_hcdi_bulk_transfer_size = xhci_hcdi_bulk_transfer_size;
1974 	ops->usba_hcdi_pipe_bulk_xfer = xhci_hcdi_pipe_bulk_xfer;
1975 	ops->usba_hcdi_pipe_intr_xfer = xhci_hcdi_pipe_intr_xfer;
1976 	ops->usba_hcdi_pipe_stop_intr_polling =
1977 	    xhci_hcdi_pipe_stop_intr_polling;
1978 	ops->usba_hcdi_pipe_isoc_xfer = xhci_hcdi_pipe_isoc_xfer;
1979 	ops->usba_hcdi_pipe_stop_isoc_polling =
1980 	    xhci_hcdi_pipe_stop_isoc_polling;
1981 	ops->usba_hcdi_get_current_frame_number =
1982 	    xhci_hcdi_get_current_frame_number;
1983 	ops->usba_hcdi_get_max_isoc_pkts = xhci_hcdi_get_max_isoc_pkts;
1984 	ops->usba_hcdi_console_input_init = xhci_hcdi_console_input_init;
1985 	ops->usba_hcdi_console_input_fini = xhci_hcdi_console_input_fini;
1986 	ops->usba_hcdi_console_input_enter = xhci_hcdi_console_input_enter;
1987 	ops->usba_hcdi_console_read = xhci_hcdi_console_read;
1988 	ops->usba_hcdi_console_input_exit = xhci_hcdi_console_input_exit;
1989 
1990 	ops->usba_hcdi_console_output_init = xhci_hcdi_console_output_init;
1991 	ops->usba_hcdi_console_output_fini = xhci_hcdi_console_output_fini;
1992 	ops->usba_hcdi_console_output_enter = xhci_hcdi_console_output_enter;
1993 	ops->usba_hcdi_console_write = xhci_hcdi_console_write;
1994 	ops->usba_hcdi_console_output_exit = xhci_hcdi_console_output_exit;
1995 
1996 	ops->usba_hcdi_device_init = xhci_hcdi_device_init;
1997 	ops->usba_hcdi_device_fini = xhci_hcdi_device_fini;
1998 	ops->usba_hcdi_device_address = xhci_hcdi_device_address;
1999 	ops->usba_hcdi_hub_update = xhci_hcdi_hub_update;
2000 
2001 	hreg.usba_hcdi_register_version = HCDI_REGISTER_VERSION;
2002 	hreg.usba_hcdi_register_dip = xhcip->xhci_dip;
2003 	hreg.usba_hcdi_register_ops = ops;
2004 
2005 	/*
2006 	 * We're required to give xhci a set of DMA attributes that it may loan
2007 	 * out to other devices. Therefore we'll be conservative with what we
2008 	 * end up giving it.
2009 	 */
2010 	xhci_dma_dma_attr(xhcip, &xhcip->xhci_usba.xa_dma_attr);
2011 	hreg.usba_hcdi_register_dma_attr = &xhcip->xhci_usba.xa_dma_attr;
2012 
2013 	hreg.usba_hcdi_register_iblock_cookie =
2014 	    (ddi_iblock_cookie_t)(uintptr_t)xhcip->xhci_intr_pri;
2015 
2016 	if (usba_hcdi_register(&hreg, 0) != DDI_SUCCESS) {
2017 		usba_free_hcdi_ops(ops);
2018 		return (DDI_FAILURE);
2019 	}
2020 
2021 	xhcip->xhci_usba.xa_ops = ops;
2022 
2023 	list_create(&xhcip->xhci_usba.xa_devices, sizeof (xhci_device_t),
2024 	    offsetof(xhci_device_t, xd_link));
2025 	list_create(&xhcip->xhci_usba.xa_pipes, sizeof (xhci_pipe_t),
2026 	    offsetof(xhci_pipe_t, xp_link));
2027 
2028 
2029 	return (DDI_SUCCESS);
2030 }
2031