1 // SPDX-License-Identifier: GPL-2.0
2
3 /*
4 * Xen mmu operations
5 *
6 * This file contains the various mmu fetch and update operations.
7 * The most important job they must perform is the mapping between the
8 * domain's pfn and the overall machine mfns.
9 *
10 * Xen allows guests to directly update the pagetable, in a controlled
11 * fashion. In other words, the guest modifies the same pagetable
12 * that the CPU actually uses, which eliminates the overhead of having
13 * a separate shadow pagetable.
14 *
15 * In order to allow this, it falls on the guest domain to map its
16 * notion of a "physical" pfn - which is just a domain-local linear
17 * address - into a real "machine address" which the CPU's MMU can
18 * use.
19 *
20 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
21 * inserted directly into the pagetable. When creating a new
22 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
23 * when reading the content back with __(pgd|pmd|pte)_val, it converts
24 * the mfn back into a pfn.
25 *
26 * The other constraint is that all pages which make up a pagetable
27 * must be mapped read-only in the guest. This prevents uncontrolled
28 * guest updates to the pagetable. Xen strictly enforces this, and
29 * will disallow any pagetable update which will end up mapping a
30 * pagetable page RW, and will disallow using any writable page as a
31 * pagetable.
32 *
33 * Naively, when loading %cr3 with the base of a new pagetable, Xen
34 * would need to validate the whole pagetable before going on.
35 * Naturally, this is quite slow. The solution is to "pin" a
36 * pagetable, which enforces all the constraints on the pagetable even
37 * when it is not actively in use. This means that Xen can be assured
38 * that it is still valid when you do load it into %cr3, and doesn't
39 * need to revalidate it.
40 *
41 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
42 */
43 #include <linux/sched/mm.h>
44 #include <linux/debugfs.h>
45 #include <linux/bug.h>
46 #include <linux/vmalloc.h>
47 #include <linux/export.h>
48 #include <linux/init.h>
49 #include <linux/gfp.h>
50 #include <linux/memblock.h>
51 #include <linux/seq_file.h>
52 #include <linux/crash_dump.h>
53 #include <linux/pgtable.h>
54 #ifdef CONFIG_KEXEC_CORE
55 #include <linux/kexec.h>
56 #endif
57
58 #include <trace/events/xen.h>
59
60 #include <asm/tlbflush.h>
61 #include <asm/fixmap.h>
62 #include <asm/mmu_context.h>
63 #include <asm/setup.h>
64 #include <asm/paravirt.h>
65 #include <asm/e820/api.h>
66 #include <asm/linkage.h>
67 #include <asm/page.h>
68 #include <asm/init.h>
69 #include <asm/memtype.h>
70 #include <asm/smp.h>
71 #include <asm/tlb.h>
72
73 #include <asm/xen/hypercall.h>
74 #include <asm/xen/hypervisor.h>
75
76 #include <xen/xen.h>
77 #include <xen/page.h>
78 #include <xen/interface/xen.h>
79 #include <xen/interface/hvm/hvm_op.h>
80 #include <xen/interface/version.h>
81 #include <xen/interface/memory.h>
82 #include <xen/hvc-console.h>
83 #include <xen/swiotlb-xen.h>
84
85 #include "xen-ops.h"
86
87 /*
88 * Prototypes for functions called via PV_CALLEE_SAVE_REGS_THUNK() in order
89 * to avoid warnings with "-Wmissing-prototypes".
90 */
91 pteval_t xen_pte_val(pte_t pte);
92 pgdval_t xen_pgd_val(pgd_t pgd);
93 pmdval_t xen_pmd_val(pmd_t pmd);
94 pudval_t xen_pud_val(pud_t pud);
95 p4dval_t xen_p4d_val(p4d_t p4d);
96 pte_t xen_make_pte(pteval_t pte);
97 pgd_t xen_make_pgd(pgdval_t pgd);
98 pmd_t xen_make_pmd(pmdval_t pmd);
99 pud_t xen_make_pud(pudval_t pud);
100 p4d_t xen_make_p4d(p4dval_t p4d);
101 pte_t xen_make_pte_init(pteval_t pte);
102
103 #ifdef CONFIG_X86_VSYSCALL_EMULATION
104 /* l3 pud for userspace vsyscall mapping */
105 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
106 #endif
107
108 /*
109 * Protects atomic reservation decrease/increase against concurrent increases.
110 * Also protects non-atomic updates of current_pages and balloon lists.
111 */
112 static DEFINE_SPINLOCK(xen_reservation_lock);
113
114 /*
115 * Note about cr3 (pagetable base) values:
116 *
117 * xen_cr3 contains the current logical cr3 value; it contains the
118 * last set cr3. This may not be the current effective cr3, because
119 * its update may be being lazily deferred. However, a vcpu looking
120 * at its own cr3 can use this value knowing that it everything will
121 * be self-consistent.
122 *
123 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
124 * hypercall to set the vcpu cr3 is complete (so it may be a little
125 * out of date, but it will never be set early). If one vcpu is
126 * looking at another vcpu's cr3 value, it should use this variable.
127 */
128 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
129 static DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
130
131 static phys_addr_t xen_pt_base, xen_pt_size __initdata;
132
133 static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
134
135 /*
136 * Just beyond the highest usermode address. STACK_TOP_MAX has a
137 * redzone above it, so round it up to a PGD boundary.
138 */
139 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
140
make_lowmem_page_readonly(void * vaddr)141 void make_lowmem_page_readonly(void *vaddr)
142 {
143 pte_t *pte, ptev;
144 unsigned long address = (unsigned long)vaddr;
145 unsigned int level;
146
147 pte = lookup_address(address, &level);
148 if (pte == NULL)
149 return; /* vaddr missing */
150
151 ptev = pte_wrprotect(*pte);
152
153 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
154 BUG();
155 }
156
make_lowmem_page_readwrite(void * vaddr)157 void make_lowmem_page_readwrite(void *vaddr)
158 {
159 pte_t *pte, ptev;
160 unsigned long address = (unsigned long)vaddr;
161 unsigned int level;
162
163 pte = lookup_address(address, &level);
164 if (pte == NULL)
165 return; /* vaddr missing */
166
167 ptev = pte_mkwrite_novma(*pte);
168
169 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
170 BUG();
171 }
172
173
174 /*
175 * During early boot all page table pages are pinned, but we do not have struct
176 * pages, so return true until struct pages are ready.
177 */
xen_page_pinned(void * ptr)178 static bool xen_page_pinned(void *ptr)
179 {
180 if (static_branch_likely(&xen_struct_pages_ready)) {
181 struct page *page = virt_to_page(ptr);
182
183 return PagePinned(page);
184 }
185 return true;
186 }
187
xen_extend_mmu_update(const struct mmu_update * update)188 static void xen_extend_mmu_update(const struct mmu_update *update)
189 {
190 struct multicall_space mcs;
191 struct mmu_update *u;
192
193 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
194
195 if (mcs.mc != NULL) {
196 mcs.mc->args[1]++;
197 } else {
198 mcs = __xen_mc_entry(sizeof(*u));
199 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
200 }
201
202 u = mcs.args;
203 *u = *update;
204 }
205
xen_extend_mmuext_op(const struct mmuext_op * op)206 static void xen_extend_mmuext_op(const struct mmuext_op *op)
207 {
208 struct multicall_space mcs;
209 struct mmuext_op *u;
210
211 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
212
213 if (mcs.mc != NULL) {
214 mcs.mc->args[1]++;
215 } else {
216 mcs = __xen_mc_entry(sizeof(*u));
217 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
218 }
219
220 u = mcs.args;
221 *u = *op;
222 }
223
xen_set_pmd_hyper(pmd_t * ptr,pmd_t val)224 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
225 {
226 struct mmu_update u;
227
228 preempt_disable();
229
230 xen_mc_batch();
231
232 /* ptr may be ioremapped for 64-bit pagetable setup */
233 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
234 u.val = pmd_val_ma(val);
235 xen_extend_mmu_update(&u);
236
237 xen_mc_issue(XEN_LAZY_MMU);
238
239 preempt_enable();
240 }
241
xen_set_pmd(pmd_t * ptr,pmd_t val)242 static void xen_set_pmd(pmd_t *ptr, pmd_t val)
243 {
244 trace_xen_mmu_set_pmd(ptr, val);
245
246 /* If page is not pinned, we can just update the entry
247 directly */
248 if (!xen_page_pinned(ptr)) {
249 *ptr = val;
250 return;
251 }
252
253 xen_set_pmd_hyper(ptr, val);
254 }
255
256 /*
257 * Associate a virtual page frame with a given physical page frame
258 * and protection flags for that frame.
259 */
set_pte_mfn(unsigned long vaddr,unsigned long mfn,pgprot_t flags)260 void __init set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
261 {
262 if (HYPERVISOR_update_va_mapping(vaddr, mfn_pte(mfn, flags),
263 UVMF_INVLPG))
264 BUG();
265 }
266
xen_batched_set_pte(pte_t * ptep,pte_t pteval)267 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
268 {
269 struct mmu_update u;
270
271 if (xen_get_lazy_mode() != XEN_LAZY_MMU)
272 return false;
273
274 xen_mc_batch();
275
276 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
277 u.val = pte_val_ma(pteval);
278 xen_extend_mmu_update(&u);
279
280 xen_mc_issue(XEN_LAZY_MMU);
281
282 return true;
283 }
284
__xen_set_pte(pte_t * ptep,pte_t pteval)285 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
286 {
287 if (!xen_batched_set_pte(ptep, pteval)) {
288 /*
289 * Could call native_set_pte() here and trap and
290 * emulate the PTE write, but a hypercall is much cheaper.
291 */
292 struct mmu_update u;
293
294 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
295 u.val = pte_val_ma(pteval);
296 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
297 }
298 }
299
xen_set_pte(pte_t * ptep,pte_t pteval)300 static void xen_set_pte(pte_t *ptep, pte_t pteval)
301 {
302 trace_xen_mmu_set_pte(ptep, pteval);
303 __xen_set_pte(ptep, pteval);
304 }
305
xen_ptep_modify_prot_start(struct vm_area_struct * vma,unsigned long addr,pte_t * ptep)306 static pte_t xen_ptep_modify_prot_start(struct vm_area_struct *vma,
307 unsigned long addr, pte_t *ptep)
308 {
309 /* Just return the pte as-is. We preserve the bits on commit */
310 trace_xen_mmu_ptep_modify_prot_start(vma->vm_mm, addr, ptep, *ptep);
311 return *ptep;
312 }
313
xen_ptep_modify_prot_commit(struct vm_area_struct * vma,unsigned long addr,pte_t * ptep,pte_t pte)314 static void xen_ptep_modify_prot_commit(struct vm_area_struct *vma,
315 unsigned long addr,
316 pte_t *ptep, pte_t pte)
317 {
318 struct mmu_update u;
319
320 trace_xen_mmu_ptep_modify_prot_commit(vma->vm_mm, addr, ptep, pte);
321 xen_mc_batch();
322
323 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
324 u.val = pte_val_ma(pte);
325 xen_extend_mmu_update(&u);
326
327 xen_mc_issue(XEN_LAZY_MMU);
328 }
329
330 /* Assume pteval_t is equivalent to all the other *val_t types. */
pte_mfn_to_pfn(pteval_t val)331 static pteval_t pte_mfn_to_pfn(pteval_t val)
332 {
333 if (val & _PAGE_PRESENT) {
334 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
335 unsigned long pfn = mfn_to_pfn(mfn);
336
337 pteval_t flags = val & PTE_FLAGS_MASK;
338 if (unlikely(pfn == ~0))
339 val = flags & ~_PAGE_PRESENT;
340 else
341 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
342 }
343
344 return val;
345 }
346
pte_pfn_to_mfn(pteval_t val)347 static pteval_t pte_pfn_to_mfn(pteval_t val)
348 {
349 if (val & _PAGE_PRESENT) {
350 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
351 pteval_t flags = val & PTE_FLAGS_MASK;
352 unsigned long mfn;
353
354 mfn = __pfn_to_mfn(pfn);
355
356 /*
357 * If there's no mfn for the pfn, then just create an
358 * empty non-present pte. Unfortunately this loses
359 * information about the original pfn, so
360 * pte_mfn_to_pfn is asymmetric.
361 */
362 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
363 mfn = 0;
364 flags = 0;
365 } else
366 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
367 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
368 }
369
370 return val;
371 }
372
xen_pte_val(pte_t pte)373 __visible pteval_t xen_pte_val(pte_t pte)
374 {
375 pteval_t pteval = pte.pte;
376
377 return pte_mfn_to_pfn(pteval);
378 }
379 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
380
xen_pgd_val(pgd_t pgd)381 __visible pgdval_t xen_pgd_val(pgd_t pgd)
382 {
383 return pte_mfn_to_pfn(pgd.pgd);
384 }
385 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
386
xen_make_pte(pteval_t pte)387 __visible pte_t xen_make_pte(pteval_t pte)
388 {
389 pte = pte_pfn_to_mfn(pte);
390
391 return native_make_pte(pte);
392 }
393 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
394
xen_make_pgd(pgdval_t pgd)395 __visible pgd_t xen_make_pgd(pgdval_t pgd)
396 {
397 pgd = pte_pfn_to_mfn(pgd);
398 return native_make_pgd(pgd);
399 }
400 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
401
xen_pmd_val(pmd_t pmd)402 __visible pmdval_t xen_pmd_val(pmd_t pmd)
403 {
404 return pte_mfn_to_pfn(pmd.pmd);
405 }
406 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
407
xen_set_pud_hyper(pud_t * ptr,pud_t val)408 static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
409 {
410 struct mmu_update u;
411
412 preempt_disable();
413
414 xen_mc_batch();
415
416 /* ptr may be ioremapped for 64-bit pagetable setup */
417 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
418 u.val = pud_val_ma(val);
419 xen_extend_mmu_update(&u);
420
421 xen_mc_issue(XEN_LAZY_MMU);
422
423 preempt_enable();
424 }
425
xen_set_pud(pud_t * ptr,pud_t val)426 static void xen_set_pud(pud_t *ptr, pud_t val)
427 {
428 trace_xen_mmu_set_pud(ptr, val);
429
430 /* If page is not pinned, we can just update the entry
431 directly */
432 if (!xen_page_pinned(ptr)) {
433 *ptr = val;
434 return;
435 }
436
437 xen_set_pud_hyper(ptr, val);
438 }
439
xen_make_pmd(pmdval_t pmd)440 __visible pmd_t xen_make_pmd(pmdval_t pmd)
441 {
442 pmd = pte_pfn_to_mfn(pmd);
443 return native_make_pmd(pmd);
444 }
445 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
446
xen_pud_val(pud_t pud)447 __visible pudval_t xen_pud_val(pud_t pud)
448 {
449 return pte_mfn_to_pfn(pud.pud);
450 }
451 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
452
xen_make_pud(pudval_t pud)453 __visible pud_t xen_make_pud(pudval_t pud)
454 {
455 pud = pte_pfn_to_mfn(pud);
456
457 return native_make_pud(pud);
458 }
459 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
460
xen_get_user_pgd(pgd_t * pgd)461 static pgd_t *xen_get_user_pgd(pgd_t *pgd)
462 {
463 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
464 unsigned offset = pgd - pgd_page;
465 pgd_t *user_ptr = NULL;
466
467 if (offset < pgd_index(USER_LIMIT)) {
468 struct page *page = virt_to_page(pgd_page);
469 user_ptr = (pgd_t *)page->private;
470 if (user_ptr)
471 user_ptr += offset;
472 }
473
474 return user_ptr;
475 }
476
__xen_set_p4d_hyper(p4d_t * ptr,p4d_t val)477 static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
478 {
479 struct mmu_update u;
480
481 u.ptr = virt_to_machine(ptr).maddr;
482 u.val = p4d_val_ma(val);
483 xen_extend_mmu_update(&u);
484 }
485
486 /*
487 * Raw hypercall-based set_p4d, intended for in early boot before
488 * there's a page structure. This implies:
489 * 1. The only existing pagetable is the kernel's
490 * 2. It is always pinned
491 * 3. It has no user pagetable attached to it
492 */
xen_set_p4d_hyper(p4d_t * ptr,p4d_t val)493 static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
494 {
495 preempt_disable();
496
497 xen_mc_batch();
498
499 __xen_set_p4d_hyper(ptr, val);
500
501 xen_mc_issue(XEN_LAZY_MMU);
502
503 preempt_enable();
504 }
505
xen_set_p4d(p4d_t * ptr,p4d_t val)506 static void xen_set_p4d(p4d_t *ptr, p4d_t val)
507 {
508 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
509 pgd_t pgd_val;
510
511 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
512
513 /* If page is not pinned, we can just update the entry
514 directly */
515 if (!xen_page_pinned(ptr)) {
516 *ptr = val;
517 if (user_ptr) {
518 WARN_ON(xen_page_pinned(user_ptr));
519 pgd_val.pgd = p4d_val_ma(val);
520 *user_ptr = pgd_val;
521 }
522 return;
523 }
524
525 /* If it's pinned, then we can at least batch the kernel and
526 user updates together. */
527 xen_mc_batch();
528
529 __xen_set_p4d_hyper(ptr, val);
530 if (user_ptr)
531 __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
532
533 xen_mc_issue(XEN_LAZY_MMU);
534 }
535
536 #if CONFIG_PGTABLE_LEVELS >= 5
xen_p4d_val(p4d_t p4d)537 __visible p4dval_t xen_p4d_val(p4d_t p4d)
538 {
539 return pte_mfn_to_pfn(p4d.p4d);
540 }
541 PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
542
xen_make_p4d(p4dval_t p4d)543 __visible p4d_t xen_make_p4d(p4dval_t p4d)
544 {
545 p4d = pte_pfn_to_mfn(p4d);
546
547 return native_make_p4d(p4d);
548 }
549 PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
550 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */
551
xen_pmd_walk(struct mm_struct * mm,pmd_t * pmd,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)552 static void xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
553 void (*func)(struct mm_struct *mm, struct page *,
554 enum pt_level),
555 bool last, unsigned long limit)
556 {
557 int i, nr;
558
559 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
560 for (i = 0; i < nr; i++) {
561 if (!pmd_none(pmd[i]))
562 (*func)(mm, pmd_page(pmd[i]), PT_PTE);
563 }
564 }
565
xen_pud_walk(struct mm_struct * mm,pud_t * pud,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)566 static void xen_pud_walk(struct mm_struct *mm, pud_t *pud,
567 void (*func)(struct mm_struct *mm, struct page *,
568 enum pt_level),
569 bool last, unsigned long limit)
570 {
571 int i, nr;
572
573 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
574 for (i = 0; i < nr; i++) {
575 pmd_t *pmd;
576
577 if (pud_none(pud[i]))
578 continue;
579
580 pmd = pmd_offset(&pud[i], 0);
581 if (PTRS_PER_PMD > 1)
582 (*func)(mm, virt_to_page(pmd), PT_PMD);
583 xen_pmd_walk(mm, pmd, func, last && i == nr - 1, limit);
584 }
585 }
586
xen_p4d_walk(struct mm_struct * mm,p4d_t * p4d,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)587 static void xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
588 void (*func)(struct mm_struct *mm, struct page *,
589 enum pt_level),
590 bool last, unsigned long limit)
591 {
592 pud_t *pud;
593
594
595 if (p4d_none(*p4d))
596 return;
597
598 pud = pud_offset(p4d, 0);
599 if (PTRS_PER_PUD > 1)
600 (*func)(mm, virt_to_page(pud), PT_PUD);
601 xen_pud_walk(mm, pud, func, last, limit);
602 }
603
604 /*
605 * (Yet another) pagetable walker. This one is intended for pinning a
606 * pagetable. This means that it walks a pagetable and calls the
607 * callback function on each page it finds making up the page table,
608 * at every level. It walks the entire pagetable, but it only bothers
609 * pinning pte pages which are below limit. In the normal case this
610 * will be STACK_TOP_MAX, but at boot we need to pin up to
611 * FIXADDR_TOP.
612 *
613 * We must skip the Xen hole in the middle of the address space, just after
614 * the big x86-64 virtual hole.
615 */
__xen_pgd_walk(struct mm_struct * mm,pgd_t * pgd,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),unsigned long limit)616 static void __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
617 void (*func)(struct mm_struct *mm, struct page *,
618 enum pt_level),
619 unsigned long limit)
620 {
621 int i, nr;
622 unsigned hole_low = 0, hole_high = 0;
623
624 /* The limit is the last byte to be touched */
625 limit--;
626 BUG_ON(limit >= FIXADDR_TOP);
627
628 /*
629 * 64-bit has a great big hole in the middle of the address
630 * space, which contains the Xen mappings.
631 */
632 hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);
633 hole_high = pgd_index(GUARD_HOLE_END_ADDR);
634
635 nr = pgd_index(limit) + 1;
636 for (i = 0; i < nr; i++) {
637 p4d_t *p4d;
638
639 if (i >= hole_low && i < hole_high)
640 continue;
641
642 if (pgd_none(pgd[i]))
643 continue;
644
645 p4d = p4d_offset(&pgd[i], 0);
646 xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
647 }
648
649 /* Do the top level last, so that the callbacks can use it as
650 a cue to do final things like tlb flushes. */
651 (*func)(mm, virt_to_page(pgd), PT_PGD);
652 }
653
xen_pgd_walk(struct mm_struct * mm,void (* func)(struct mm_struct * mm,struct page *,enum pt_level),unsigned long limit)654 static void xen_pgd_walk(struct mm_struct *mm,
655 void (*func)(struct mm_struct *mm, struct page *,
656 enum pt_level),
657 unsigned long limit)
658 {
659 __xen_pgd_walk(mm, mm->pgd, func, limit);
660 }
661
662 /* If we're using split pte locks, then take the page's lock and
663 return a pointer to it. Otherwise return NULL. */
xen_pte_lock(struct page * page,struct mm_struct * mm)664 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
665 {
666 spinlock_t *ptl = NULL;
667
668 #if defined(CONFIG_SPLIT_PTE_PTLOCKS)
669 ptl = ptlock_ptr(page_ptdesc(page));
670 spin_lock_nest_lock(ptl, &mm->page_table_lock);
671 #endif
672
673 return ptl;
674 }
675
xen_pte_unlock(void * v)676 static void xen_pte_unlock(void *v)
677 {
678 spinlock_t *ptl = v;
679 spin_unlock(ptl);
680 }
681
xen_do_pin(unsigned level,unsigned long pfn)682 static void xen_do_pin(unsigned level, unsigned long pfn)
683 {
684 struct mmuext_op op;
685
686 op.cmd = level;
687 op.arg1.mfn = pfn_to_mfn(pfn);
688
689 xen_extend_mmuext_op(&op);
690 }
691
xen_pin_page(struct mm_struct * mm,struct page * page,enum pt_level level)692 static void xen_pin_page(struct mm_struct *mm, struct page *page,
693 enum pt_level level)
694 {
695 unsigned pgfl = TestSetPagePinned(page);
696
697 if (!pgfl) {
698 void *pt = lowmem_page_address(page);
699 unsigned long pfn = page_to_pfn(page);
700 struct multicall_space mcs = __xen_mc_entry(0);
701 spinlock_t *ptl;
702
703 /*
704 * We need to hold the pagetable lock between the time
705 * we make the pagetable RO and when we actually pin
706 * it. If we don't, then other users may come in and
707 * attempt to update the pagetable by writing it,
708 * which will fail because the memory is RO but not
709 * pinned, so Xen won't do the trap'n'emulate.
710 *
711 * If we're using split pte locks, we can't hold the
712 * entire pagetable's worth of locks during the
713 * traverse, because we may wrap the preempt count (8
714 * bits). The solution is to mark RO and pin each PTE
715 * page while holding the lock. This means the number
716 * of locks we end up holding is never more than a
717 * batch size (~32 entries, at present).
718 *
719 * If we're not using split pte locks, we needn't pin
720 * the PTE pages independently, because we're
721 * protected by the overall pagetable lock.
722 */
723 ptl = NULL;
724 if (level == PT_PTE)
725 ptl = xen_pte_lock(page, mm);
726
727 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
728 pfn_pte(pfn, PAGE_KERNEL_RO),
729 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
730
731 if (ptl) {
732 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
733
734 /* Queue a deferred unlock for when this batch
735 is completed. */
736 xen_mc_callback(xen_pte_unlock, ptl);
737 }
738 }
739 }
740
741 /* This is called just after a mm has been created, but it has not
742 been used yet. We need to make sure that its pagetable is all
743 read-only, and can be pinned. */
__xen_pgd_pin(struct mm_struct * mm,pgd_t * pgd)744 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
745 {
746 pgd_t *user_pgd = xen_get_user_pgd(pgd);
747
748 trace_xen_mmu_pgd_pin(mm, pgd);
749
750 xen_mc_batch();
751
752 __xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT);
753
754 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
755
756 if (user_pgd) {
757 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
758 xen_do_pin(MMUEXT_PIN_L4_TABLE,
759 PFN_DOWN(__pa(user_pgd)));
760 }
761
762 xen_mc_issue(0);
763 }
764
xen_pgd_pin(struct mm_struct * mm)765 static void xen_pgd_pin(struct mm_struct *mm)
766 {
767 __xen_pgd_pin(mm, mm->pgd);
768 }
769
770 /*
771 * On save, we need to pin all pagetables to make sure they get their
772 * mfns turned into pfns. Search the list for any unpinned pgds and pin
773 * them (unpinned pgds are not currently in use, probably because the
774 * process is under construction or destruction).
775 *
776 * Expected to be called in stop_machine() ("equivalent to taking
777 * every spinlock in the system"), so the locking doesn't really
778 * matter all that much.
779 */
xen_mm_pin_all(void)780 void xen_mm_pin_all(void)
781 {
782 struct page *page;
783
784 spin_lock(&pgd_lock);
785
786 list_for_each_entry(page, &pgd_list, lru) {
787 if (!PagePinned(page)) {
788 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
789 SetPageSavePinned(page);
790 }
791 }
792
793 spin_unlock(&pgd_lock);
794 }
795
xen_mark_pinned(struct mm_struct * mm,struct page * page,enum pt_level level)796 static void __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
797 enum pt_level level)
798 {
799 SetPagePinned(page);
800 }
801
802 /*
803 * The init_mm pagetable is really pinned as soon as its created, but
804 * that's before we have page structures to store the bits. So do all
805 * the book-keeping now once struct pages for allocated pages are
806 * initialized. This happens only after memblock_free_all() is called.
807 */
xen_after_bootmem(void)808 static void __init xen_after_bootmem(void)
809 {
810 static_branch_enable(&xen_struct_pages_ready);
811 #ifdef CONFIG_X86_VSYSCALL_EMULATION
812 SetPagePinned(virt_to_page(level3_user_vsyscall));
813 #endif
814 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
815 }
816
xen_unpin_page(struct mm_struct * mm,struct page * page,enum pt_level level)817 static void xen_unpin_page(struct mm_struct *mm, struct page *page,
818 enum pt_level level)
819 {
820 unsigned pgfl = TestClearPagePinned(page);
821
822 if (pgfl) {
823 void *pt = lowmem_page_address(page);
824 unsigned long pfn = page_to_pfn(page);
825 spinlock_t *ptl = NULL;
826 struct multicall_space mcs;
827
828 /*
829 * Do the converse to pin_page. If we're using split
830 * pte locks, we must be holding the lock for while
831 * the pte page is unpinned but still RO to prevent
832 * concurrent updates from seeing it in this
833 * partially-pinned state.
834 */
835 if (level == PT_PTE) {
836 ptl = xen_pte_lock(page, mm);
837
838 if (ptl)
839 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
840 }
841
842 mcs = __xen_mc_entry(0);
843
844 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
845 pfn_pte(pfn, PAGE_KERNEL),
846 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
847
848 if (ptl) {
849 /* unlock when batch completed */
850 xen_mc_callback(xen_pte_unlock, ptl);
851 }
852 }
853 }
854
855 /* Release a pagetables pages back as normal RW */
__xen_pgd_unpin(struct mm_struct * mm,pgd_t * pgd)856 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
857 {
858 pgd_t *user_pgd = xen_get_user_pgd(pgd);
859
860 trace_xen_mmu_pgd_unpin(mm, pgd);
861
862 xen_mc_batch();
863
864 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
865
866 if (user_pgd) {
867 xen_do_pin(MMUEXT_UNPIN_TABLE,
868 PFN_DOWN(__pa(user_pgd)));
869 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
870 }
871
872 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
873
874 xen_mc_issue(0);
875 }
876
xen_pgd_unpin(struct mm_struct * mm)877 static void xen_pgd_unpin(struct mm_struct *mm)
878 {
879 __xen_pgd_unpin(mm, mm->pgd);
880 }
881
882 /*
883 * On resume, undo any pinning done at save, so that the rest of the
884 * kernel doesn't see any unexpected pinned pagetables.
885 */
xen_mm_unpin_all(void)886 void xen_mm_unpin_all(void)
887 {
888 struct page *page;
889
890 spin_lock(&pgd_lock);
891
892 list_for_each_entry(page, &pgd_list, lru) {
893 if (PageSavePinned(page)) {
894 BUG_ON(!PagePinned(page));
895 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
896 ClearPageSavePinned(page);
897 }
898 }
899
900 spin_unlock(&pgd_lock);
901 }
902
xen_enter_mmap(struct mm_struct * mm)903 static void xen_enter_mmap(struct mm_struct *mm)
904 {
905 spin_lock(&mm->page_table_lock);
906 xen_pgd_pin(mm);
907 spin_unlock(&mm->page_table_lock);
908 }
909
drop_mm_ref_this_cpu(void * info)910 static void drop_mm_ref_this_cpu(void *info)
911 {
912 struct mm_struct *mm = info;
913
914 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
915 leave_mm();
916
917 /*
918 * If this cpu still has a stale cr3 reference, then make sure
919 * it has been flushed.
920 */
921 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
922 xen_mc_flush();
923 }
924
925 #ifdef CONFIG_SMP
926 /*
927 * Another cpu may still have their %cr3 pointing at the pagetable, so
928 * we need to repoint it somewhere else before we can unpin it.
929 */
xen_drop_mm_ref(struct mm_struct * mm)930 static void xen_drop_mm_ref(struct mm_struct *mm)
931 {
932 cpumask_var_t mask;
933 unsigned cpu;
934
935 drop_mm_ref_this_cpu(mm);
936
937 /* Get the "official" set of cpus referring to our pagetable. */
938 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
939 for_each_online_cpu(cpu) {
940 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
941 continue;
942 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
943 }
944 return;
945 }
946
947 /*
948 * It's possible that a vcpu may have a stale reference to our
949 * cr3, because its in lazy mode, and it hasn't yet flushed
950 * its set of pending hypercalls yet. In this case, we can
951 * look at its actual current cr3 value, and force it to flush
952 * if needed.
953 */
954 cpumask_clear(mask);
955 for_each_online_cpu(cpu) {
956 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
957 cpumask_set_cpu(cpu, mask);
958 }
959
960 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
961 free_cpumask_var(mask);
962 }
963 #else
xen_drop_mm_ref(struct mm_struct * mm)964 static void xen_drop_mm_ref(struct mm_struct *mm)
965 {
966 drop_mm_ref_this_cpu(mm);
967 }
968 #endif
969
970 /*
971 * While a process runs, Xen pins its pagetables, which means that the
972 * hypervisor forces it to be read-only, and it controls all updates
973 * to it. This means that all pagetable updates have to go via the
974 * hypervisor, which is moderately expensive.
975 *
976 * Since we're pulling the pagetable down, we switch to use init_mm,
977 * unpin old process pagetable and mark it all read-write, which
978 * allows further operations on it to be simple memory accesses.
979 *
980 * The only subtle point is that another CPU may be still using the
981 * pagetable because of lazy tlb flushing. This means we need need to
982 * switch all CPUs off this pagetable before we can unpin it.
983 */
xen_exit_mmap(struct mm_struct * mm)984 static void xen_exit_mmap(struct mm_struct *mm)
985 {
986 get_cpu(); /* make sure we don't move around */
987 xen_drop_mm_ref(mm);
988 put_cpu();
989
990 spin_lock(&mm->page_table_lock);
991
992 /* pgd may not be pinned in the error exit path of execve */
993 if (xen_page_pinned(mm->pgd))
994 xen_pgd_unpin(mm);
995
996 spin_unlock(&mm->page_table_lock);
997 }
998
999 static void xen_post_allocator_init(void);
1000
pin_pagetable_pfn(unsigned cmd,unsigned long pfn)1001 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1002 {
1003 struct mmuext_op op;
1004
1005 op.cmd = cmd;
1006 op.arg1.mfn = pfn_to_mfn(pfn);
1007 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1008 BUG();
1009 }
1010
xen_cleanhighmap(unsigned long vaddr,unsigned long vaddr_end)1011 static void __init xen_cleanhighmap(unsigned long vaddr,
1012 unsigned long vaddr_end)
1013 {
1014 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1015 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1016
1017 /* NOTE: The loop is more greedy than the cleanup_highmap variant.
1018 * We include the PMD passed in on _both_ boundaries. */
1019 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
1020 pmd++, vaddr += PMD_SIZE) {
1021 if (pmd_none(*pmd))
1022 continue;
1023 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1024 set_pmd(pmd, __pmd(0));
1025 }
1026 /* In case we did something silly, we should crash in this function
1027 * instead of somewhere later and be confusing. */
1028 xen_mc_flush();
1029 }
1030
1031 /*
1032 * Make a page range writeable and free it.
1033 */
xen_free_ro_pages(unsigned long paddr,unsigned long size)1034 static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1035 {
1036 void *vaddr = __va(paddr);
1037 void *vaddr_end = vaddr + size;
1038
1039 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1040 make_lowmem_page_readwrite(vaddr);
1041
1042 memblock_phys_free(paddr, size);
1043 }
1044
xen_cleanmfnmap_free_pgtbl(void * pgtbl,bool unpin)1045 static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
1046 {
1047 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1048
1049 if (unpin)
1050 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
1051 ClearPagePinned(virt_to_page(__va(pa)));
1052 xen_free_ro_pages(pa, PAGE_SIZE);
1053 }
1054
xen_cleanmfnmap_pmd(pmd_t * pmd,bool unpin)1055 static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
1056 {
1057 unsigned long pa;
1058 pte_t *pte_tbl;
1059 int i;
1060
1061 if (pmd_leaf(*pmd)) {
1062 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1063 xen_free_ro_pages(pa, PMD_SIZE);
1064 return;
1065 }
1066
1067 pte_tbl = pte_offset_kernel(pmd, 0);
1068 for (i = 0; i < PTRS_PER_PTE; i++) {
1069 if (pte_none(pte_tbl[i]))
1070 continue;
1071 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
1072 xen_free_ro_pages(pa, PAGE_SIZE);
1073 }
1074 set_pmd(pmd, __pmd(0));
1075 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
1076 }
1077
xen_cleanmfnmap_pud(pud_t * pud,bool unpin)1078 static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
1079 {
1080 unsigned long pa;
1081 pmd_t *pmd_tbl;
1082 int i;
1083
1084 if (pud_leaf(*pud)) {
1085 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1086 xen_free_ro_pages(pa, PUD_SIZE);
1087 return;
1088 }
1089
1090 pmd_tbl = pmd_offset(pud, 0);
1091 for (i = 0; i < PTRS_PER_PMD; i++) {
1092 if (pmd_none(pmd_tbl[i]))
1093 continue;
1094 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
1095 }
1096 set_pud(pud, __pud(0));
1097 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
1098 }
1099
xen_cleanmfnmap_p4d(p4d_t * p4d,bool unpin)1100 static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
1101 {
1102 unsigned long pa;
1103 pud_t *pud_tbl;
1104 int i;
1105
1106 if (p4d_leaf(*p4d)) {
1107 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
1108 xen_free_ro_pages(pa, P4D_SIZE);
1109 return;
1110 }
1111
1112 pud_tbl = pud_offset(p4d, 0);
1113 for (i = 0; i < PTRS_PER_PUD; i++) {
1114 if (pud_none(pud_tbl[i]))
1115 continue;
1116 xen_cleanmfnmap_pud(pud_tbl + i, unpin);
1117 }
1118 set_p4d(p4d, __p4d(0));
1119 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
1120 }
1121
1122 /*
1123 * Since it is well isolated we can (and since it is perhaps large we should)
1124 * also free the page tables mapping the initial P->M table.
1125 */
xen_cleanmfnmap(unsigned long vaddr)1126 static void __init xen_cleanmfnmap(unsigned long vaddr)
1127 {
1128 pgd_t *pgd;
1129 p4d_t *p4d;
1130 bool unpin;
1131
1132 unpin = (vaddr == 2 * PGDIR_SIZE);
1133 vaddr &= PMD_MASK;
1134 pgd = pgd_offset_k(vaddr);
1135 p4d = p4d_offset(pgd, 0);
1136 if (!p4d_none(*p4d))
1137 xen_cleanmfnmap_p4d(p4d, unpin);
1138 }
1139
xen_pagetable_p2m_free(void)1140 static void __init xen_pagetable_p2m_free(void)
1141 {
1142 unsigned long size;
1143 unsigned long addr;
1144
1145 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1146
1147 /* No memory or already called. */
1148 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1149 return;
1150
1151 /* using __ka address and sticking INVALID_P2M_ENTRY! */
1152 memset((void *)xen_start_info->mfn_list, 0xff, size);
1153
1154 addr = xen_start_info->mfn_list;
1155 /*
1156 * We could be in __ka space.
1157 * We roundup to the PMD, which means that if anybody at this stage is
1158 * using the __ka address of xen_start_info or
1159 * xen_start_info->shared_info they are in going to crash. Fortunately
1160 * we have already revectored in xen_setup_kernel_pagetable.
1161 */
1162 size = roundup(size, PMD_SIZE);
1163
1164 if (addr >= __START_KERNEL_map) {
1165 xen_cleanhighmap(addr, addr + size);
1166 size = PAGE_ALIGN(xen_start_info->nr_pages *
1167 sizeof(unsigned long));
1168 memblock_free((void *)addr, size);
1169 } else {
1170 xen_cleanmfnmap(addr);
1171 }
1172 }
1173
xen_pagetable_cleanhighmap(void)1174 static void __init xen_pagetable_cleanhighmap(void)
1175 {
1176 unsigned long size;
1177 unsigned long addr;
1178
1179 /* At this stage, cleanup_highmap has already cleaned __ka space
1180 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1181 * the ramdisk). We continue on, erasing PMD entries that point to page
1182 * tables - do note that they are accessible at this stage via __va.
1183 * As Xen is aligning the memory end to a 4MB boundary, for good
1184 * measure we also round up to PMD_SIZE * 2 - which means that if
1185 * anybody is using __ka address to the initial boot-stack - and try
1186 * to use it - they are going to crash. The xen_start_info has been
1187 * taken care of already in xen_setup_kernel_pagetable. */
1188 addr = xen_start_info->pt_base;
1189 size = xen_start_info->nr_pt_frames * PAGE_SIZE;
1190
1191 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
1192 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1193 }
1194
xen_pagetable_p2m_setup(void)1195 static void __init xen_pagetable_p2m_setup(void)
1196 {
1197 xen_vmalloc_p2m_tree();
1198
1199 xen_pagetable_p2m_free();
1200
1201 xen_pagetable_cleanhighmap();
1202
1203 /* And revector! Bye bye old array */
1204 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1205 }
1206
xen_pagetable_init(void)1207 static void __init xen_pagetable_init(void)
1208 {
1209 /*
1210 * The majority of further PTE writes is to pagetables already
1211 * announced as such to Xen. Hence it is more efficient to use
1212 * hypercalls for these updates.
1213 */
1214 pv_ops.mmu.set_pte = __xen_set_pte;
1215
1216 paging_init();
1217 xen_post_allocator_init();
1218
1219 xen_pagetable_p2m_setup();
1220
1221 /* Allocate and initialize top and mid mfn levels for p2m structure */
1222 xen_build_mfn_list_list();
1223
1224 /* Remap memory freed due to conflicts with E820 map */
1225 xen_remap_memory();
1226 xen_setup_mfn_list_list();
1227 }
1228
xen_write_cr2(unsigned long cr2)1229 static noinstr void xen_write_cr2(unsigned long cr2)
1230 {
1231 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1232 }
1233
xen_flush_tlb(void)1234 static noinline void xen_flush_tlb(void)
1235 {
1236 struct mmuext_op *op;
1237 struct multicall_space mcs;
1238
1239 preempt_disable();
1240
1241 mcs = xen_mc_entry(sizeof(*op));
1242
1243 op = mcs.args;
1244 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1245 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1246
1247 xen_mc_issue(XEN_LAZY_MMU);
1248
1249 preempt_enable();
1250 }
1251
xen_flush_tlb_one_user(unsigned long addr)1252 static void xen_flush_tlb_one_user(unsigned long addr)
1253 {
1254 struct mmuext_op *op;
1255 struct multicall_space mcs;
1256
1257 trace_xen_mmu_flush_tlb_one_user(addr);
1258
1259 preempt_disable();
1260
1261 mcs = xen_mc_entry(sizeof(*op));
1262 op = mcs.args;
1263 op->cmd = MMUEXT_INVLPG_LOCAL;
1264 op->arg1.linear_addr = addr & PAGE_MASK;
1265 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1266
1267 xen_mc_issue(XEN_LAZY_MMU);
1268
1269 preempt_enable();
1270 }
1271
xen_flush_tlb_multi(const struct cpumask * cpus,const struct flush_tlb_info * info)1272 static void xen_flush_tlb_multi(const struct cpumask *cpus,
1273 const struct flush_tlb_info *info)
1274 {
1275 struct {
1276 struct mmuext_op op;
1277 DECLARE_BITMAP(mask, NR_CPUS);
1278 } *args;
1279 struct multicall_space mcs;
1280 const size_t mc_entry_size = sizeof(args->op) +
1281 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
1282
1283 trace_xen_mmu_flush_tlb_multi(cpus, info->mm, info->start, info->end);
1284
1285 if (cpumask_empty(cpus))
1286 return; /* nothing to do */
1287
1288 mcs = xen_mc_entry(mc_entry_size);
1289 args = mcs.args;
1290 args->op.arg2.vcpumask = to_cpumask(args->mask);
1291
1292 /* Remove any offline CPUs */
1293 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1294
1295 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1296 if (info->end != TLB_FLUSH_ALL &&
1297 (info->end - info->start) <= PAGE_SIZE) {
1298 args->op.cmd = MMUEXT_INVLPG_MULTI;
1299 args->op.arg1.linear_addr = info->start;
1300 }
1301
1302 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1303
1304 xen_mc_issue(XEN_LAZY_MMU);
1305 }
1306
xen_read_cr3(void)1307 static unsigned long xen_read_cr3(void)
1308 {
1309 return this_cpu_read(xen_cr3);
1310 }
1311
set_current_cr3(void * v)1312 static void set_current_cr3(void *v)
1313 {
1314 this_cpu_write(xen_current_cr3, (unsigned long)v);
1315 }
1316
__xen_write_cr3(bool kernel,unsigned long cr3)1317 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1318 {
1319 struct mmuext_op op;
1320 unsigned long mfn;
1321
1322 trace_xen_mmu_write_cr3(kernel, cr3);
1323
1324 if (cr3)
1325 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1326 else
1327 mfn = 0;
1328
1329 WARN_ON(mfn == 0 && kernel);
1330
1331 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1332 op.arg1.mfn = mfn;
1333
1334 xen_extend_mmuext_op(&op);
1335
1336 if (kernel) {
1337 this_cpu_write(xen_cr3, cr3);
1338
1339 /* Update xen_current_cr3 once the batch has actually
1340 been submitted. */
1341 xen_mc_callback(set_current_cr3, (void *)cr3);
1342 }
1343 }
xen_write_cr3(unsigned long cr3)1344 static void xen_write_cr3(unsigned long cr3)
1345 {
1346 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1347
1348 BUG_ON(preemptible());
1349
1350 xen_mc_batch(); /* disables interrupts */
1351
1352 /* Update while interrupts are disabled, so its atomic with
1353 respect to ipis */
1354 this_cpu_write(xen_cr3, cr3);
1355
1356 __xen_write_cr3(true, cr3);
1357
1358 if (user_pgd)
1359 __xen_write_cr3(false, __pa(user_pgd));
1360 else
1361 __xen_write_cr3(false, 0);
1362
1363 xen_mc_issue(XEN_LAZY_CPU); /* interrupts restored */
1364 }
1365
1366 /*
1367 * At the start of the day - when Xen launches a guest, it has already
1368 * built pagetables for the guest. We diligently look over them
1369 * in xen_setup_kernel_pagetable and graft as appropriate them in the
1370 * init_top_pgt and its friends. Then when we are happy we load
1371 * the new init_top_pgt - and continue on.
1372 *
1373 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1374 * up the rest of the pagetables. When it has completed it loads the cr3.
1375 * N.B. that baremetal would start at 'start_kernel' (and the early
1376 * #PF handler would create bootstrap pagetables) - so we are running
1377 * with the same assumptions as what to do when write_cr3 is executed
1378 * at this point.
1379 *
1380 * Since there are no user-page tables at all, we have two variants
1381 * of xen_write_cr3 - the early bootup (this one), and the late one
1382 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1383 * the Linux kernel and user-space are both in ring 3 while the
1384 * hypervisor is in ring 0.
1385 */
xen_write_cr3_init(unsigned long cr3)1386 static void __init xen_write_cr3_init(unsigned long cr3)
1387 {
1388 BUG_ON(preemptible());
1389
1390 xen_mc_batch(); /* disables interrupts */
1391
1392 /* Update while interrupts are disabled, so its atomic with
1393 respect to ipis */
1394 this_cpu_write(xen_cr3, cr3);
1395
1396 __xen_write_cr3(true, cr3);
1397
1398 xen_mc_issue(XEN_LAZY_CPU); /* interrupts restored */
1399 }
1400
xen_pgd_alloc(struct mm_struct * mm)1401 static int xen_pgd_alloc(struct mm_struct *mm)
1402 {
1403 pgd_t *pgd = mm->pgd;
1404 struct page *page = virt_to_page(pgd);
1405 pgd_t *user_pgd;
1406 int ret = -ENOMEM;
1407
1408 BUG_ON(PagePinned(virt_to_page(pgd)));
1409 BUG_ON(page->private != 0);
1410
1411 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1412 page->private = (unsigned long)user_pgd;
1413
1414 if (user_pgd != NULL) {
1415 #ifdef CONFIG_X86_VSYSCALL_EMULATION
1416 user_pgd[pgd_index(VSYSCALL_ADDR)] =
1417 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1418 #endif
1419 ret = 0;
1420 }
1421
1422 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1423
1424 return ret;
1425 }
1426
xen_pgd_free(struct mm_struct * mm,pgd_t * pgd)1427 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1428 {
1429 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1430
1431 if (user_pgd)
1432 free_page((unsigned long)user_pgd);
1433 }
1434
1435 /*
1436 * Init-time set_pte while constructing initial pagetables, which
1437 * doesn't allow RO page table pages to be remapped RW.
1438 *
1439 * If there is no MFN for this PFN then this page is initially
1440 * ballooned out so clear the PTE (as in decrease_reservation() in
1441 * drivers/xen/balloon.c).
1442 *
1443 * Many of these PTE updates are done on unpinned and writable pages
1444 * and doing a hypercall for these is unnecessary and expensive. At
1445 * this point it is rarely possible to tell if a page is pinned, so
1446 * mostly write the PTE directly and rely on Xen trapping and
1447 * emulating any updates as necessary.
1448 */
xen_set_pte_init(pte_t * ptep,pte_t pte)1449 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1450 {
1451 if (unlikely(is_early_ioremap_ptep(ptep)))
1452 __xen_set_pte(ptep, pte);
1453 else
1454 native_set_pte(ptep, pte);
1455 }
1456
xen_make_pte_init(pteval_t pte)1457 __visible pte_t xen_make_pte_init(pteval_t pte)
1458 {
1459 unsigned long pfn;
1460
1461 /*
1462 * Pages belonging to the initial p2m list mapped outside the default
1463 * address range must be mapped read-only. This region contains the
1464 * page tables for mapping the p2m list, too, and page tables MUST be
1465 * mapped read-only.
1466 */
1467 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1468 if (xen_start_info->mfn_list < __START_KERNEL_map &&
1469 pfn >= xen_start_info->first_p2m_pfn &&
1470 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1471 pte &= ~_PAGE_RW;
1472
1473 pte = pte_pfn_to_mfn(pte);
1474 return native_make_pte(pte);
1475 }
1476 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1477
1478 /* Early in boot, while setting up the initial pagetable, assume
1479 everything is pinned. */
xen_alloc_pte_init(struct mm_struct * mm,unsigned long pfn)1480 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1481 {
1482 #ifdef CONFIG_FLATMEM
1483 BUG_ON(mem_map); /* should only be used early */
1484 #endif
1485 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1486 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1487 }
1488
1489 /* Used for pmd and pud */
xen_alloc_pmd_init(struct mm_struct * mm,unsigned long pfn)1490 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1491 {
1492 #ifdef CONFIG_FLATMEM
1493 BUG_ON(mem_map); /* should only be used early */
1494 #endif
1495 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1496 }
1497
1498 /* Early release_pte assumes that all pts are pinned, since there's
1499 only init_mm and anything attached to that is pinned. */
xen_release_pte_init(unsigned long pfn)1500 static void __init xen_release_pte_init(unsigned long pfn)
1501 {
1502 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1503 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1504 }
1505
xen_release_pmd_init(unsigned long pfn)1506 static void __init xen_release_pmd_init(unsigned long pfn)
1507 {
1508 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1509 }
1510
__pin_pagetable_pfn(unsigned cmd,unsigned long pfn)1511 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1512 {
1513 struct multicall_space mcs;
1514 struct mmuext_op *op;
1515
1516 mcs = __xen_mc_entry(sizeof(*op));
1517 op = mcs.args;
1518 op->cmd = cmd;
1519 op->arg1.mfn = pfn_to_mfn(pfn);
1520
1521 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1522 }
1523
__set_pfn_prot(unsigned long pfn,pgprot_t prot)1524 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1525 {
1526 struct multicall_space mcs;
1527 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1528
1529 mcs = __xen_mc_entry(0);
1530 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1531 pfn_pte(pfn, prot), 0);
1532 }
1533
1534 /* This needs to make sure the new pte page is pinned iff its being
1535 attached to a pinned pagetable. */
xen_alloc_ptpage(struct mm_struct * mm,unsigned long pfn,unsigned level)1536 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1537 unsigned level)
1538 {
1539 bool pinned = xen_page_pinned(mm->pgd);
1540
1541 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1542
1543 if (pinned) {
1544 struct page *page = pfn_to_page(pfn);
1545
1546 pinned = false;
1547 if (static_branch_likely(&xen_struct_pages_ready)) {
1548 pinned = PagePinned(page);
1549 SetPagePinned(page);
1550 }
1551
1552 xen_mc_batch();
1553
1554 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1555
1556 if (level == PT_PTE && IS_ENABLED(CONFIG_SPLIT_PTE_PTLOCKS) &&
1557 !pinned)
1558 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1559
1560 xen_mc_issue(XEN_LAZY_MMU);
1561 }
1562 }
1563
xen_alloc_pte(struct mm_struct * mm,unsigned long pfn)1564 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1565 {
1566 xen_alloc_ptpage(mm, pfn, PT_PTE);
1567 }
1568
xen_alloc_pmd(struct mm_struct * mm,unsigned long pfn)1569 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1570 {
1571 xen_alloc_ptpage(mm, pfn, PT_PMD);
1572 }
1573
1574 /* This should never happen until we're OK to use struct page */
xen_release_ptpage(unsigned long pfn,unsigned level)1575 static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1576 {
1577 struct page *page = pfn_to_page(pfn);
1578 bool pinned = PagePinned(page);
1579
1580 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1581
1582 if (pinned) {
1583 xen_mc_batch();
1584
1585 if (level == PT_PTE && IS_ENABLED(CONFIG_SPLIT_PTE_PTLOCKS))
1586 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1587
1588 __set_pfn_prot(pfn, PAGE_KERNEL);
1589
1590 xen_mc_issue(XEN_LAZY_MMU);
1591
1592 ClearPagePinned(page);
1593 }
1594 }
1595
xen_release_pte(unsigned long pfn)1596 static void xen_release_pte(unsigned long pfn)
1597 {
1598 xen_release_ptpage(pfn, PT_PTE);
1599 }
1600
xen_release_pmd(unsigned long pfn)1601 static void xen_release_pmd(unsigned long pfn)
1602 {
1603 xen_release_ptpage(pfn, PT_PMD);
1604 }
1605
xen_alloc_pud(struct mm_struct * mm,unsigned long pfn)1606 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1607 {
1608 xen_alloc_ptpage(mm, pfn, PT_PUD);
1609 }
1610
xen_release_pud(unsigned long pfn)1611 static void xen_release_pud(unsigned long pfn)
1612 {
1613 xen_release_ptpage(pfn, PT_PUD);
1614 }
1615
1616 /*
1617 * Like __va(), but returns address in the kernel mapping (which is
1618 * all we have until the physical memory mapping has been set up.
1619 */
__ka(phys_addr_t paddr)1620 static void * __init __ka(phys_addr_t paddr)
1621 {
1622 return (void *)(paddr + __START_KERNEL_map);
1623 }
1624
1625 /* Convert a machine address to physical address */
m2p(phys_addr_t maddr)1626 static unsigned long __init m2p(phys_addr_t maddr)
1627 {
1628 phys_addr_t paddr;
1629
1630 maddr &= XEN_PTE_MFN_MASK;
1631 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1632
1633 return paddr;
1634 }
1635
1636 /* Convert a machine address to kernel virtual */
m2v(phys_addr_t maddr)1637 static void * __init m2v(phys_addr_t maddr)
1638 {
1639 return __ka(m2p(maddr));
1640 }
1641
1642 /* Set the page permissions on an identity-mapped pages */
set_page_prot_flags(void * addr,pgprot_t prot,unsigned long flags)1643 static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1644 unsigned long flags)
1645 {
1646 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1647 pte_t pte = pfn_pte(pfn, prot);
1648
1649 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1650 BUG();
1651 }
set_page_prot(void * addr,pgprot_t prot)1652 static void __init set_page_prot(void *addr, pgprot_t prot)
1653 {
1654 return set_page_prot_flags(addr, prot, UVMF_NONE);
1655 }
1656
xen_setup_machphys_mapping(void)1657 void __init xen_setup_machphys_mapping(void)
1658 {
1659 struct xen_machphys_mapping mapping;
1660
1661 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1662 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1663 machine_to_phys_nr = mapping.max_mfn + 1;
1664 } else {
1665 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1666 }
1667 }
1668
convert_pfn_mfn(void * v)1669 static void __init convert_pfn_mfn(void *v)
1670 {
1671 pte_t *pte = v;
1672 int i;
1673
1674 /* All levels are converted the same way, so just treat them
1675 as ptes. */
1676 for (i = 0; i < PTRS_PER_PTE; i++)
1677 pte[i] = xen_make_pte(pte[i].pte);
1678 }
check_pt_base(unsigned long * pt_base,unsigned long * pt_end,unsigned long addr)1679 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1680 unsigned long addr)
1681 {
1682 if (*pt_base == PFN_DOWN(__pa(addr))) {
1683 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1684 clear_page((void *)addr);
1685 (*pt_base)++;
1686 }
1687 if (*pt_end == PFN_DOWN(__pa(addr))) {
1688 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1689 clear_page((void *)addr);
1690 (*pt_end)--;
1691 }
1692 }
1693 /*
1694 * Set up the initial kernel pagetable.
1695 *
1696 * We can construct this by grafting the Xen provided pagetable into
1697 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1698 * level2_ident_pgt, and level2_kernel_pgt. This means that only the
1699 * kernel has a physical mapping to start with - but that's enough to
1700 * get __va working. We need to fill in the rest of the physical
1701 * mapping once some sort of allocator has been set up.
1702 */
xen_setup_kernel_pagetable(pgd_t * pgd,unsigned long max_pfn)1703 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1704 {
1705 pud_t *l3;
1706 pmd_t *l2;
1707 unsigned long addr[3];
1708 unsigned long pt_base, pt_end;
1709 unsigned i;
1710
1711 /* max_pfn_mapped is the last pfn mapped in the initial memory
1712 * mappings. Considering that on Xen after the kernel mappings we
1713 * have the mappings of some pages that don't exist in pfn space, we
1714 * set max_pfn_mapped to the last real pfn mapped. */
1715 if (xen_start_info->mfn_list < __START_KERNEL_map)
1716 max_pfn_mapped = xen_start_info->first_p2m_pfn;
1717 else
1718 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1719
1720 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1721 pt_end = pt_base + xen_start_info->nr_pt_frames;
1722
1723 /* Zap identity mapping */
1724 init_top_pgt[0] = __pgd(0);
1725
1726 /* Pre-constructed entries are in pfn, so convert to mfn */
1727 /* L4[273] -> level3_ident_pgt */
1728 /* L4[511] -> level3_kernel_pgt */
1729 convert_pfn_mfn(init_top_pgt);
1730
1731 /* L3_i[0] -> level2_ident_pgt */
1732 convert_pfn_mfn(level3_ident_pgt);
1733 /* L3_k[510] -> level2_kernel_pgt */
1734 /* L3_k[511] -> level2_fixmap_pgt */
1735 convert_pfn_mfn(level3_kernel_pgt);
1736
1737 /* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */
1738 convert_pfn_mfn(level2_fixmap_pgt);
1739
1740 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
1741 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1742 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1743
1744 addr[0] = (unsigned long)pgd;
1745 addr[1] = (unsigned long)l3;
1746 addr[2] = (unsigned long)l2;
1747 /* Graft it onto L4[273][0]. Note that we creating an aliasing problem:
1748 * Both L4[273][0] and L4[511][510] have entries that point to the same
1749 * L2 (PMD) tables. Meaning that if you modify it in __va space
1750 * it will be also modified in the __ka space! (But if you just
1751 * modify the PMD table to point to other PTE's or none, then you
1752 * are OK - which is what cleanup_highmap does) */
1753 copy_page(level2_ident_pgt, l2);
1754 /* Graft it onto L4[511][510] */
1755 copy_page(level2_kernel_pgt, l2);
1756
1757 /*
1758 * Zap execute permission from the ident map. Due to the sharing of
1759 * L1 entries we need to do this in the L2.
1760 */
1761 if (__supported_pte_mask & _PAGE_NX) {
1762 for (i = 0; i < PTRS_PER_PMD; ++i) {
1763 if (pmd_none(level2_ident_pgt[i]))
1764 continue;
1765 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
1766 }
1767 }
1768
1769 /* Copy the initial P->M table mappings if necessary. */
1770 i = pgd_index(xen_start_info->mfn_list);
1771 if (i && i < pgd_index(__START_KERNEL_map))
1772 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
1773
1774 /* Make pagetable pieces RO */
1775 set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
1776 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1777 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1778 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1779 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1780 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1781
1782 for (i = 0; i < FIXMAP_PMD_NUM; i++) {
1783 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
1784 PAGE_KERNEL_RO);
1785 }
1786
1787 /* Pin down new L4 */
1788 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1789 PFN_DOWN(__pa_symbol(init_top_pgt)));
1790
1791 /* Unpin Xen-provided one */
1792 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1793
1794 #ifdef CONFIG_X86_VSYSCALL_EMULATION
1795 /* Pin user vsyscall L3 */
1796 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1797 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1798 PFN_DOWN(__pa_symbol(level3_user_vsyscall)));
1799 #endif
1800
1801 /*
1802 * At this stage there can be no user pgd, and no page structure to
1803 * attach it to, so make sure we just set kernel pgd.
1804 */
1805 xen_mc_batch();
1806 __xen_write_cr3(true, __pa(init_top_pgt));
1807 xen_mc_issue(XEN_LAZY_CPU);
1808
1809 /* We can't that easily rip out L3 and L2, as the Xen pagetables are
1810 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
1811 * the initial domain. For guests using the toolstack, they are in:
1812 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
1813 * rip out the [L4] (pgd), but for guests we shave off three pages.
1814 */
1815 for (i = 0; i < ARRAY_SIZE(addr); i++)
1816 check_pt_base(&pt_base, &pt_end, addr[i]);
1817
1818 /* Our (by three pages) smaller Xen pagetable that we are using */
1819 xen_pt_base = PFN_PHYS(pt_base);
1820 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
1821 memblock_reserve(xen_pt_base, xen_pt_size);
1822
1823 /* Revector the xen_start_info */
1824 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
1825 }
1826
1827 /*
1828 * Read a value from a physical address.
1829 */
xen_read_phys_ulong(phys_addr_t addr)1830 static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
1831 {
1832 unsigned long *vaddr;
1833 unsigned long val;
1834
1835 vaddr = early_memremap_ro(addr, sizeof(val));
1836 val = *vaddr;
1837 early_memunmap(vaddr, sizeof(val));
1838 return val;
1839 }
1840
1841 /*
1842 * Translate a virtual address to a physical one without relying on mapped
1843 * page tables. Don't rely on big pages being aligned in (guest) physical
1844 * space!
1845 */
xen_early_virt_to_phys(unsigned long vaddr)1846 static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
1847 {
1848 phys_addr_t pa;
1849 pgd_t pgd;
1850 pud_t pud;
1851 pmd_t pmd;
1852 pte_t pte;
1853
1854 pa = read_cr3_pa();
1855 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
1856 sizeof(pgd)));
1857 if (!pgd_present(pgd))
1858 return 0;
1859
1860 pa = pgd_val(pgd) & PTE_PFN_MASK;
1861 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
1862 sizeof(pud)));
1863 if (!pud_present(pud))
1864 return 0;
1865 pa = pud_val(pud) & PTE_PFN_MASK;
1866 if (pud_leaf(pud))
1867 return pa + (vaddr & ~PUD_MASK);
1868
1869 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
1870 sizeof(pmd)));
1871 if (!pmd_present(pmd))
1872 return 0;
1873 pa = pmd_val(pmd) & PTE_PFN_MASK;
1874 if (pmd_leaf(pmd))
1875 return pa + (vaddr & ~PMD_MASK);
1876
1877 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
1878 sizeof(pte)));
1879 if (!pte_present(pte))
1880 return 0;
1881 pa = pte_pfn(pte) << PAGE_SHIFT;
1882
1883 return pa | (vaddr & ~PAGE_MASK);
1884 }
1885
1886 /*
1887 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
1888 * this area.
1889 */
xen_relocate_p2m(void)1890 void __init xen_relocate_p2m(void)
1891 {
1892 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
1893 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
1894 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
1895 pte_t *pt;
1896 pmd_t *pmd;
1897 pud_t *pud;
1898 pgd_t *pgd;
1899 unsigned long *new_p2m;
1900
1901 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1902 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
1903 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
1904 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
1905 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
1906 n_frames = n_pte + n_pt + n_pmd + n_pud;
1907
1908 new_area = xen_find_free_area(PFN_PHYS(n_frames));
1909 if (!new_area) {
1910 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
1911 BUG();
1912 }
1913
1914 /*
1915 * Setup the page tables for addressing the new p2m list.
1916 * We have asked the hypervisor to map the p2m list at the user address
1917 * PUD_SIZE. It may have done so, or it may have used a kernel space
1918 * address depending on the Xen version.
1919 * To avoid any possible virtual address collision, just use
1920 * 2 * PUD_SIZE for the new area.
1921 */
1922 pud_phys = new_area;
1923 pmd_phys = pud_phys + PFN_PHYS(n_pud);
1924 pt_phys = pmd_phys + PFN_PHYS(n_pmd);
1925 p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
1926
1927 pgd = __va(read_cr3_pa());
1928 new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
1929 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
1930 pud = early_memremap(pud_phys, PAGE_SIZE);
1931 clear_page(pud);
1932 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
1933 idx_pmd++) {
1934 pmd = early_memremap(pmd_phys, PAGE_SIZE);
1935 clear_page(pmd);
1936 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
1937 idx_pt++) {
1938 pt = early_memremap(pt_phys, PAGE_SIZE);
1939 clear_page(pt);
1940 for (idx_pte = 0;
1941 idx_pte < min(n_pte, PTRS_PER_PTE);
1942 idx_pte++) {
1943 pt[idx_pte] = pfn_pte(p2m_pfn,
1944 PAGE_KERNEL);
1945 p2m_pfn++;
1946 }
1947 n_pte -= PTRS_PER_PTE;
1948 early_memunmap(pt, PAGE_SIZE);
1949 make_lowmem_page_readonly(__va(pt_phys));
1950 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
1951 PFN_DOWN(pt_phys));
1952 pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys);
1953 pt_phys += PAGE_SIZE;
1954 }
1955 n_pt -= PTRS_PER_PMD;
1956 early_memunmap(pmd, PAGE_SIZE);
1957 make_lowmem_page_readonly(__va(pmd_phys));
1958 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
1959 PFN_DOWN(pmd_phys));
1960 pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys);
1961 pmd_phys += PAGE_SIZE;
1962 }
1963 n_pmd -= PTRS_PER_PUD;
1964 early_memunmap(pud, PAGE_SIZE);
1965 make_lowmem_page_readonly(__va(pud_phys));
1966 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
1967 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
1968 pud_phys += PAGE_SIZE;
1969 }
1970
1971 /* Now copy the old p2m info to the new area. */
1972 memcpy(new_p2m, xen_p2m_addr, size);
1973 xen_p2m_addr = new_p2m;
1974
1975 /* Release the old p2m list and set new list info. */
1976 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
1977 BUG_ON(!p2m_pfn);
1978 p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
1979
1980 if (xen_start_info->mfn_list < __START_KERNEL_map) {
1981 pfn = xen_start_info->first_p2m_pfn;
1982 pfn_end = xen_start_info->first_p2m_pfn +
1983 xen_start_info->nr_p2m_frames;
1984 set_pgd(pgd + 1, __pgd(0));
1985 } else {
1986 pfn = p2m_pfn;
1987 pfn_end = p2m_pfn_end;
1988 }
1989
1990 memblock_phys_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
1991 while (pfn < pfn_end) {
1992 if (pfn == p2m_pfn) {
1993 pfn = p2m_pfn_end;
1994 continue;
1995 }
1996 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1997 pfn++;
1998 }
1999
2000 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
2001 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
2002 xen_start_info->nr_p2m_frames = n_frames;
2003 }
2004
xen_reserve_special_pages(void)2005 void __init xen_reserve_special_pages(void)
2006 {
2007 phys_addr_t paddr;
2008
2009 memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
2010 if (xen_start_info->store_mfn) {
2011 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
2012 memblock_reserve(paddr, PAGE_SIZE);
2013 }
2014 if (!xen_initial_domain()) {
2015 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
2016 memblock_reserve(paddr, PAGE_SIZE);
2017 }
2018 }
2019
xen_pt_check_e820(void)2020 void __init xen_pt_check_e820(void)
2021 {
2022 xen_chk_is_e820_usable(xen_pt_base, xen_pt_size, "page table");
2023 }
2024
2025 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
2026
xen_set_fixmap(unsigned idx,phys_addr_t phys,pgprot_t prot)2027 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
2028 {
2029 pte_t pte;
2030 unsigned long vaddr;
2031
2032 phys >>= PAGE_SHIFT;
2033
2034 switch (idx) {
2035 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
2036 #ifdef CONFIG_X86_VSYSCALL_EMULATION
2037 case VSYSCALL_PAGE:
2038 #endif
2039 /* All local page mappings */
2040 pte = pfn_pte(phys, prot);
2041 break;
2042
2043 #ifdef CONFIG_X86_LOCAL_APIC
2044 case FIX_APIC_BASE: /* maps dummy local APIC */
2045 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2046 break;
2047 #endif
2048
2049 #ifdef CONFIG_X86_IO_APIC
2050 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2051 /*
2052 * We just don't map the IO APIC - all access is via
2053 * hypercalls. Keep the address in the pte for reference.
2054 */
2055 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2056 break;
2057 #endif
2058
2059 case FIX_PARAVIRT_BOOTMAP:
2060 /* This is an MFN, but it isn't an IO mapping from the
2061 IO domain */
2062 pte = mfn_pte(phys, prot);
2063 break;
2064
2065 default:
2066 /* By default, set_fixmap is used for hardware mappings */
2067 pte = mfn_pte(phys, prot);
2068 break;
2069 }
2070
2071 vaddr = __fix_to_virt(idx);
2072 if (HYPERVISOR_update_va_mapping(vaddr, pte, UVMF_INVLPG))
2073 BUG();
2074
2075 #ifdef CONFIG_X86_VSYSCALL_EMULATION
2076 /* Replicate changes to map the vsyscall page into the user
2077 pagetable vsyscall mapping. */
2078 if (idx == VSYSCALL_PAGE)
2079 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2080 #endif
2081 }
2082
xen_enter_lazy_mmu(void)2083 static void xen_enter_lazy_mmu(void)
2084 {
2085 enter_lazy(XEN_LAZY_MMU);
2086 }
2087
xen_flush_lazy_mmu(void)2088 static void xen_flush_lazy_mmu(void)
2089 {
2090 preempt_disable();
2091
2092 if (xen_get_lazy_mode() == XEN_LAZY_MMU) {
2093 arch_leave_lazy_mmu_mode();
2094 arch_enter_lazy_mmu_mode();
2095 }
2096
2097 preempt_enable();
2098 }
2099
xen_post_allocator_init(void)2100 static void __init xen_post_allocator_init(void)
2101 {
2102 pv_ops.mmu.set_pte = xen_set_pte;
2103 pv_ops.mmu.set_pmd = xen_set_pmd;
2104 pv_ops.mmu.set_pud = xen_set_pud;
2105 pv_ops.mmu.set_p4d = xen_set_p4d;
2106
2107 /* This will work as long as patching hasn't happened yet
2108 (which it hasn't) */
2109 pv_ops.mmu.alloc_pte = xen_alloc_pte;
2110 pv_ops.mmu.alloc_pmd = xen_alloc_pmd;
2111 pv_ops.mmu.release_pte = xen_release_pte;
2112 pv_ops.mmu.release_pmd = xen_release_pmd;
2113 pv_ops.mmu.alloc_pud = xen_alloc_pud;
2114 pv_ops.mmu.release_pud = xen_release_pud;
2115 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte);
2116
2117 pv_ops.mmu.write_cr3 = &xen_write_cr3;
2118 }
2119
xen_leave_lazy_mmu(void)2120 static void xen_leave_lazy_mmu(void)
2121 {
2122 preempt_disable();
2123 xen_mc_flush();
2124 leave_lazy(XEN_LAZY_MMU);
2125 preempt_enable();
2126 }
2127
2128 static const typeof(pv_ops) xen_mmu_ops __initconst = {
2129 .mmu = {
2130 .read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2),
2131 .write_cr2 = xen_write_cr2,
2132
2133 .read_cr3 = xen_read_cr3,
2134 .write_cr3 = xen_write_cr3_init,
2135
2136 .flush_tlb_user = xen_flush_tlb,
2137 .flush_tlb_kernel = xen_flush_tlb,
2138 .flush_tlb_one_user = xen_flush_tlb_one_user,
2139 .flush_tlb_multi = xen_flush_tlb_multi,
2140 .tlb_remove_table = tlb_remove_table,
2141
2142 .pgd_alloc = xen_pgd_alloc,
2143 .pgd_free = xen_pgd_free,
2144
2145 .alloc_pte = xen_alloc_pte_init,
2146 .release_pte = xen_release_pte_init,
2147 .alloc_pmd = xen_alloc_pmd_init,
2148 .release_pmd = xen_release_pmd_init,
2149
2150 .set_pte = xen_set_pte_init,
2151 .set_pmd = xen_set_pmd_hyper,
2152
2153 .ptep_modify_prot_start = xen_ptep_modify_prot_start,
2154 .ptep_modify_prot_commit = xen_ptep_modify_prot_commit,
2155
2156 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2157 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2158
2159 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
2160 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2161
2162 .set_pud = xen_set_pud_hyper,
2163
2164 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2165 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2166
2167 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2168 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2169 .set_p4d = xen_set_p4d_hyper,
2170
2171 .alloc_pud = xen_alloc_pmd_init,
2172 .release_pud = xen_release_pmd_init,
2173
2174 #if CONFIG_PGTABLE_LEVELS >= 5
2175 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
2176 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
2177 #endif
2178
2179 .enter_mmap = xen_enter_mmap,
2180 .exit_mmap = xen_exit_mmap,
2181
2182 .lazy_mode = {
2183 .enter = xen_enter_lazy_mmu,
2184 .leave = xen_leave_lazy_mmu,
2185 .flush = xen_flush_lazy_mmu,
2186 },
2187
2188 .set_fixmap = xen_set_fixmap,
2189 },
2190 };
2191
xen_init_mmu_ops(void)2192 void __init xen_init_mmu_ops(void)
2193 {
2194 x86_init.paging.pagetable_init = xen_pagetable_init;
2195 x86_init.hyper.init_after_bootmem = xen_after_bootmem;
2196
2197 pv_ops.mmu = xen_mmu_ops.mmu;
2198
2199 memset(dummy_mapping, 0xff, PAGE_SIZE);
2200 }
2201
2202 /* Protected by xen_reservation_lock. */
2203 #define MAX_CONTIG_ORDER 9 /* 2MB */
2204 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2205
2206 #define VOID_PTE (mfn_pte(0, __pgprot(0)))
xen_zap_pfn_range(unsigned long vaddr,unsigned int order,unsigned long * in_frames,unsigned long * out_frames)2207 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2208 unsigned long *in_frames,
2209 unsigned long *out_frames)
2210 {
2211 int i;
2212 struct multicall_space mcs;
2213
2214 xen_mc_batch();
2215 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2216 mcs = __xen_mc_entry(0);
2217
2218 if (in_frames)
2219 in_frames[i] = virt_to_mfn((void *)vaddr);
2220
2221 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2222 __set_phys_to_machine(virt_to_pfn((void *)vaddr), INVALID_P2M_ENTRY);
2223
2224 if (out_frames)
2225 out_frames[i] = virt_to_pfn((void *)vaddr);
2226 }
2227 xen_mc_issue(0);
2228 }
2229
2230 /*
2231 * Update the pfn-to-mfn mappings for a virtual address range, either to
2232 * point to an array of mfns, or contiguously from a single starting
2233 * mfn.
2234 */
xen_remap_exchanged_ptes(unsigned long vaddr,int order,unsigned long * mfns,unsigned long first_mfn)2235 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2236 unsigned long *mfns,
2237 unsigned long first_mfn)
2238 {
2239 unsigned i, limit;
2240 unsigned long mfn;
2241
2242 xen_mc_batch();
2243
2244 limit = 1u << order;
2245 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2246 struct multicall_space mcs;
2247 unsigned flags;
2248
2249 mcs = __xen_mc_entry(0);
2250 if (mfns)
2251 mfn = mfns[i];
2252 else
2253 mfn = first_mfn + i;
2254
2255 if (i < (limit - 1))
2256 flags = 0;
2257 else {
2258 if (order == 0)
2259 flags = UVMF_INVLPG | UVMF_ALL;
2260 else
2261 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2262 }
2263
2264 MULTI_update_va_mapping(mcs.mc, vaddr,
2265 mfn_pte(mfn, PAGE_KERNEL), flags);
2266
2267 set_phys_to_machine(virt_to_pfn((void *)vaddr), mfn);
2268 }
2269
2270 xen_mc_issue(0);
2271 }
2272
2273 /*
2274 * Perform the hypercall to exchange a region of our pfns to point to
2275 * memory with the required contiguous alignment. Takes the pfns as
2276 * input, and populates mfns as output.
2277 *
2278 * Returns a success code indicating whether the hypervisor was able to
2279 * satisfy the request or not.
2280 */
xen_exchange_memory(unsigned long extents_in,unsigned int order_in,unsigned long * pfns_in,unsigned long extents_out,unsigned int order_out,unsigned long * mfns_out,unsigned int address_bits)2281 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2282 unsigned long *pfns_in,
2283 unsigned long extents_out,
2284 unsigned int order_out,
2285 unsigned long *mfns_out,
2286 unsigned int address_bits)
2287 {
2288 long rc;
2289 int success;
2290
2291 struct xen_memory_exchange exchange = {
2292 .in = {
2293 .nr_extents = extents_in,
2294 .extent_order = order_in,
2295 .extent_start = pfns_in,
2296 .domid = DOMID_SELF
2297 },
2298 .out = {
2299 .nr_extents = extents_out,
2300 .extent_order = order_out,
2301 .extent_start = mfns_out,
2302 .address_bits = address_bits,
2303 .domid = DOMID_SELF
2304 }
2305 };
2306
2307 BUG_ON(extents_in << order_in != extents_out << order_out);
2308
2309 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2310 success = (exchange.nr_exchanged == extents_in);
2311
2312 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2313 BUG_ON(success && (rc != 0));
2314
2315 return success;
2316 }
2317
xen_create_contiguous_region(phys_addr_t pstart,unsigned int order,unsigned int address_bits,dma_addr_t * dma_handle)2318 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2319 unsigned int address_bits,
2320 dma_addr_t *dma_handle)
2321 {
2322 unsigned long *in_frames = discontig_frames, out_frame;
2323 unsigned long flags;
2324 int success;
2325 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2326
2327 if (unlikely(order > MAX_CONTIG_ORDER))
2328 return -ENOMEM;
2329
2330 memset((void *) vstart, 0, PAGE_SIZE << order);
2331
2332 spin_lock_irqsave(&xen_reservation_lock, flags);
2333
2334 /* 1. Zap current PTEs, remembering MFNs. */
2335 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2336
2337 /* 2. Get a new contiguous memory extent. */
2338 out_frame = virt_to_pfn((void *)vstart);
2339 success = xen_exchange_memory(1UL << order, 0, in_frames,
2340 1, order, &out_frame,
2341 address_bits);
2342
2343 /* 3. Map the new extent in place of old pages. */
2344 if (success)
2345 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2346 else
2347 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2348
2349 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2350
2351 *dma_handle = virt_to_machine(vstart).maddr;
2352 return success ? 0 : -ENOMEM;
2353 }
2354
xen_destroy_contiguous_region(phys_addr_t pstart,unsigned int order)2355 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2356 {
2357 unsigned long *out_frames = discontig_frames, in_frame;
2358 unsigned long flags;
2359 int success;
2360 unsigned long vstart;
2361
2362 if (unlikely(order > MAX_CONTIG_ORDER))
2363 return;
2364
2365 vstart = (unsigned long)phys_to_virt(pstart);
2366 memset((void *) vstart, 0, PAGE_SIZE << order);
2367
2368 spin_lock_irqsave(&xen_reservation_lock, flags);
2369
2370 /* 1. Find start MFN of contiguous extent. */
2371 in_frame = virt_to_mfn((void *)vstart);
2372
2373 /* 2. Zap current PTEs. */
2374 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2375
2376 /* 3. Do the exchange for non-contiguous MFNs. */
2377 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2378 0, out_frames, 0);
2379
2380 /* 4. Map new pages in place of old pages. */
2381 if (success)
2382 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2383 else
2384 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2385
2386 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2387 }
2388
xen_flush_tlb_all(void)2389 static noinline void xen_flush_tlb_all(void)
2390 {
2391 struct mmuext_op *op;
2392 struct multicall_space mcs;
2393
2394 preempt_disable();
2395
2396 mcs = xen_mc_entry(sizeof(*op));
2397
2398 op = mcs.args;
2399 op->cmd = MMUEXT_TLB_FLUSH_ALL;
2400 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
2401
2402 xen_mc_issue(XEN_LAZY_MMU);
2403
2404 preempt_enable();
2405 }
2406
2407 #define REMAP_BATCH_SIZE 16
2408
2409 struct remap_data {
2410 xen_pfn_t *pfn;
2411 bool contiguous;
2412 bool no_translate;
2413 pgprot_t prot;
2414 struct mmu_update *mmu_update;
2415 };
2416
remap_area_pfn_pte_fn(pte_t * ptep,unsigned long addr,void * data)2417 static int remap_area_pfn_pte_fn(pte_t *ptep, unsigned long addr, void *data)
2418 {
2419 struct remap_data *rmd = data;
2420 pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot));
2421
2422 /*
2423 * If we have a contiguous range, just update the pfn itself,
2424 * else update pointer to be "next pfn".
2425 */
2426 if (rmd->contiguous)
2427 (*rmd->pfn)++;
2428 else
2429 rmd->pfn++;
2430
2431 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2432 rmd->mmu_update->ptr |= rmd->no_translate ?
2433 MMU_PT_UPDATE_NO_TRANSLATE :
2434 MMU_NORMAL_PT_UPDATE;
2435 rmd->mmu_update->val = pte_val_ma(pte);
2436 rmd->mmu_update++;
2437
2438 return 0;
2439 }
2440
xen_remap_pfn(struct vm_area_struct * vma,unsigned long addr,xen_pfn_t * pfn,int nr,int * err_ptr,pgprot_t prot,unsigned int domid,bool no_translate)2441 int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr,
2442 xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot,
2443 unsigned int domid, bool no_translate)
2444 {
2445 int err = 0;
2446 struct remap_data rmd;
2447 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2448 unsigned long range;
2449 int mapped = 0;
2450
2451 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
2452
2453 rmd.pfn = pfn;
2454 rmd.prot = prot;
2455 /*
2456 * We use the err_ptr to indicate if there we are doing a contiguous
2457 * mapping or a discontiguous mapping.
2458 */
2459 rmd.contiguous = !err_ptr;
2460 rmd.no_translate = no_translate;
2461
2462 while (nr) {
2463 int index = 0;
2464 int done = 0;
2465 int batch = min(REMAP_BATCH_SIZE, nr);
2466 int batch_left = batch;
2467
2468 range = (unsigned long)batch << PAGE_SHIFT;
2469
2470 rmd.mmu_update = mmu_update;
2471 err = apply_to_page_range(vma->vm_mm, addr, range,
2472 remap_area_pfn_pte_fn, &rmd);
2473 if (err)
2474 goto out;
2475
2476 /*
2477 * We record the error for each page that gives an error, but
2478 * continue mapping until the whole set is done
2479 */
2480 do {
2481 int i;
2482
2483 err = HYPERVISOR_mmu_update(&mmu_update[index],
2484 batch_left, &done, domid);
2485
2486 /*
2487 * @err_ptr may be the same buffer as @gfn, so
2488 * only clear it after each chunk of @gfn is
2489 * used.
2490 */
2491 if (err_ptr) {
2492 for (i = index; i < index + done; i++)
2493 err_ptr[i] = 0;
2494 }
2495 if (err < 0) {
2496 if (!err_ptr)
2497 goto out;
2498 err_ptr[i] = err;
2499 done++; /* Skip failed frame. */
2500 } else
2501 mapped += done;
2502 batch_left -= done;
2503 index += done;
2504 } while (batch_left);
2505
2506 nr -= batch;
2507 addr += range;
2508 if (err_ptr)
2509 err_ptr += batch;
2510 cond_resched();
2511 }
2512 out:
2513
2514 xen_flush_tlb_all();
2515
2516 return err < 0 ? err : mapped;
2517 }
2518 EXPORT_SYMBOL_GPL(xen_remap_pfn);
2519
2520 #ifdef CONFIG_VMCORE_INFO
paddr_vmcoreinfo_note(void)2521 phys_addr_t paddr_vmcoreinfo_note(void)
2522 {
2523 if (xen_pv_domain())
2524 return virt_to_machine(vmcoreinfo_note).maddr;
2525 else
2526 return __pa(vmcoreinfo_note);
2527 }
2528 #endif /* CONFIG_KEXEC_CORE */
2529