xref: /linux/drivers/gpu/drm/xe/xe_guc_ct.h (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #ifndef _XE_GUC_CT_H_
7 #define _XE_GUC_CT_H_
8 
9 #include "xe_guc_ct_types.h"
10 
11 struct drm_printer;
12 
13 int xe_guc_ct_init(struct xe_guc_ct *ct);
14 int xe_guc_ct_enable(struct xe_guc_ct *ct);
15 void xe_guc_ct_disable(struct xe_guc_ct *ct);
16 void xe_guc_ct_stop(struct xe_guc_ct *ct);
17 void xe_guc_ct_fast_path(struct xe_guc_ct *ct);
18 
19 struct xe_guc_ct_snapshot *
20 xe_guc_ct_snapshot_capture(struct xe_guc_ct *ct, bool atomic);
21 void xe_guc_ct_snapshot_print(struct xe_guc_ct_snapshot *snapshot,
22 			      struct drm_printer *p);
23 void xe_guc_ct_snapshot_free(struct xe_guc_ct_snapshot *snapshot);
24 void xe_guc_ct_print(struct xe_guc_ct *ct, struct drm_printer *p, bool atomic);
25 
xe_guc_ct_enabled(struct xe_guc_ct * ct)26 static inline bool xe_guc_ct_enabled(struct xe_guc_ct *ct)
27 {
28 	return ct->state == XE_GUC_CT_STATE_ENABLED;
29 }
30 
xe_guc_ct_irq_handler(struct xe_guc_ct * ct)31 static inline void xe_guc_ct_irq_handler(struct xe_guc_ct *ct)
32 {
33 	if (!xe_guc_ct_enabled(ct))
34 		return;
35 
36 	wake_up_all(&ct->wq);
37 	queue_work(ct->g2h_wq, &ct->g2h_worker);
38 	xe_guc_ct_fast_path(ct);
39 }
40 
41 /* Basic CT send / receives */
42 int xe_guc_ct_send(struct xe_guc_ct *ct, const u32 *action, u32 len,
43 		   u32 g2h_len, u32 num_g2h);
44 int xe_guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action, u32 len,
45 			  u32 g2h_len, u32 num_g2h);
46 int xe_guc_ct_send_recv(struct xe_guc_ct *ct, const u32 *action, u32 len,
47 			u32 *response_buffer);
48 static inline int
xe_guc_ct_send_block(struct xe_guc_ct * ct,const u32 * action,u32 len)49 xe_guc_ct_send_block(struct xe_guc_ct *ct, const u32 *action, u32 len)
50 {
51 	return xe_guc_ct_send_recv(ct, action, len, NULL);
52 }
53 
54 /* This is only version of the send CT you can call from a G2H handler */
55 int xe_guc_ct_send_g2h_handler(struct xe_guc_ct *ct, const u32 *action,
56 			       u32 len);
57 
58 /* Can't fail because a GT reset is in progress */
59 int xe_guc_ct_send_recv_no_fail(struct xe_guc_ct *ct, const u32 *action,
60 				u32 len, u32 *response_buffer);
61 static inline int
xe_guc_ct_send_block_no_fail(struct xe_guc_ct * ct,const u32 * action,u32 len)62 xe_guc_ct_send_block_no_fail(struct xe_guc_ct *ct, const u32 *action, u32 len)
63 {
64 	return xe_guc_ct_send_recv_no_fail(ct, action, len, NULL);
65 }
66 
67 long xe_guc_ct_queue_proc_time_jiffies(struct xe_guc_ct *ct);
68 
69 #endif
70