| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4_3.c | 558 gfx_v9_4_3_xcc_select_se_sh(struct amdgpu_device * adev,u32 se_num,u32 sh_num,u32 instance,int xcc_id) gfx_v9_4_3_xcc_select_se_sh() argument
584 wave_read_ind(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t address) wave_read_ind() argument
594 wave_read_regs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t thread,uint32_t regno,uint32_t num,uint32_t * out) wave_read_regs() argument
610 gfx_v9_4_3_read_wave_data(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t * dst,int * no_fields) gfx_v9_4_3_read_wave_data() argument
632 gfx_v9_4_3_read_wave_sgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t start,uint32_t size,uint32_t * dst) gfx_v9_4_3_read_wave_sgprs() argument
640 gfx_v9_4_3_read_wave_vgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t thread,uint32_t start,uint32_t size,uint32_t * dst) gfx_v9_4_3_read_wave_vgprs() argument
650 gfx_v9_4_3_select_me_pipe_q(struct amdgpu_device * adev,u32 me,u32 pipe,u32 q,u32 vm,u32 xcc_id) gfx_v9_4_3_select_me_pipe_q() argument
850 gfx_v9_4_3_compute_ring_init(struct amdgpu_device * adev,int ring_id,int xcc_id,int mec,int pipe,int queue) gfx_v9_4_3_compute_ring_init() argument
890 int i, j, k, r, ring_id, xcc_id, num_xcc; gfx_v9_4_3_sw_init() local
1011 gfx_v9_4_3_xcc_init_compute_vmid(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_init_compute_vmid() argument
1055 gfx_v9_4_3_xcc_init_gds_vmid(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_init_gds_vmid() argument
1074 gfx_v9_4_3_xcc_constants_init(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_constants_init() argument
1135 gfx_v9_4_3_xcc_enable_save_restore_machine(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_enable_save_restore_machine() argument
1140 gfx_v9_4_3_xcc_init_pg(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_init_pg() argument
1150 gfx_v9_4_3_xcc_disable_gpa_mode(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_disable_gpa_mode() argument
1171 gfx_v9_4_3_xcc_set_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_set_safe_mode() argument
1189 gfx_v9_4_3_xcc_unset_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_unset_safe_mode() argument
1199 int xcc_id, num_xcc; gfx_v9_4_3_init_rlcg_reg_access_ctrl() local
1226 gfx_v9_4_3_xcc_wait_for_rlc_serdes(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_wait_for_rlc_serdes() argument
1268 gfx_v9_4_3_xcc_enable_gui_idle_interrupt(struct amdgpu_device * adev,bool enable,int xcc_id) gfx_v9_4_3_xcc_enable_gui_idle_interrupt() argument
1283 gfx_v9_4_3_xcc_rlc_stop(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_rlc_stop() argument
1300 gfx_v9_4_3_xcc_rlc_reset(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_rlc_reset() argument
1319 gfx_v9_4_3_xcc_rlc_start(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_rlc_start() argument
1362 gfx_v9_4_3_xcc_rlc_load_microcode(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_rlc_load_microcode() argument
1392 gfx_v9_4_3_xcc_rlc_resume(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_rlc_resume() argument
1493 gfx_v9_4_3_xcc_cp_compute_enable(struct amdgpu_device * adev,bool enable,int xcc_id) gfx_v9_4_3_xcc_cp_compute_enable() argument
1506 gfx_v9_4_3_xcc_cp_compute_load_microcode(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_cp_compute_load_microcode() argument
1554 gfx_v9_4_3_xcc_kiq_setting(struct amdgpu_ring * ring,int xcc_id) gfx_v9_4_3_xcc_kiq_setting() argument
1581 gfx_v9_4_3_xcc_mqd_init(struct amdgpu_ring * ring,int xcc_id) gfx_v9_4_3_xcc_mqd_init() argument
1713 gfx_v9_4_3_xcc_kiq_init_register(struct amdgpu_ring * ring,int xcc_id) gfx_v9_4_3_xcc_kiq_init_register() argument
1827 gfx_v9_4_3_xcc_q_fini_register(struct amdgpu_ring * ring,int xcc_id) gfx_v9_4_3_xcc_q_fini_register() argument
1866 gfx_v9_4_3_xcc_kiq_init_queue(struct amdgpu_ring * ring,int xcc_id) gfx_v9_4_3_xcc_kiq_init_queue() argument
1913 gfx_v9_4_3_xcc_kcq_init_queue(struct amdgpu_ring * ring,int xcc_id) gfx_v9_4_3_xcc_kcq_init_queue() argument
1951 gfx_v9_4_3_xcc_kcq_fini_register(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_kcq_fini_register() argument
1972 gfx_v9_4_3_xcc_kiq_resume(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_kiq_resume() argument
1996 gfx_v9_4_3_xcc_kcq_resume(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_kcq_resume() argument
2025 gfx_v9_4_3_xcc_cp_resume(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_cp_resume() argument
2098 gfx_v9_4_3_xcc_cp_enable(struct amdgpu_device * adev,bool enable,int xcc_id) gfx_v9_4_3_xcc_cp_enable() argument
2103 gfx_v9_4_3_xcc_fini(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_xcc_fini() argument
2338 gfx_v9_4_3_xcc_update_sram_fgcg(struct amdgpu_device * adev,bool enable,int xcc_id) gfx_v9_4_3_xcc_update_sram_fgcg() argument
2360 gfx_v9_4_3_xcc_update_repeater_fgcg(struct amdgpu_device * adev,bool enable,int xcc_id) gfx_v9_4_3_xcc_update_repeater_fgcg() argument
2382 gfx_v9_4_3_xcc_update_medium_grain_clock_gating(struct amdgpu_device * adev,bool enable,int xcc_id) gfx_v9_4_3_xcc_update_medium_grain_clock_gating() argument
2447 gfx_v9_4_3_xcc_update_coarse_grain_clock_gating(struct amdgpu_device * adev,bool enable,int xcc_id) gfx_v9_4_3_xcc_update_coarse_grain_clock_gating() argument
2494 gfx_v9_4_3_xcc_update_gfx_clock_gating(struct amdgpu_device * adev,bool enable,int xcc_id) gfx_v9_4_3_xcc_update_gfx_clock_gating() argument
2838 gfx_v9_4_3_xcc_set_compute_eop_interrupt_state(struct amdgpu_device * adev,int me,int pipe,enum amdgpu_interrupt_state state,int xcc_id) gfx_v9_4_3_xcc_set_compute_eop_interrupt_state() argument
2989 int i, xcc_id; gfx_v9_4_3_eop_irq() local
3028 int i, xcc_id; gfx_v9_4_3_fault() local
3891 gfx_v9_4_3_inst_query_ras_err_count(struct amdgpu_device * adev,void * ras_error_status,int xcc_id) gfx_v9_4_3_inst_query_ras_err_count() argument
3967 gfx_v9_4_3_inst_reset_ras_err_count(struct amdgpu_device * adev,void * ras_error_status,int xcc_id) gfx_v9_4_3_inst_reset_ras_err_count() argument
4017 gfx_v9_4_3_inst_enable_watchdog_timer(struct amdgpu_device * adev,void * ras_error_status,int xcc_id) gfx_v9_4_3_inst_enable_watchdog_timer() argument
4231 gfx_v9_4_3_set_user_cu_inactive_bitmap(struct amdgpu_device * adev,u32 bitmap,int xcc_id) gfx_v9_4_3_set_user_cu_inactive_bitmap() argument
4244 gfx_v9_4_3_get_cu_active_bitmap(struct amdgpu_device * adev,int xcc_id) gfx_v9_4_3_get_cu_active_bitmap() argument
4262 int i, j, k, prev_counter, counter, xcc_id, active_cu_number = 0; gfx_v9_4_3_get_cu_info() local
[all...] |
| H A D | amdgpu_gfx.c | 68 amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device * adev,int xcc_id,int mec,int pipe,int queue) amdgpu_gfx_is_mec_queue_enabled() argument
273 amdgpu_gfx_kiq_acquire(struct amdgpu_device * adev,struct amdgpu_ring * ring,int xcc_id) amdgpu_gfx_kiq_acquire() argument
307 amdgpu_gfx_kiq_init_ring(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_kiq_init_ring() argument
348 amdgpu_gfx_kiq_fini(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_kiq_fini() argument
356 amdgpu_gfx_kiq_init(struct amdgpu_device * adev,unsigned int hpd_size,int xcc_id) amdgpu_gfx_kiq_init() argument
383 amdgpu_gfx_mqd_sw_init(struct amdgpu_device * adev,unsigned int mqd_size,int xcc_id) amdgpu_gfx_mqd_sw_init() argument
473 amdgpu_gfx_mqd_sw_fini(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_mqd_sw_fini() argument
505 amdgpu_gfx_disable_kcq(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_disable_kcq() argument
557 amdgpu_gfx_disable_kgq(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_disable_kgq() argument
615 amdgpu_gfx_mes_enable_kcq(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_mes_enable_kcq() argument
653 amdgpu_gfx_enable_kcq(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_enable_kcq() argument
711 amdgpu_gfx_enable_kgq(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_enable_kgq() argument
993 amdgpu_gfx_ras_error_func(struct amdgpu_device * adev,void * ras_error_status,void (* func)(struct amdgpu_device * adev,void * ras_error_status,int xcc_id)) amdgpu_gfx_ras_error_func() argument
1009 amdgpu_kiq_rreg(struct amdgpu_device * adev,uint32_t reg,uint32_t xcc_id) amdgpu_kiq_rreg() argument
1077 amdgpu_kiq_wreg(struct amdgpu_device * adev,uint32_t reg,uint32_t v,uint32_t xcc_id) amdgpu_kiq_wreg() argument
1288 amdgpu_gfx_is_master_xcc(struct amdgpu_device * adev,int xcc_id) amdgpu_gfx_is_master_xcc() argument
[all...] |
| H A D | amdgpu_rlc.c | 38 void amdgpu_gfx_rlc_enter_safe_mode(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_rlc_enter_safe_mode()
63 void amdgpu_gfx_rlc_exit_safe_mode(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_rlc_exit_safe_mode()
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| H A D | amdgpu_virt.c | 994 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device * adev,u32 offset,u32 v,u32 flag,u32 xcc_id) amdgpu_virt_rlcg_reg_rw() argument
1092 amdgpu_sriov_wreg(struct amdgpu_device * adev,u32 offset,u32 value,u32 acc_flags,u32 hwip,u32 xcc_id) amdgpu_sriov_wreg() argument
1112 amdgpu_sriov_rreg(struct amdgpu_device * adev,u32 offset,u32 acc_flags,u32 hwip,u32 xcc_id) amdgpu_sriov_rreg() argument
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| H A D | amdgpu_umr.h | 46 u32 xcc_id; member
50 u32 gpr_or_wave, se, sh, cu, wave, simd, xcc_id; member
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| H A D | gfx_v7_0.c | 1551 int xcc_id) in gfx_v7_0_select_se_sh() argument
3321 gfx_v7_0_set_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v7_0_set_safe_mode() argument
3343 gfx_v7_0_unset_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v7_0_unset_safe_mode() argument
4071 gfx_v7_0_read_wave_data(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t * dst,int * no_fields) gfx_v7_0_read_wave_data() argument
4096 gfx_v7_0_read_wave_sgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t start,uint32_t size,uint32_t * dst) gfx_v7_0_read_wave_sgprs() argument
4106 gfx_v7_0_select_me_pipe_q(struct amdgpu_device * adev,u32 me,u32 pipe,u32 q,u32 vm,u32 xcc_id) gfx_v7_0_select_me_pipe_q() argument
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| H A D | gfx_v12_0.c | 794 uint32_t xcc_id, in gfx_v12_0_read_wave_data() argument
831 uint32_t xcc_id, uint32_t simd, in gfx_v12_0_read_wave_sgprs() argument
843 uint32_t xcc_id, uint32_t simd, in gfx_v12_0_read_wave_vgprs() argument
854 u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) in gfx_v12_0_select_me_pipe_q() argument
1322 int xcc_id = 0; in gfx_v12_0_sw_init() local
1519 gfx_v12_0_select_se_sh(struct amdgpu_device * adev,u32 se_num,u32 sh_num,u32 instance,int xcc_id) gfx_v12_0_select_se_sh() argument
3688 gfx_v12_0_set_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v12_0_set_safe_mode() argument
3708 gfx_v12_0_unset_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v12_0_unset_safe_mode() argument
[all...] |
| H A D | gfxhub_v1_0.c | 447 gfxhub_v1_0_query_utcl2_poison_status(struct amdgpu_device * adev,int xcc_id) gfxhub_v1_0_query_utcl2_poison_status() argument
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| H A D | gfx_v8_0.c | 1900 int xcc_id = 0; in gfx_v8_0_sw_init() local
3395 int xcc_id) in gfx_v8_0_select_se_sh() argument
3418 u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) in gfx_v8_0_select_me_pipe_q() argument
5214 static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v8_0_read_wave_data() argument
5239 static void gfx_v8_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v8_0_read_wave_sgprs() argument
5534 static void gfx_v8_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v8_0_set_safe_mode() argument
5561 static void gfx_v8_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v8_0_unset_safe_mode() argument
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| H A D | gfx_v6_0.c | 1287 u32 sh_num, u32 instance, int xcc_id) in gfx_v6_0_select_se_sh()
2970 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uin… in gfx_v6_0_read_wave_data()
2995 static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v6_0_read_wave_sgprs()
3005 u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) in gfx_v6_0_select_me_pipe_q()
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| H A D | gfx_v11_0.c | 953 gfx_v11_0_read_wave_data(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t * dst,int * no_fields) gfx_v11_0_read_wave_data() argument
979 gfx_v11_0_read_wave_sgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t start,uint32_t size,uint32_t * dst) gfx_v11_0_read_wave_sgprs() argument
990 gfx_v11_0_read_wave_vgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t thread,uint32_t start,uint32_t size,uint32_t * dst) gfx_v11_0_read_wave_vgprs() argument
1001 gfx_v11_0_select_me_pipe_q(struct amdgpu_device * adev,u32 me,u32 pipe,u32 q,u32 vm,u32 xcc_id) gfx_v11_0_select_me_pipe_q() argument
1524 int xcc_id = 0; gfx_v11_0_sw_init() local
1745 gfx_v11_0_select_se_sh(struct amdgpu_device * adev,u32 se_num,u32 sh_num,u32 instance,int xcc_id) gfx_v11_0_select_se_sh() argument
4969 gfx_v11_0_set_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v11_0_set_safe_mode() argument
4988 gfx_v11_0_unset_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v11_0_unset_safe_mode() argument
[all...] |
| H A D | gfx_v10_0.c | 4432 static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v10_0_read_wave_data() argument
4460 static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v10_0_read_wave_sgprs() argument
4471 static void gfx_v10_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v10_0_read_wave_vgprs() argument
4482 u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) in gfx_v10_0_select_me_pipe_q() argument
4689 int xcc_id = 0; in gfx_v10_0_sw_init() local
4896 gfx_v10_0_select_se_sh(struct amdgpu_device * adev,u32 se_num,u32 sh_num,u32 instance,int xcc_id) gfx_v10_0_select_se_sh() argument
7694 gfx_v10_0_set_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v10_0_set_safe_mode() argument
7735 gfx_v10_0_unset_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v10_0_unset_safe_mode() argument
[all...] |
| H A D | gfx_v9_0.c | 1895 gfx_v9_0_read_wave_data(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t * dst,int * no_fields) gfx_v9_0_read_wave_data() argument
1916 gfx_v9_0_read_wave_sgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t start,uint32_t size,uint32_t * dst) gfx_v9_0_read_wave_sgprs() argument
1925 gfx_v9_0_read_wave_vgprs(struct amdgpu_device * adev,uint32_t xcc_id,uint32_t simd,uint32_t wave,uint32_t thread,uint32_t start,uint32_t size,uint32_t * dst) gfx_v9_0_read_wave_vgprs() argument
1936 gfx_v9_0_select_me_pipe_q(struct amdgpu_device * adev,u32 me,u32 pipe,u32 q,u32 vm,u32 xcc_id) gfx_v9_0_select_me_pipe_q() argument
2156 int xcc_id = 0; gfx_v9_0_sw_init() local
2380 gfx_v9_0_select_se_sh(struct amdgpu_device * adev,u32 se_num,u32 sh_num,u32 instance,int xcc_id) gfx_v9_0_select_se_sh() argument
4776 gfx_v9_0_set_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v9_0_set_safe_mode() argument
4793 gfx_v9_0_unset_safe_mode(struct amdgpu_device * adev,int xcc_id) gfx_v9_0_unset_safe_mode() argument
[all...] |
| H A D | gmc_v9_0.c | 559 int ret, xcc_id = 0; in gmc_v9_0_process_interrupt() local
1860 int num_xcc, xcc_id; in gmc_v9_0_init_acpi_mem_ranges() local
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| H A D | aqua_vanjaram.c | 591 __aqua_vanjaram_get_xcp_mem_id(struct amdgpu_device * adev,int xcc_id,uint8_t * mem_id) __aqua_vanjaram_get_xcp_mem_id() argument
606 int r, i, xcc_id; aqua_vanjaram_get_xcp_mem_id() local
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| H A D | gfxhub_v1_2.c | 626 gfxhub_v1_2_query_utcl2_poison_status(struct amdgpu_device * adev,int xcc_id) gfxhub_v1_2_query_utcl2_poison_status() argument
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| H A D | amdgpu_device.c | 668 uint32_t xcc_id) in amdgpu_device_xcc_rreg() argument
769 uint32_t xcc_id) in amdgpu_mm_wreg_mmio_rlc() argument
799 uint32_t acc_flags, uint32_t xcc_id) in amdgpu_device_xcc_wreg() argument
[all...] |
| H A D | soc15.c | 341 u32 me, u32 pipe, u32 queue, u32 vmid, int xcc_id) in soc15_grbm_select()
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| H A D | amdgpu_gfx.h | 464 amdgpu_gfx_select_se_sh(adev,se,sh,instance,xcc_id) global() argument
465 amdgpu_gfx_select_me_pipe_q(adev,me,pipe,q,vmid,xcc_id) global() argument
[all...] |
| H A D | amdgpu_acpi.c | 1160 int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, int xcc_id, in amdgpu_acpi_get_mem_info()
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| H A D | amdgpu_ring.h | 260 u32 xcc_id; global() member
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_mqd_manager_v9.c | 569 int xcc_id, err, inst = 0; hiq_load_mqd_kiq_v9_4_3() local
593 int xcc_id, err, inst = 0; destroy_hiq_mqd_v9_4_3() local
619 int inst = 0, xcc_id; check_preemption_failed_v9_4_3() local
748 int xcc_id, err, inst = 0; destroy_mqd_v9_4_3() local
778 int xcc_id, err, inst = 0; load_mqd_v9_4_3() local
[all...] |
| H A D | kfd_device_queue_manager.c | 145 int xcc_id; in program_sh_mem_settings() local
434 int xcc_id; program_trap_handler_settings() local
707 int xcc_id; dbgdev_wave_reset_wavefronts() local
1372 int xcc_id, ret; set_pasid_vmid_mapping() local
1387 unsigned int i, xcc_id; init_interrupts() local
3179 int r = 0, xcc_id; dqm_debugfs_hqds() local
[all...] |
| H A D | kfd_debug.c | 449 int xcc_id, r = kfd_dbg_get_dev_watch_id(pdd, watch_id); in kfd_dbg_trap_set_dev_address_watch() local
|
| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_6_ppt.c | 962 int xcc_id; in smu_v13_0_6_get_smu_metrics_data() local
2302 int ret = 0, xcc_id, inst, i, j; in smu_v13_0_6_get_gpu_metrics() local
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