| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mes_v12_1.c | 156 int xcc_id, int pipe, void *pkt, in mes_v12_1_submit_pkt_and_poll_completion()
293 int xcc_id = input->xcc_id; in mes_v12_1_add_hw_queue() local
354 int xcc_id = input->xcc_id; in mes_v12_1_remove_hw_queue() local
532 int pipe, int xcc_id) in mes_v12_1_query_sched_status()
551 static void mes_v12_1_get_rrmt(uint32_t reg, uint32_t xcc_id, in mes_v12_1_get_rrmt()
663 int pipe, int xcc_id) in mes_v12_1_set_hw_resources_1()
692 int pipe, int xcc_id) in mes_v12_1_set_hw_resources()
784 int xcc_id) in mes_v12_1_init_aggregated_doorbell()
840 struct amdgpu_mes *mes, bool enable, int xcc_id) in mes_v12_1_enable_unmapped_doorbell_handling()
947 int xcc_id = input->xcc_id; in mes_v12_1_inv_tlbs_pasid() local
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| H A D | gfx_v12_1.c | 650 int xcc_id, num_xcc; in gfx_v12_1_init_rlcg_reg_access_ctrl() local
753 uint32_t xcc_id, uint32_t wave, in wave_read_ind()
763 uint32_t xcc_id, uint32_t wave, in wave_read_regs()
777 uint32_t xcc_id, in gfx_v12_1_read_wave_data()
814 uint32_t xcc_id, uint32_t simd, in gfx_v12_1_read_wave_sgprs()
826 uint32_t xcc_id, uint32_t simd, in gfx_v12_1_read_wave_vgprs()
837 u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) in gfx_v12_1_select_me_pipe_q()
903 int xcc_id, int mec, int pipe, int queue) in gfx_v12_1_compute_ring_init()
1308 uint32_t xcc_id, xcc_offset, inst_offset; in gfx_v12_1_ip_print() local
1368 uint32_t xcc_id, xcc_offset, inst_offset; in gfx_v12_1_ip_dump() local
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| H A D | gfx_v9_4_3.c | 292 uint32_t xcc_id, uint32_t vmid) in gfx_v9_4_3_kiq_reset_hw_queue()
689 u32 sh_num, u32 instance, int xcc_id) in gfx_v9_4_3_xcc_select_se_sh()
715 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t … in wave_read_ind()
725 static void wave_read_regs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in wave_read_regs()
741 uint32_t xcc_id, uint32_t simd, uint32_t wave, in gfx_v9_4_3_read_wave_data()
763 static void gfx_v9_4_3_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v9_4_3_read_wave_sgprs()
771 static void gfx_v9_4_3_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v9_4_3_read_wave_vgprs()
781 u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) in gfx_v9_4_3_select_me_pipe_q()
904 int xcc_id, int mec, int pipe, int queue) in gfx_v9_4_3_compute_ring_init()
973 int i, j, k, r, ring_id, xcc_id, num_xcc; in gfx_v9_4_3_sw_init() local
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| H A D | amdgpu_gfx.c | 75 int xcc_id, int mec, int pipe, int queue) in amdgpu_gfx_is_mec_queue_enabled()
274 struct amdgpu_ring *ring, int xcc_id) in amdgpu_gfx_kiq_acquire()
308 int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_kiq_init_ring()
349 void amdgpu_gfx_kiq_fini(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_kiq_fini()
357 unsigned int hpd_size, int xcc_id) in amdgpu_gfx_kiq_init()
408 unsigned int mqd_size, int xcc_id) in amdgpu_gfx_mqd_sw_init()
500 void amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_mqd_sw_fini()
581 int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_disable_kcq()
631 int amdgpu_gfx_disable_kgq(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_disable_kgq()
698 static int amdgpu_gfx_mes_enable_kcq(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_mes_enable_kcq()
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| H A D | amdgpu_mes.h | 73 #define MES_PIPE_INST(xcc_id, pipe_id) \ argument
254 uint32_t xcc_id; member
288 uint32_t xcc_id; member
297 uint32_t xcc_id; member
307 uint32_t xcc_id; member
318 uint32_t xcc_id; member
328 uint32_t xcc_id; member
335 uint32_t xcc_id; member
352 u32 xcc_id; member
356 uint32_t xcc_id; member
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| H A D | amdgpu_umr.h | 46 u32 xcc_id; member
50 u32 gpr_or_wave, se, sh, cu, wave, simd, xcc_id; member
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| H A D | amdgpu_virt.c | 1417 …32 amdgpu_virt_rlcg_vfi_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag, u32 xcc_id) in amdgpu_virt_rlcg_vfi_reg_rw()
1544 u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag, u32 xcc_id) in amdgpu_virt_rlcg_reg_rw()
1646 u32 acc_flags, u32 hwip, u32 xcc_id) in amdgpu_sriov_wreg()
1666 u32 offset, u32 acc_flags, u32 hwip, u32 xcc_id) in amdgpu_sriov_rreg()
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| H A D | gfx_v10_0.c | 3823 uint32_t xcc_id, uint32_t vmid) in gfx_v10_0_kiq_reset_hw_queue()
4498 static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, ui… in gfx_v10_0_read_wave_data()
4526 static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v10_0_read_wave_sgprs()
4537 static void gfx_v10_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v10_0_read_wave_vgprs()
4548 u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) in gfx_v10_0_select_me_pipe_q()
4757 int xcc_id = 0; in gfx_v10_0_sw_init() local
5059 u32 sh_num, u32 instance, int xcc_id) in gfx_v10_0_select_se_sh()
7879 static void gfx_v10_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v10_0_set_safe_mode()
7920 static void gfx_v10_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v10_0_unset_safe_mode()
8337 static void gfx_v10_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id, in gfx_v10_0_update_spm_vmid()
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| H A D | sdma_v7_1.c | 121 int xcc_id = adev->sdma.instance[instance].xcc_id; in sdma_v7_1_get_reg_offset() local
1287 u32 xcc_id; in sdma_v7_1_sw_init() local
1512 int inst, instances, queue, xcc_id = 0; in sdma_v7_1_process_trap_irq() local
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| H A D | gfx_v9_0.c | 1046 uint32_t xcc_id, uint32_t vmid) in gfx_v9_0_kiq_reset_hw_queue()
1955 static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uin… in gfx_v9_0_read_wave_data()
1976 static void gfx_v9_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v9_0_read_wave_sgprs()
1985 static void gfx_v9_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v9_0_read_wave_vgprs()
1996 u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) in gfx_v9_0_select_me_pipe_q()
2218 int xcc_id = 0; in gfx_v9_0_sw_init() local
2504 u32 instance, int xcc_id) in gfx_v9_0_select_se_sh()
4949 static void gfx_v9_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v9_0_set_safe_mode()
4966 static void gfx_v9_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v9_0_unset_safe_mode()
5228 static void gfx_v9_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id, in gfx_v9_0_update_spm_vmid()
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| H A D | mes_v11_0.c | 1877 static int mes_v11_0_kiq_hw_init(struct amdgpu_device *adev, uint32_t xcc_id) in mes_v11_0_kiq_hw_init()
1932 static int mes_v11_0_kiq_hw_fini(struct amdgpu_device *adev, uint32_t xcc_id) in mes_v11_0_kiq_hw_fini()
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| H A D | mes_v12_0.c | 1956 static int mes_v12_0_kiq_hw_init(struct amdgpu_device *adev, uint32_t xcc_id) in mes_v12_0_kiq_hw_init()
2018 static int mes_v12_0_kiq_hw_fini(struct amdgpu_device *adev, uint32_t xcc_id) in mes_v12_0_kiq_hw_fini()
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| H A D | gmc_v12_1.c | 113 int ret, xcc_id = 0; in gmc_v12_1_process_interrupt() local
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| H A D | amdgpu_gmc.c | 1635 int num_xcc, xcc_id; in amdgpu_gmc_init_acpi_mem_ranges() local
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_mqd_manager_v9.c | 651 int xcc_id, err = 0, inst = 0; in hiq_load_mqd_kiq_v9_4_3() local
675 int xcc_id, err = 0, inst = 0; in destroy_hiq_mqd_v9_4_3() local
701 int inst = 0, xcc_id; in check_preemption_failed_v9_4_3() local
906 int xcc_id, err = 0, inst = 0; in destroy_mqd_v9_4_3() local
936 int xcc_id, err = 0, inst = 0; in load_mqd_v9_4_3() local
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| H A D | kfd_mqd_manager_v12_1.c | 536 int xcc_id, err, inst = 0; in destroy_mqd_v12_1() local
566 int xcc_id, err, inst = 0; in load_mqd_v12_1() local
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu15/ |
| H A D | smu_v15_0_8_ppt.c | 387 int ret, xcc_id; in smu_v15_0_8_get_smu_metrics_data() local
1690 int ret = 0, xcc_id, inst, i, j, idx; in smu_v15_0_8_get_gpu_metrics() local
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/tests/ |
| H A D | amdgpu_dm_plane_test.c | 44 u32 xcc_id) in dm_test_gfx11_rreg32()
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