1 /*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: IB Verbs interpreter (header)
37 */
38
39 #ifndef __BNXT_RE_IB_VERBS_H__
40 #define __BNXT_RE_IB_VERBS_H__
41
42 struct bnxt_re_gid_ctx {
43 u32 idx;
44 u32 refcnt;
45 };
46
47 #define BNXT_RE_FENCE_BYTES 64
48 struct bnxt_re_fence_data {
49 u32 size;
50 u8 va[BNXT_RE_FENCE_BYTES];
51 dma_addr_t dma_addr;
52 struct bnxt_re_mr *mr;
53 struct ib_mw *mw;
54 struct bnxt_qplib_swqe bind_wqe;
55 u32 bind_rkey;
56 };
57
58 struct bnxt_re_pd {
59 struct ib_pd ib_pd;
60 struct bnxt_re_dev *rdev;
61 struct bnxt_qplib_pd qplib_pd;
62 struct bnxt_re_fence_data fence;
63 struct rdma_user_mmap_entry *pd_db_mmap;
64 struct rdma_user_mmap_entry *pd_wcdb_mmap;
65 };
66
67 struct bnxt_re_ah {
68 struct ib_ah ib_ah;
69 struct bnxt_re_dev *rdev;
70 struct bnxt_qplib_ah qplib_ah;
71 };
72
73 struct bnxt_re_srq {
74 struct ib_srq ib_srq;
75 struct bnxt_re_dev *rdev;
76 u32 srq_limit;
77 struct bnxt_qplib_srq qplib_srq;
78 struct ib_umem *umem;
79 spinlock_t lock; /* protect srq */
80 void *uctx_srq_page;
81 struct hlist_node hash_entry;
82 };
83
84 struct bnxt_re_qp {
85 struct ib_qp ib_qp;
86 struct list_head list;
87 struct bnxt_re_dev *rdev;
88 spinlock_t sq_lock; /* protect sq */
89 spinlock_t rq_lock; /* protect rq */
90 struct bnxt_qplib_qp qplib_qp;
91 struct ib_umem *sumem;
92 struct ib_umem *rumem;
93 /* QP1 */
94 u32 send_psn;
95 struct ib_ud_header qp1_hdr;
96 struct bnxt_re_cq *scq;
97 struct bnxt_re_cq *rcq;
98 };
99
100 struct bnxt_re_cq {
101 struct ib_cq ib_cq;
102 struct bnxt_re_dev *rdev;
103 spinlock_t cq_lock; /* protect cq */
104 u16 cq_count;
105 u16 cq_period;
106 struct bnxt_qplib_cq qplib_cq;
107 struct bnxt_qplib_cqe *cql;
108 #define MAX_CQL_PER_POLL 1024
109 u32 max_cql;
110 struct ib_umem *umem;
111 struct ib_umem *resize_umem;
112 int resize_cqe;
113 void *uctx_cq_page;
114 struct hlist_node hash_entry;
115 };
116
117 struct bnxt_re_mr {
118 struct bnxt_re_dev *rdev;
119 struct ib_mr ib_mr;
120 struct ib_umem *ib_umem;
121 struct bnxt_qplib_mrw qplib_mr;
122 u32 npages;
123 u64 *pages;
124 struct bnxt_qplib_frpl qplib_frpl;
125 };
126
127 struct bnxt_re_frpl {
128 struct bnxt_re_dev *rdev;
129 struct bnxt_qplib_frpl qplib_frpl;
130 u64 *page_list;
131 };
132
133 struct bnxt_re_mw {
134 struct bnxt_re_dev *rdev;
135 struct ib_mw ib_mw;
136 struct bnxt_qplib_mrw qplib_mw;
137 };
138
139 struct bnxt_re_ucontext {
140 struct ib_ucontext ib_uctx;
141 struct bnxt_re_dev *rdev;
142 struct bnxt_qplib_dpi dpi;
143 struct bnxt_qplib_dpi wcdpi;
144 void *shpg;
145 spinlock_t sh_lock; /* protect shpg */
146 struct rdma_user_mmap_entry *shpage_mmap;
147 u64 cmask;
148 };
149
150 enum bnxt_re_mmap_flag {
151 BNXT_RE_MMAP_SH_PAGE,
152 BNXT_RE_MMAP_UC_DB,
153 BNXT_RE_MMAP_WC_DB,
154 BNXT_RE_MMAP_DBR_PAGE,
155 BNXT_RE_MMAP_DBR_BAR,
156 BNXT_RE_MMAP_TOGGLE_PAGE,
157 };
158
159 struct bnxt_re_user_mmap_entry {
160 struct rdma_user_mmap_entry rdma_entry;
161 struct bnxt_re_ucontext *uctx;
162 u64 mem_offset;
163 u8 mmap_flag;
164 };
165
bnxt_re_get_swqe_size(int nsge)166 static inline u16 bnxt_re_get_swqe_size(int nsge)
167 {
168 return sizeof(struct sq_send_hdr) + nsge * sizeof(struct sq_sge);
169 }
170
bnxt_re_get_rwqe_size(int nsge)171 static inline u16 bnxt_re_get_rwqe_size(int nsge)
172 {
173 return sizeof(struct rq_wqe_hdr) + (nsge * sizeof(struct sq_sge));
174 }
175
176 enum {
177 BNXT_RE_UCNTX_CAP_POW2_DISABLED = 0x1ULL,
178 BNXT_RE_UCNTX_CAP_VAR_WQE_ENABLED = 0x2ULL,
179 };
180
bnxt_re_init_depth(u32 ent,struct bnxt_re_ucontext * uctx)181 static inline u32 bnxt_re_init_depth(u32 ent, struct bnxt_re_ucontext *uctx)
182 {
183 return uctx ? (uctx->cmask & BNXT_RE_UCNTX_CAP_POW2_DISABLED) ?
184 ent : roundup_pow_of_two(ent) : ent;
185 }
186
bnxt_re_is_var_size_supported(struct bnxt_re_dev * rdev,struct bnxt_re_ucontext * uctx)187 static inline bool bnxt_re_is_var_size_supported(struct bnxt_re_dev *rdev,
188 struct bnxt_re_ucontext *uctx)
189 {
190 if (uctx)
191 return uctx->cmask & BNXT_RE_UCNTX_CAP_VAR_WQE_ENABLED;
192 else
193 return rdev->chip_ctx->modes.wqe_mode;
194 }
195
196 int bnxt_re_query_device(struct ib_device *ibdev,
197 struct ib_device_attr *ib_attr,
198 struct ib_udata *udata);
199 int bnxt_re_query_port(struct ib_device *ibdev, u32 port_num,
200 struct ib_port_attr *port_attr);
201 int bnxt_re_get_port_immutable(struct ib_device *ibdev, u32 port_num,
202 struct ib_port_immutable *immutable);
203 void bnxt_re_query_fw_str(struct ib_device *ibdev, char *str);
204 int bnxt_re_query_pkey(struct ib_device *ibdev, u32 port_num,
205 u16 index, u16 *pkey);
206 int bnxt_re_del_gid(const struct ib_gid_attr *attr, void **context);
207 int bnxt_re_add_gid(const struct ib_gid_attr *attr, void **context);
208 int bnxt_re_query_gid(struct ib_device *ibdev, u32 port_num,
209 int index, union ib_gid *gid);
210 enum rdma_link_layer bnxt_re_get_link_layer(struct ib_device *ibdev,
211 u32 port_num);
212 int bnxt_re_alloc_pd(struct ib_pd *pd, struct ib_udata *udata);
213 int bnxt_re_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata);
214 int bnxt_re_create_ah(struct ib_ah *ah, struct rdma_ah_init_attr *init_attr,
215 struct ib_udata *udata);
216 int bnxt_re_query_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr);
217 int bnxt_re_destroy_ah(struct ib_ah *ah, u32 flags);
218 int bnxt_re_create_srq(struct ib_srq *srq,
219 struct ib_srq_init_attr *srq_init_attr,
220 struct ib_udata *udata);
221 int bnxt_re_modify_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr,
222 enum ib_srq_attr_mask srq_attr_mask,
223 struct ib_udata *udata);
224 int bnxt_re_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
225 int bnxt_re_destroy_srq(struct ib_srq *srq, struct ib_udata *udata);
226 int bnxt_re_post_srq_recv(struct ib_srq *srq, const struct ib_recv_wr *recv_wr,
227 const struct ib_recv_wr **bad_recv_wr);
228 int bnxt_re_create_qp(struct ib_qp *qp, struct ib_qp_init_attr *qp_init_attr,
229 struct ib_udata *udata);
230 int bnxt_re_modify_qp(struct ib_qp *qp, struct ib_qp_attr *qp_attr,
231 int qp_attr_mask, struct ib_udata *udata);
232 int bnxt_re_query_qp(struct ib_qp *qp, struct ib_qp_attr *qp_attr,
233 int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr);
234 int bnxt_re_destroy_qp(struct ib_qp *qp, struct ib_udata *udata);
235 int bnxt_re_post_send(struct ib_qp *qp, const struct ib_send_wr *send_wr,
236 const struct ib_send_wr **bad_send_wr);
237 int bnxt_re_post_recv(struct ib_qp *qp, const struct ib_recv_wr *recv_wr,
238 const struct ib_recv_wr **bad_recv_wr);
239 int bnxt_re_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
240 struct uverbs_attr_bundle *attrs);
241 int bnxt_re_resize_cq(struct ib_cq *ibcq, int cqe, struct ib_udata *udata);
242 int bnxt_re_destroy_cq(struct ib_cq *cq, struct ib_udata *udata);
243 int bnxt_re_poll_cq(struct ib_cq *cq, int num_entries, struct ib_wc *wc);
244 int bnxt_re_req_notify_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
245 struct ib_mr *bnxt_re_get_dma_mr(struct ib_pd *pd, int mr_access_flags);
246
247 int bnxt_re_map_mr_sg(struct ib_mr *ib_mr, struct scatterlist *sg, int sg_nents,
248 unsigned int *sg_offset);
249 struct ib_mr *bnxt_re_alloc_mr(struct ib_pd *ib_pd, enum ib_mr_type mr_type,
250 u32 max_num_sg);
251 int bnxt_re_dereg_mr(struct ib_mr *mr, struct ib_udata *udata);
252 struct ib_mw *bnxt_re_alloc_mw(struct ib_pd *ib_pd, enum ib_mw_type type,
253 struct ib_udata *udata);
254 int bnxt_re_dealloc_mw(struct ib_mw *mw);
255 struct ib_mr *bnxt_re_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
256 u64 virt_addr, int mr_access_flags,
257 struct ib_udata *udata);
258 struct ib_mr *bnxt_re_reg_user_mr_dmabuf(struct ib_pd *ib_pd, u64 start,
259 u64 length, u64 virt_addr,
260 int fd, int mr_access_flags,
261 struct uverbs_attr_bundle *attrs);
262 int bnxt_re_alloc_ucontext(struct ib_ucontext *ctx, struct ib_udata *udata);
263 void bnxt_re_dealloc_ucontext(struct ib_ucontext *context);
264 int bnxt_re_mmap(struct ib_ucontext *context, struct vm_area_struct *vma);
265 void bnxt_re_mmap_free(struct rdma_user_mmap_entry *rdma_entry);
266
267
268 unsigned long bnxt_re_lock_cqs(struct bnxt_re_qp *qp);
269 void bnxt_re_unlock_cqs(struct bnxt_re_qp *qp, unsigned long flags);
270 #endif /* __BNXT_RE_IB_VERBS_H__ */
271