xref: /linux/drivers/net/ethernet/wiznet/w5300.c (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Ethernet driver for the WIZnet W5300 chip.
4  *
5  * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
6  * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
7  * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/netdevice.h>
13 #include <linux/etherdevice.h>
14 #include <linux/platform_device.h>
15 #include <linux/platform_data/wiznet.h>
16 #include <linux/ethtool.h>
17 #include <linux/skbuff.h>
18 #include <linux/types.h>
19 #include <linux/errno.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
23 #include <linux/io.h>
24 #include <linux/ioport.h>
25 #include <linux/interrupt.h>
26 #include <linux/irq.h>
27 #include <linux/gpio.h>
28 
29 #define DRV_NAME	"w5300"
30 #define DRV_VERSION	"2012-04-04"
31 
32 MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);
33 MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
34 MODULE_ALIAS("platform:"DRV_NAME);
35 MODULE_LICENSE("GPL");
36 
37 /*
38  * Registers
39  */
40 #define W5300_MR		0x0000	/* Mode Register */
41 #define   MR_DBW		  (1 << 15) /* Data bus width */
42 #define   MR_MPF		  (1 << 14) /* Mac layer pause frame */
43 #define   MR_WDF(n)		  (((n)&7)<<11) /* Write data fetch time */
44 #define   MR_RDH		  (1 << 10) /* Read data hold time */
45 #define   MR_FS			  (1 << 8)  /* FIFO swap */
46 #define   MR_RST		  (1 << 7)  /* S/W reset */
47 #define   MR_PB			  (1 << 4)  /* Ping block */
48 #define   MR_DBS		  (1 << 2)  /* Data bus swap */
49 #define   MR_IND		  (1 << 0)  /* Indirect mode */
50 #define W5300_IR		0x0002	/* Interrupt Register */
51 #define W5300_IMR		0x0004	/* Interrupt Mask Register */
52 #define   IR_S0			  0x0001  /* S0 interrupt */
53 #define W5300_SHARL		0x0008	/* Source MAC address (0123) */
54 #define W5300_SHARH		0x000c	/* Source MAC address (45) */
55 #define W5300_TMSRL		0x0020	/* Transmit Memory Size (0123) */
56 #define W5300_TMSRH		0x0024	/* Transmit Memory Size (4567) */
57 #define W5300_RMSRL		0x0028	/* Receive Memory Size (0123) */
58 #define W5300_RMSRH		0x002c	/* Receive Memory Size (4567) */
59 #define W5300_MTYPE		0x0030	/* Memory Type */
60 #define W5300_IDR		0x00fe	/* Chip ID register */
61 #define   IDR_W5300		  0x5300  /* =0x5300 for WIZnet W5300 */
62 #define W5300_S0_MR		0x0200	/* S0 Mode Register */
63 #define   S0_MR_CLOSED		  0x0000  /* Close mode */
64 #define   S0_MR_MACRAW		  0x0004  /* MAC RAW mode (promiscuous) */
65 #define   S0_MR_MACRAW_MF	  0x0044  /* MAC RAW mode (filtered) */
66 #define W5300_S0_CR		0x0202	/* S0 Command Register */
67 #define   S0_CR_OPEN		  0x0001  /* OPEN command */
68 #define   S0_CR_CLOSE		  0x0010  /* CLOSE command */
69 #define   S0_CR_SEND		  0x0020  /* SEND command */
70 #define   S0_CR_RECV		  0x0040  /* RECV command */
71 #define W5300_S0_IMR		0x0204	/* S0 Interrupt Mask Register */
72 #define W5300_S0_IR		0x0206	/* S0 Interrupt Register */
73 #define   S0_IR_RECV		  0x0004  /* Receive interrupt */
74 #define   S0_IR_SENDOK		  0x0010  /* Send OK interrupt */
75 #define W5300_S0_SSR		0x0208	/* S0 Socket Status Register */
76 #define W5300_S0_TX_WRSR	0x0220	/* S0 TX Write Size Register */
77 #define W5300_S0_TX_FSR		0x0224	/* S0 TX Free Size Register */
78 #define W5300_S0_RX_RSR		0x0228	/* S0 Received data Size */
79 #define W5300_S0_TX_FIFO	0x022e	/* S0 Transmit FIFO */
80 #define W5300_S0_RX_FIFO	0x0230	/* S0 Receive FIFO */
81 #define W5300_REGS_LEN		0x0400
82 
83 /*
84  * Device driver private data structure
85  */
86 struct w5300_priv {
87 	void __iomem *base;
88 	spinlock_t reg_lock;
89 	bool indirect;
90 	u16  (*read) (struct w5300_priv *priv, u16 addr);
91 	void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
92 	int irq;
93 	int link_irq;
94 	int link_gpio;
95 
96 	struct napi_struct napi;
97 	struct net_device *ndev;
98 	bool promisc;
99 	u32 msg_enable;
100 };
101 
102 /************************************************************************
103  *
104  *  Lowlevel I/O functions
105  *
106  ***********************************************************************/
107 
108 /*
109  * In direct address mode host system can directly access W5300 registers
110  * after mapping to Memory-Mapped I/O space.
111  *
112  * 0x400 bytes are required for memory space.
113  */
w5300_read_direct(struct w5300_priv * priv,u16 addr)114 static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
115 {
116 	return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
117 }
118 
w5300_write_direct(struct w5300_priv * priv,u16 addr,u16 data)119 static inline void w5300_write_direct(struct w5300_priv *priv,
120 				      u16 addr, u16 data)
121 {
122 	iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
123 }
124 
125 /*
126  * In indirect address mode host system indirectly accesses registers by
127  * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
128  * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
129  * Mode Register (MR) is directly accessible.
130  *
131  * Only 0x06 bytes are required for memory space.
132  */
133 #define W5300_IDM_AR		0x0002	 /* Indirect Mode Address */
134 #define W5300_IDM_DR		0x0004	 /* Indirect Mode Data */
135 
w5300_read_indirect(struct w5300_priv * priv,u16 addr)136 static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
137 {
138 	unsigned long flags;
139 	u16 data;
140 
141 	spin_lock_irqsave(&priv->reg_lock, flags);
142 	w5300_write_direct(priv, W5300_IDM_AR, addr);
143 	data = w5300_read_direct(priv, W5300_IDM_DR);
144 	spin_unlock_irqrestore(&priv->reg_lock, flags);
145 
146 	return data;
147 }
148 
w5300_write_indirect(struct w5300_priv * priv,u16 addr,u16 data)149 static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
150 {
151 	unsigned long flags;
152 
153 	spin_lock_irqsave(&priv->reg_lock, flags);
154 	w5300_write_direct(priv, W5300_IDM_AR, addr);
155 	w5300_write_direct(priv, W5300_IDM_DR, data);
156 	spin_unlock_irqrestore(&priv->reg_lock, flags);
157 }
158 
159 #if defined(CONFIG_WIZNET_BUS_DIRECT)
160 #define w5300_read	w5300_read_direct
161 #define w5300_write	w5300_write_direct
162 
163 #elif defined(CONFIG_WIZNET_BUS_INDIRECT)
164 #define w5300_read	w5300_read_indirect
165 #define w5300_write	w5300_write_indirect
166 
167 #else /* CONFIG_WIZNET_BUS_ANY */
168 #define w5300_read	priv->read
169 #define w5300_write	priv->write
170 #endif
171 
w5300_read32(struct w5300_priv * priv,u16 addr)172 static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
173 {
174 	u32 data;
175 	data  = w5300_read(priv, addr) << 16;
176 	data |= w5300_read(priv, addr + 2);
177 	return data;
178 }
179 
w5300_write32(struct w5300_priv * priv,u16 addr,u32 data)180 static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
181 {
182 	w5300_write(priv, addr, data >> 16);
183 	w5300_write(priv, addr + 2, data);
184 }
185 
w5300_command(struct w5300_priv * priv,u16 cmd)186 static int w5300_command(struct w5300_priv *priv, u16 cmd)
187 {
188 	unsigned long timeout = jiffies + msecs_to_jiffies(100);
189 
190 	w5300_write(priv, W5300_S0_CR, cmd);
191 
192 	while (w5300_read(priv, W5300_S0_CR) != 0) {
193 		if (time_after(jiffies, timeout))
194 			return -EIO;
195 		cpu_relax();
196 	}
197 
198 	return 0;
199 }
200 
w5300_read_frame(struct w5300_priv * priv,u8 * buf,int len)201 static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
202 {
203 	u16 fifo;
204 	int i;
205 
206 	for (i = 0; i < len; i += 2) {
207 		fifo = w5300_read(priv, W5300_S0_RX_FIFO);
208 		*buf++ = fifo >> 8;
209 		*buf++ = fifo;
210 	}
211 	fifo = w5300_read(priv, W5300_S0_RX_FIFO);
212 	fifo = w5300_read(priv, W5300_S0_RX_FIFO);
213 }
214 
w5300_write_frame(struct w5300_priv * priv,u8 * buf,int len)215 static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
216 {
217 	u16 fifo;
218 	int i;
219 
220 	for (i = 0; i < len; i += 2) {
221 		fifo  = *buf++ << 8;
222 		fifo |= *buf++;
223 		w5300_write(priv, W5300_S0_TX_FIFO, fifo);
224 	}
225 	w5300_write32(priv, W5300_S0_TX_WRSR, len);
226 }
227 
w5300_write_macaddr(struct w5300_priv * priv)228 static void w5300_write_macaddr(struct w5300_priv *priv)
229 {
230 	struct net_device *ndev = priv->ndev;
231 	w5300_write32(priv, W5300_SHARL,
232 		      ndev->dev_addr[0] << 24 |
233 		      ndev->dev_addr[1] << 16 |
234 		      ndev->dev_addr[2] << 8 |
235 		      ndev->dev_addr[3]);
236 	w5300_write(priv, W5300_SHARH,
237 		      ndev->dev_addr[4] << 8 |
238 		      ndev->dev_addr[5]);
239 }
240 
w5300_hw_reset(struct w5300_priv * priv)241 static void w5300_hw_reset(struct w5300_priv *priv)
242 {
243 	w5300_write_direct(priv, W5300_MR, MR_RST);
244 	mdelay(5);
245 	w5300_write_direct(priv, W5300_MR, priv->indirect ?
246 				 MR_WDF(7) | MR_PB | MR_IND :
247 				 MR_WDF(7) | MR_PB);
248 	w5300_write(priv, W5300_IMR, 0);
249 	w5300_write_macaddr(priv);
250 
251 	/* Configure 128K of internal memory
252 	 * as 64K RX fifo and 64K TX fifo
253 	 */
254 	w5300_write32(priv, W5300_RMSRL, 64 << 24);
255 	w5300_write32(priv, W5300_RMSRH, 0);
256 	w5300_write32(priv, W5300_TMSRL, 64 << 24);
257 	w5300_write32(priv, W5300_TMSRH, 0);
258 	w5300_write(priv, W5300_MTYPE, 0x00ff);
259 }
260 
w5300_hw_start(struct w5300_priv * priv)261 static void w5300_hw_start(struct w5300_priv *priv)
262 {
263 	w5300_write(priv, W5300_S0_MR, priv->promisc ?
264 			  S0_MR_MACRAW : S0_MR_MACRAW_MF);
265 	w5300_command(priv, S0_CR_OPEN);
266 	w5300_write(priv, W5300_S0_IMR, S0_IR_RECV | S0_IR_SENDOK);
267 	w5300_write(priv, W5300_IMR, IR_S0);
268 }
269 
w5300_hw_close(struct w5300_priv * priv)270 static void w5300_hw_close(struct w5300_priv *priv)
271 {
272 	w5300_write(priv, W5300_IMR, 0);
273 	w5300_command(priv, S0_CR_CLOSE);
274 }
275 
276 /***********************************************************************
277  *
278  *   Device driver functions / callbacks
279  *
280  ***********************************************************************/
281 
w5300_get_drvinfo(struct net_device * ndev,struct ethtool_drvinfo * info)282 static void w5300_get_drvinfo(struct net_device *ndev,
283 			      struct ethtool_drvinfo *info)
284 {
285 	strscpy(info->driver, DRV_NAME, sizeof(info->driver));
286 	strscpy(info->version, DRV_VERSION, sizeof(info->version));
287 	strscpy(info->bus_info, dev_name(ndev->dev.parent),
288 		sizeof(info->bus_info));
289 }
290 
w5300_get_link(struct net_device * ndev)291 static u32 w5300_get_link(struct net_device *ndev)
292 {
293 	struct w5300_priv *priv = netdev_priv(ndev);
294 
295 	if (gpio_is_valid(priv->link_gpio))
296 		return !!gpio_get_value(priv->link_gpio);
297 
298 	return 1;
299 }
300 
w5300_get_msglevel(struct net_device * ndev)301 static u32 w5300_get_msglevel(struct net_device *ndev)
302 {
303 	struct w5300_priv *priv = netdev_priv(ndev);
304 
305 	return priv->msg_enable;
306 }
307 
w5300_set_msglevel(struct net_device * ndev,u32 value)308 static void w5300_set_msglevel(struct net_device *ndev, u32 value)
309 {
310 	struct w5300_priv *priv = netdev_priv(ndev);
311 
312 	priv->msg_enable = value;
313 }
314 
w5300_get_regs_len(struct net_device * ndev)315 static int w5300_get_regs_len(struct net_device *ndev)
316 {
317 	return W5300_REGS_LEN;
318 }
319 
w5300_get_regs(struct net_device * ndev,struct ethtool_regs * regs,void * _buf)320 static void w5300_get_regs(struct net_device *ndev,
321 			   struct ethtool_regs *regs, void *_buf)
322 {
323 	struct w5300_priv *priv = netdev_priv(ndev);
324 	u8 *buf = _buf;
325 	u16 addr;
326 	u16 data;
327 
328 	regs->version = 1;
329 	for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
330 		switch (addr & 0x23f) {
331 		case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
332 		case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
333 			data = 0xffff;
334 			break;
335 		default:
336 			data = w5300_read(priv, addr);
337 			break;
338 		}
339 		*buf++ = data >> 8;
340 		*buf++ = data;
341 	}
342 }
343 
w5300_tx_timeout(struct net_device * ndev,unsigned int txqueue)344 static void w5300_tx_timeout(struct net_device *ndev, unsigned int txqueue)
345 {
346 	struct w5300_priv *priv = netdev_priv(ndev);
347 
348 	netif_stop_queue(ndev);
349 	w5300_hw_reset(priv);
350 	w5300_hw_start(priv);
351 	ndev->stats.tx_errors++;
352 	netif_trans_update(ndev);
353 	netif_wake_queue(ndev);
354 }
355 
w5300_start_tx(struct sk_buff * skb,struct net_device * ndev)356 static netdev_tx_t w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
357 {
358 	struct w5300_priv *priv = netdev_priv(ndev);
359 
360 	netif_stop_queue(ndev);
361 
362 	w5300_write_frame(priv, skb->data, skb->len);
363 	ndev->stats.tx_packets++;
364 	ndev->stats.tx_bytes += skb->len;
365 	dev_kfree_skb(skb);
366 	netif_dbg(priv, tx_queued, ndev, "tx queued\n");
367 
368 	w5300_command(priv, S0_CR_SEND);
369 
370 	return NETDEV_TX_OK;
371 }
372 
w5300_napi_poll(struct napi_struct * napi,int budget)373 static int w5300_napi_poll(struct napi_struct *napi, int budget)
374 {
375 	struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
376 	struct net_device *ndev = priv->ndev;
377 	struct sk_buff *skb;
378 	int rx_count;
379 	u16 rx_len;
380 
381 	for (rx_count = 0; rx_count < budget; rx_count++) {
382 		u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
383 		if (rx_fifo_len == 0)
384 			break;
385 
386 		rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
387 
388 		skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
389 		if (unlikely(!skb)) {
390 			u32 i;
391 			for (i = 0; i < rx_fifo_len; i += 2)
392 				w5300_read(priv, W5300_S0_RX_FIFO);
393 			ndev->stats.rx_dropped++;
394 			return -ENOMEM;
395 		}
396 
397 		skb_put(skb, rx_len);
398 		w5300_read_frame(priv, skb->data, rx_len);
399 		skb->protocol = eth_type_trans(skb, ndev);
400 
401 		netif_receive_skb(skb);
402 		ndev->stats.rx_packets++;
403 		ndev->stats.rx_bytes += rx_len;
404 	}
405 
406 	if (rx_count < budget) {
407 		napi_complete_done(napi, rx_count);
408 		w5300_write(priv, W5300_IMR, IR_S0);
409 	}
410 
411 	return rx_count;
412 }
413 
w5300_interrupt(int irq,void * ndev_instance)414 static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
415 {
416 	struct net_device *ndev = ndev_instance;
417 	struct w5300_priv *priv = netdev_priv(ndev);
418 
419 	int ir = w5300_read(priv, W5300_S0_IR);
420 	if (!ir)
421 		return IRQ_NONE;
422 	w5300_write(priv, W5300_S0_IR, ir);
423 
424 	if (ir & S0_IR_SENDOK) {
425 		netif_dbg(priv, tx_done, ndev, "tx done\n");
426 		netif_wake_queue(ndev);
427 	}
428 
429 	if (ir & S0_IR_RECV) {
430 		if (napi_schedule_prep(&priv->napi)) {
431 			w5300_write(priv, W5300_IMR, 0);
432 			__napi_schedule(&priv->napi);
433 		}
434 	}
435 
436 	return IRQ_HANDLED;
437 }
438 
w5300_detect_link(int irq,void * ndev_instance)439 static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
440 {
441 	struct net_device *ndev = ndev_instance;
442 	struct w5300_priv *priv = netdev_priv(ndev);
443 
444 	if (netif_running(ndev)) {
445 		if (gpio_get_value(priv->link_gpio) != 0) {
446 			netif_info(priv, link, ndev, "link is up\n");
447 			netif_carrier_on(ndev);
448 		} else {
449 			netif_info(priv, link, ndev, "link is down\n");
450 			netif_carrier_off(ndev);
451 		}
452 	}
453 
454 	return IRQ_HANDLED;
455 }
456 
w5300_set_rx_mode(struct net_device * ndev)457 static void w5300_set_rx_mode(struct net_device *ndev)
458 {
459 	struct w5300_priv *priv = netdev_priv(ndev);
460 	bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
461 
462 	if (priv->promisc != set_promisc) {
463 		priv->promisc = set_promisc;
464 		w5300_hw_start(priv);
465 	}
466 }
467 
w5300_set_macaddr(struct net_device * ndev,void * addr)468 static int w5300_set_macaddr(struct net_device *ndev, void *addr)
469 {
470 	struct w5300_priv *priv = netdev_priv(ndev);
471 	struct sockaddr *sock_addr = addr;
472 
473 	if (!is_valid_ether_addr(sock_addr->sa_data))
474 		return -EADDRNOTAVAIL;
475 	eth_hw_addr_set(ndev, sock_addr->sa_data);
476 	w5300_write_macaddr(priv);
477 	return 0;
478 }
479 
w5300_open(struct net_device * ndev)480 static int w5300_open(struct net_device *ndev)
481 {
482 	struct w5300_priv *priv = netdev_priv(ndev);
483 
484 	netif_info(priv, ifup, ndev, "enabling\n");
485 	w5300_hw_start(priv);
486 	napi_enable(&priv->napi);
487 	netif_start_queue(ndev);
488 	if (!gpio_is_valid(priv->link_gpio) ||
489 	    gpio_get_value(priv->link_gpio) != 0)
490 		netif_carrier_on(ndev);
491 	return 0;
492 }
493 
w5300_stop(struct net_device * ndev)494 static int w5300_stop(struct net_device *ndev)
495 {
496 	struct w5300_priv *priv = netdev_priv(ndev);
497 
498 	netif_info(priv, ifdown, ndev, "shutting down\n");
499 	w5300_hw_close(priv);
500 	netif_carrier_off(ndev);
501 	netif_stop_queue(ndev);
502 	napi_disable(&priv->napi);
503 	return 0;
504 }
505 
506 static const struct ethtool_ops w5300_ethtool_ops = {
507 	.get_drvinfo		= w5300_get_drvinfo,
508 	.get_msglevel		= w5300_get_msglevel,
509 	.set_msglevel		= w5300_set_msglevel,
510 	.get_link		= w5300_get_link,
511 	.get_regs_len		= w5300_get_regs_len,
512 	.get_regs		= w5300_get_regs,
513 };
514 
515 static const struct net_device_ops w5300_netdev_ops = {
516 	.ndo_open		= w5300_open,
517 	.ndo_stop		= w5300_stop,
518 	.ndo_start_xmit		= w5300_start_tx,
519 	.ndo_tx_timeout		= w5300_tx_timeout,
520 	.ndo_set_rx_mode	= w5300_set_rx_mode,
521 	.ndo_set_mac_address	= w5300_set_macaddr,
522 	.ndo_validate_addr	= eth_validate_addr,
523 };
524 
w5300_hw_probe(struct platform_device * pdev)525 static int w5300_hw_probe(struct platform_device *pdev)
526 {
527 	struct wiznet_platform_data *data = dev_get_platdata(&pdev->dev);
528 	struct net_device *ndev = platform_get_drvdata(pdev);
529 	struct w5300_priv *priv = netdev_priv(ndev);
530 	const char *name = netdev_name(ndev);
531 	struct resource *mem;
532 	int mem_size;
533 	int irq;
534 	int ret;
535 
536 	if (data && is_valid_ether_addr(data->mac_addr)) {
537 		eth_hw_addr_set(ndev, data->mac_addr);
538 	} else {
539 		eth_hw_addr_random(ndev);
540 	}
541 
542 	priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);
543 	if (IS_ERR(priv->base))
544 		return PTR_ERR(priv->base);
545 
546 	mem_size = resource_size(mem);
547 
548 	spin_lock_init(&priv->reg_lock);
549 	priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
550 	if (priv->indirect) {
551 		priv->read  = w5300_read_indirect;
552 		priv->write = w5300_write_indirect;
553 	} else {
554 		priv->read  = w5300_read_direct;
555 		priv->write = w5300_write_direct;
556 	}
557 
558 	w5300_hw_reset(priv);
559 	if (w5300_read(priv, W5300_IDR) != IDR_W5300)
560 		return -ENODEV;
561 
562 	irq = platform_get_irq(pdev, 0);
563 	if (irq < 0)
564 		return irq;
565 	ret = request_irq(irq, w5300_interrupt,
566 			  IRQ_TYPE_LEVEL_LOW, name, ndev);
567 	if (ret < 0)
568 		return ret;
569 	priv->irq = irq;
570 
571 	priv->link_gpio = data ? data->link_gpio : -EINVAL;
572 	if (gpio_is_valid(priv->link_gpio)) {
573 		char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
574 		if (!link_name)
575 			return -ENOMEM;
576 		snprintf(link_name, 16, "%s-link", name);
577 		priv->link_irq = gpio_to_irq(priv->link_gpio);
578 		if (request_any_context_irq(priv->link_irq, w5300_detect_link,
579 				IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
580 				link_name, priv->ndev) < 0)
581 			priv->link_gpio = -EINVAL;
582 	}
583 
584 	netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
585 	return 0;
586 }
587 
w5300_probe(struct platform_device * pdev)588 static int w5300_probe(struct platform_device *pdev)
589 {
590 	struct w5300_priv *priv;
591 	struct net_device *ndev;
592 	int err;
593 
594 	ndev = alloc_etherdev(sizeof(*priv));
595 	if (!ndev)
596 		return -ENOMEM;
597 	SET_NETDEV_DEV(ndev, &pdev->dev);
598 	platform_set_drvdata(pdev, ndev);
599 	priv = netdev_priv(ndev);
600 	priv->ndev = ndev;
601 
602 	ndev->netdev_ops = &w5300_netdev_ops;
603 	ndev->ethtool_ops = &w5300_ethtool_ops;
604 	ndev->watchdog_timeo = HZ;
605 	netif_napi_add_weight(ndev, &priv->napi, w5300_napi_poll, 16);
606 
607 	/* This chip doesn't support VLAN packets with normal MTU,
608 	 * so disable VLAN for this device.
609 	 */
610 	ndev->features |= NETIF_F_VLAN_CHALLENGED;
611 
612 	err = register_netdev(ndev);
613 	if (err < 0)
614 		goto err_register;
615 
616 	err = w5300_hw_probe(pdev);
617 	if (err < 0)
618 		goto err_hw_probe;
619 
620 	return 0;
621 
622 err_hw_probe:
623 	unregister_netdev(ndev);
624 err_register:
625 	free_netdev(ndev);
626 	return err;
627 }
628 
w5300_remove(struct platform_device * pdev)629 static void w5300_remove(struct platform_device *pdev)
630 {
631 	struct net_device *ndev = platform_get_drvdata(pdev);
632 	struct w5300_priv *priv = netdev_priv(ndev);
633 
634 	w5300_hw_reset(priv);
635 	free_irq(priv->irq, ndev);
636 	if (gpio_is_valid(priv->link_gpio))
637 		free_irq(priv->link_irq, ndev);
638 
639 	unregister_netdev(ndev);
640 	free_netdev(ndev);
641 }
642 
643 #ifdef CONFIG_PM_SLEEP
w5300_suspend(struct device * dev)644 static int w5300_suspend(struct device *dev)
645 {
646 	struct net_device *ndev = dev_get_drvdata(dev);
647 	struct w5300_priv *priv = netdev_priv(ndev);
648 
649 	if (netif_running(ndev)) {
650 		netif_carrier_off(ndev);
651 		netif_device_detach(ndev);
652 
653 		w5300_hw_close(priv);
654 	}
655 	return 0;
656 }
657 
w5300_resume(struct device * dev)658 static int w5300_resume(struct device *dev)
659 {
660 	struct net_device *ndev = dev_get_drvdata(dev);
661 	struct w5300_priv *priv = netdev_priv(ndev);
662 
663 	if (!netif_running(ndev)) {
664 		w5300_hw_reset(priv);
665 		w5300_hw_start(priv);
666 
667 		netif_device_attach(ndev);
668 		if (!gpio_is_valid(priv->link_gpio) ||
669 		    gpio_get_value(priv->link_gpio) != 0)
670 			netif_carrier_on(ndev);
671 	}
672 	return 0;
673 }
674 #endif /* CONFIG_PM_SLEEP */
675 
676 static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
677 
678 static struct platform_driver w5300_driver = {
679 	.driver		= {
680 		.name	= DRV_NAME,
681 		.pm	= &w5300_pm_ops,
682 	},
683 	.probe		= w5300_probe,
684 	.remove_new	= w5300_remove,
685 };
686 
687 module_platform_driver(w5300_driver);
688