xref: /illumos-gate/usr/src/uts/common/io/chxge/com/vsc7321.c (revision 2d6eb4a5e0a47d30189497241345dc5466bb68ab)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright (C) 2003-2005 Chelsio Communications.  All rights reserved.
24  */
25 
26 /* Driver for Vitesse VSC7321 (Meigs II) MAC */
27 
28 
29 #if 0
30 #ifndef INVARIANTS
31 #define INVARIANTS
32 #endif
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/malloc.h>
37 #include <sys/kernel.h>
38 #include <sys/conf.h>
39 #include <pci/pcivar.h>
40 #include <pci/pcireg.h>
41 #endif
42 
43 #include "gmac.h"
44 #include "elmer0.h"
45 #include "vsc7321_reg.h"
46 
47 #define DEBUG 1
48 
49 struct init_table {
50     u32 addr;
51     u32 data;
52 };
53 
54 static struct cmac_ops vsc7321_ops;
55 
56 struct _cmac_instance {
57 	u32 mac_base;
58 	u32 index;
59 	u32 version;
60 };
61 
62 #define INITBLOCK_SLEEP	0xffffffff
63 
vsc_read(adapter_t * adapter,u32 addr,u32 * val)64 static void vsc_read(adapter_t *adapter, u32 addr, u32 *val)
65 {
66     u32 status, vlo, vhi;
67 
68     (void) t1_tpi_read(adapter, (addr << 2) + 4, &vlo);
69 
70     do {
71 	(void) t1_tpi_read(adapter, (REG_LOCAL_STATUS << 2) + 4, &vlo);
72 	(void) t1_tpi_read(adapter, REG_LOCAL_STATUS << 2, &vhi);
73 	status = (vhi << 16) | vlo;
74     } while ((status & 1) == 0);
75 
76     (void) t1_tpi_read(adapter, (REG_LOCAL_DATA << 2) + 4, &vlo);
77     (void) t1_tpi_read(adapter, REG_LOCAL_DATA << 2, &vhi);
78 
79     *val = (vhi << 16) | vlo;
80 }
81 
vsc_write(adapter_t * adapter,u32 addr,u32 data)82 static void vsc_write(adapter_t *adapter, u32 addr, u32 data)
83 {
84     (void) t1_tpi_write(adapter, (addr << 2) + 4, data & 0xFFFF);
85     (void) t1_tpi_write(adapter, addr << 2, (data >> 16) & 0xFFFF);
86 }
87 
88 /* Hard reset the MAC.  This wipes out *all* configuration. */
vsc7321_full_reset(adapter_t * adapter)89 static void vsc7321_full_reset(adapter_t* adapter)
90 {
91     u32 val;
92 
93     (void) t1_tpi_read(adapter, A_ELMER0_GPO, &val);
94     val &= ~1;
95     (void) t1_tpi_write(adapter, A_ELMER0_GPO, val);
96     DELAY_US(2);
97     val |= 0x80001;	/* Turn on SPI4_EN, and the MAC itself */
98     if (is_10G(adapter)) {
99 	val |= 0x40000;	/* Enable 10G section */
100     } else {
101 	val |= 0x20000;	/* Enable 1G section */
102     }
103     val &= ~0x800;	/* Turn off the red LED */
104     (void) t1_tpi_write(adapter, A_ELMER0_GPO, val);
105     DELAY_US(1000);
106 }
107 
108 static struct init_table vsc7321_reset[] = {
109     {        REG_SW_RESET, 0x80000001 },
110     { INITBLOCK_SLEEP, 0x64 },
111     {        REG_SW_RESET, 0x00000000 },
112     {      REG_IFACE_MODE, 0x00000000 },
113     {         REG_CRC_CFG, 0x00000020 },
114     {   REG_PLL_CLK_SPEED, 0x00000000 },
115     { INITBLOCK_SLEEP, 0x0a },
116     {   REG_PLL_CLK_SPEED, 0x000000d4 },
117     {       REG_SPI4_MISC, 0x00040009 },
118     { REG_SPI4_ING_SETUP2, 0x04040004 },
119     { REG_SPI4_ING_SETUP0, 0x0011100f },	/* FIXME: Multiport */
120     { REG_SPI4_EGR_SETUP0, 0x0004100f },	/* FIXME: Multiport */
121     { REG_SPI4_ING_SETUP1, 0x00100000 },
122     {      REG_AGE_INC(0), 0x00000000 },
123     {      REG_AGE_INC(1), 0x00000000 },
124     {     REG_ING_CONTROL, 0x0a000014 },	/* FIXME: 1G vs 10G */
125     {     REG_EGR_CONTROL, 0xa0010091 },	/* FIXME: 1G vs 10G */
126 };
127 
128 static struct init_table vsc7321_portinit[4][20] = {
129     {	/* Port 0 */
130     		/* FIFO setup */
131 	{        REG_TEST(0,0), 0x00000002 },
132 	{        REG_TEST(1,0), 0x00000002 },
133 	{  REG_TOP_BOTTOM(0,0), 0x00100000 },
134 	{  REG_TOP_BOTTOM(1,0), 0x00100000 },
135 	{ REG_HIGH_LOW_WM(0,0), 0x0fff0fff },
136 	{ REG_HIGH_LOW_WM(1,0), 0x0fff0fff },
137 	{   REG_CT_THRHLD(0,0), 0x00000000 },
138 	{   REG_CT_THRHLD(1,0), 0x00000000 },
139 	{        REG_TEST(0,0), 0x00000000 },
140 	{        REG_TEST(1,0), 0x00000000 },
141 		/* Port config */
142 	{      REG_MODE_CFG(0), 0x0000054c },
143 	{       REG_MAX_LEN(0), 0x000005ee },
144 	{     REG_DEV_SETUP(0), 0x00000001 },
145 	{    REG_TBI_CONFIG(0), 0x00000000 },
146 	{     REG_DEV_SETUP(0), 0x00000046 },
147 	{     REG_PAUSE_CFG(0), 0x00000000 },
148 	{    REG_NORMALIZER(0), 0x00000064 },
149 	{        REG_DENORM(0), 0x00000010 },
150     },
151     {	/* Port 1 */
152     		/* FIFO setup */
153 	{        REG_TEST(0,1), 0x00000002 },
154 	{        REG_TEST(1,1), 0x00000002 },
155 	{  REG_TOP_BOTTOM(0,1), 0x00100000 },
156 	{  REG_TOP_BOTTOM(1,1), 0x00100000 },
157 	{ REG_HIGH_LOW_WM(0,1), 0x0fff0fff },
158 	{ REG_HIGH_LOW_WM(1,1), 0x0fff0fff },
159 	{   REG_CT_THRHLD(0,1), 0x00000000 },
160 	{   REG_CT_THRHLD(1,1), 0x00000000 },
161 	{        REG_TEST(0,1), 0x00000000 },
162 	{        REG_TEST(1,1), 0x00000000 },
163 		/* Port config */
164 	{      REG_MODE_CFG(1), 0x0000054c },
165 	{       REG_MAX_LEN(1), 0x000005ee },
166 	{     REG_DEV_SETUP(1), 0x00000001 },
167 	{    REG_TBI_CONFIG(1), 0x00000000 },
168 	{     REG_DEV_SETUP(1), 0x00000046 },
169 	{     REG_PAUSE_CFG(1), 0x00000000 },
170 	{    REG_NORMALIZER(1), 0x00000064 },
171 	{        REG_DENORM(1), 0x00000010 },
172     },
173     {	/* Port 2 */
174     		/* FIFO setup */
175 	{        REG_TEST(0,2), 0x00000002 },
176 	{        REG_TEST(1,2), 0x00000002 },
177 	{  REG_TOP_BOTTOM(0,2), 0x00100000 },
178 	{  REG_TOP_BOTTOM(1,2), 0x00100000 },
179 	{ REG_HIGH_LOW_WM(0,2), 0x0fff0fff },
180 	{ REG_HIGH_LOW_WM(1,2), 0x0fff0fff },
181 	{   REG_CT_THRHLD(0,2), 0x00000000 },
182 	{   REG_CT_THRHLD(1,2), 0x00000000 },
183 	{        REG_TEST(0,2), 0x00000000 },
184 	{        REG_TEST(1,2), 0x00000000 },
185 		/* Port config */
186 	{      REG_MODE_CFG(2), 0x0000054c },
187 	{       REG_MAX_LEN(2), 0x000005ee },
188 	{     REG_DEV_SETUP(2), 0x00000001 },
189 	{    REG_TBI_CONFIG(2), 0x00000000 },
190 	{     REG_DEV_SETUP(2), 0x00000046 },
191 	{     REG_PAUSE_CFG(2), 0x00000000 },
192 	{    REG_NORMALIZER(2), 0x00000064 },
193 	{        REG_DENORM(2), 0x00000010 },
194     },
195     {	/* Port 3 */
196     		/* FIFO setup */
197 	{        REG_TEST(0,3), 0x00000002 },
198 	{        REG_TEST(1,3), 0x00000002 },
199 	{  REG_TOP_BOTTOM(0,3), 0x00100000 },
200 	{  REG_TOP_BOTTOM(1,3), 0x00100000 },
201 	{ REG_HIGH_LOW_WM(0,3), 0x0fff0fff },
202 	{ REG_HIGH_LOW_WM(1,3), 0x0fff0fff },
203 	{   REG_CT_THRHLD(0,3), 0x00000000 },
204 	{   REG_CT_THRHLD(1,3), 0x00000000 },
205 	{        REG_TEST(0,3), 0x00000000 },
206 	{        REG_TEST(1,3), 0x00000000 },
207 		/* Port config */
208 	{      REG_MODE_CFG(3), 0x0000054c },
209 	{       REG_MAX_LEN(3), 0x000005ee },
210 	{     REG_DEV_SETUP(3), 0x00000001 },
211 	{    REG_TBI_CONFIG(3), 0x00000000 },
212 	{     REG_DEV_SETUP(3), 0x00000046 },
213 	{     REG_PAUSE_CFG(3), 0x00000000 },
214 	{    REG_NORMALIZER(3), 0x00000064 },
215 	{        REG_DENORM(3), 0x00000010 },
216     },
217 };
218 
run_table(adapter_t * adapter,struct init_table * ib,int len)219 static void run_table(adapter_t *adapter, struct init_table *ib, int len)
220 {
221 	int i;
222 
223 	for (i = 0; i < len; i++) {
224 		if (ib[i].addr == INITBLOCK_SLEEP) {
225 			DELAY_US( ib[i].data );
226 		} else {
227 			vsc_write( adapter, ib[i].addr, ib[i].data );
228 		}
229 	}
230 }
231 
232 /* ARGSUSED */
vsc7321_mac_reset(adapter_t * adapter)233 static int vsc7321_mac_reset(adapter_t *adapter)
234 {
235 	return 0;
236 }
237 
vsc7321_mac_create(adapter_t * adapter,int index)238 static struct cmac *vsc7321_mac_create(adapter_t *adapter, int index)
239 {
240 	struct cmac *mac;
241 	u32 val;
242 	int i;
243 
244 	mac = t1_os_malloc_wait_zero(sizeof(*mac) + sizeof(cmac_instance));
245 	if (!mac) return NULL;
246 
247 	mac->ops = &vsc7321_ops;
248 	mac->instance = (cmac_instance *)(mac + 1);
249 
250 	mac->adapter   = adapter;
251 	mac->instance->index = index;
252 
253 
254 	vsc7321_full_reset(adapter);
255 
256 	i = 0;
257 	do {
258 		u32 vhi, vlo;
259 
260 		vhi = vlo = 0;
261 		(void) t1_tpi_read(adapter, (REG_LOCAL_STATUS << 2) + 4, &vlo);
262 		DELAY_US(1);
263 		(void) t1_tpi_read(adapter, REG_LOCAL_STATUS << 2, &vhi);
264 		DELAY_US(5);
265 		val = (vhi << 16) | vlo;
266 	} while ((++i < 10000) && (val == 0xffffffff));
267 
268 
269 	vsc_read(adapter, REG_CHIP_ID, &val);
270 
271 	if ((val & 0xfff0ffff) != 0x0F407321) {
272 		CH_ERR("%s: Didn't find a VSC 7321.\n", adapter_name(adapter));
273 		t1_os_free((void *)mac, sizeof(*mac) + sizeof(cmac_instance));
274 		return NULL;
275 	}
276 
277 	mac->instance->version = (val >> 16) & 0xf;
278 
279 	run_table(adapter, vsc7321_reset, DIMOF(vsc7321_reset));
280 	return mac;
281 }
282 
283 /* ARGSUSED */
mac_intr_handler(struct cmac * mac)284 static int mac_intr_handler(struct cmac *mac)
285 {
286 	return 0;
287 }
288 
289 /* ARGSUSED */
mac_intr_enable(struct cmac * mac)290 static int mac_intr_enable(struct cmac *mac)
291 {
292 	return 0;
293 }
294 
295 /* ARGSUSED */
mac_intr_disable(struct cmac * mac)296 static int mac_intr_disable(struct cmac *mac)
297 {
298 	return 0;
299 }
300 
301 /* ARGSUSED */
mac_intr_clear(struct cmac * mac)302 static int mac_intr_clear(struct cmac *mac)
303 {
304     /* Nothing extra needed */
305     return 0;
306 }
307 
308 /* Expect MAC address to be in network byte order. */
mac_set_address(struct cmac * mac,u8 addr[6])309 static int mac_set_address(struct cmac* mac, u8 addr[6])
310 {
311 	u32 addr_lo, addr_hi;
312 	int port = mac->instance->index;
313 
314 	addr_lo = addr[3];
315 	addr_lo = (addr_lo << 8) | addr[4];
316 	addr_lo = (addr_lo << 8) | addr[5];
317 
318 	addr_hi = addr[0];
319 	addr_hi = (addr_hi << 8) | addr[1];
320 	addr_hi = (addr_hi << 8) | addr[2];
321 
322 	vsc_write(mac->adapter, REG_MAC_LOW_ADDR(port), addr_lo);
323 	vsc_write(mac->adapter, REG_MAC_HIGH_ADDR(port), addr_hi);
324 	return 0;
325 }
326 
mac_get_address(struct cmac * mac,u8 addr[6])327 static int mac_get_address(struct cmac *mac, u8 addr[6])
328 {
329 	u32 addr_lo, addr_hi;
330 	int port = mac->instance->index;
331 
332 	vsc_read(mac->adapter, REG_MAC_LOW_ADDR(port), &addr_lo);
333 	vsc_read(mac->adapter, REG_MAC_HIGH_ADDR(port), &addr_hi);
334 
335 	addr[0] = (u8) (addr_hi >> 16);
336 	addr[1] = (u8) (addr_hi >> 8);
337 	addr[2] = (u8) addr_hi;
338 	addr[3] = (u8) (addr_lo >> 16);
339 	addr[4] = (u8) (addr_lo >> 8);
340 	addr[5] = (u8) addr_lo;
341 	return 0;
342 }
343 
344 /* This is intended to reset a port, not the whole MAC */
mac_reset(struct cmac * mac)345 static int mac_reset(struct cmac *mac)
346 {
347 	int index = mac->instance->index;
348 
349 	run_table(mac->adapter, vsc7321_portinit[index],
350 		  DIMOF(vsc7321_portinit[index]));
351 	return 0;
352 }
353 
354 /* ARGSUSED */
mac_set_rx_mode(struct cmac * mac,struct t1_rx_mode * rm)355 static int mac_set_rx_mode(struct cmac *mac, struct t1_rx_mode *rm)
356 {
357 	/* Meigs II is always promiscuous. */
358 	return 0;
359 }
360 
361 /* ARGSUSED */
mac_set_mtu(struct cmac * mac,int mtu)362 static int mac_set_mtu(struct cmac *mac, int mtu)
363 {
364 	return 0;
365 }
366 
367 /* ARGSUSED */
mac_set_speed_duplex_fc(struct cmac * mac,int speed,int duplex,int fc)368 static int mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex,
369 				   int fc)
370 {
371         /* XXX Fixme */
372 	return 0;
373 }
374 
mac_enable(struct cmac * mac,int which)375 static int mac_enable(struct cmac *mac, int which)
376 {
377 	u32 val;
378 	int port = mac->instance->index;
379 
380 	vsc_read(mac->adapter, REG_MODE_CFG(port), &val);
381 	if (which & MAC_DIRECTION_RX)
382 		val |= 0x2;
383 	if (which & MAC_DIRECTION_TX)
384 		val |= 1;
385 	vsc_write(mac->adapter, REG_MODE_CFG(port), val);
386 	return 0;
387 }
388 
mac_disable(struct cmac * mac,int which)389 static int mac_disable(struct cmac *mac, int which)
390 {
391 	u32 val;
392 	int port = mac->instance->index;
393 
394 	vsc_read(mac->adapter, REG_MODE_CFG(port), &val);
395 	if (which & MAC_DIRECTION_RX)
396 		val &= ~0x2;
397 	if (which & MAC_DIRECTION_TX)
398 		val &= ~0x1;
399 	vsc_write(mac->adapter, REG_MODE_CFG(port), val);
400 	return 0;
401 }
402 
403 #if 0
404 /* TBD XXX cmac interface stats will need to assigned to Chelsio's
405  *         mac stats.  cmac stats is now just usings Chelsio's
406  *         so we don't need the conversion.
407  */
408 int mac_get_statistics(struct cmac* mac, struct cmac_statistics* ps)
409 {
410     port_stats_update(mac);
411     return 0;
412 }
413 #endif
414 
415 /* ARGSUSED */
mac_update_statistics(struct cmac * mac,int flag)416 static const struct cmac_statistics *mac_update_statistics(struct cmac *mac,
417 							   int flag)
418 {
419 	return &mac->stats;
420 }
421 
mac_destroy(struct cmac * mac)422 static void mac_destroy(struct cmac *mac)
423 {
424 	t1_os_free((void *)mac, sizeof(*mac) + sizeof(cmac_instance));
425 }
426 
427 #ifdef C99_NOT_SUPPORTED
428 static struct cmac_ops vsc7321_ops = {
429 	mac_destroy,
430 	mac_reset,
431 	mac_intr_enable,
432 	mac_intr_disable,
433 	mac_intr_clear,
434 	mac_intr_handler,
435 	mac_enable,
436 	mac_disable,
437 	NULL,
438 	NULL,
439 	mac_set_mtu,
440 	mac_set_rx_mode,
441 	mac_set_speed_duplex_fc,
442 	NULL,
443 	mac_update_statistics,
444 	mac_get_address,
445 	mac_set_address
446 };
447 #else
448 static struct cmac_ops vsc7321_ops = {
449 	.destroy                  = mac_destroy,
450 	.reset                    = mac_reset,
451 	.interrupt_handler        = mac_intr_handler,
452 	.interrupt_enable         = mac_intr_enable,
453 	.interrupt_disable        = mac_intr_disable,
454 	.interrupt_clear          = mac_intr_clear,
455 	.enable                   = mac_enable,
456 	.disable                  = mac_disable,
457 	.set_mtu                  = mac_set_mtu,
458 	.set_rx_mode              = mac_set_rx_mode,
459 	.set_speed_duplex_fc      = mac_set_speed_duplex_fc,
460 	.statistics_update        = mac_update_statistics,
461 	.macaddress_get           = mac_get_address,
462 	.macaddress_set           = mac_set_address,
463 };
464 #endif
465 
466 struct gmac t1_vsc7321_ops = {
467 	0,
468 	vsc7321_mac_create,
469 	vsc7321_mac_reset
470 };
471