1 /*
2 * Copyright 1996 Massachusetts Institute of Technology
3 *
4 * Permission to use, copy, modify, and distribute this software and
5 * its documentation for any purpose and without fee is hereby
6 * granted, provided that both the above copyright notice and this
7 * permission notice appear in all copies, that both the above
8 * copyright notice and this permission notice appear in all
9 * supporting documentation, and that the name of M.I.T. not be used
10 * in advertising or publicity pertaining to distribution of the
11 * software without specific, written prior permission. M.I.T. makes
12 * no representations about the suitability of this software for any
13 * purpose. It is provided "as is" without express or implied
14 * warranty.
15 *
16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/types.h>
31 #include <sys/fcntl.h>
32 #include <sys/mman.h>
33 #include <sys/pciio.h>
34 #include <sys/queue.h>
35
36 #include <vm/vm.h>
37
38 #include <dev/pci/pcireg.h>
39
40 #include <assert.h>
41 #include <bitstring.h>
42 #include <ctype.h>
43 #include <err.h>
44 #include <inttypes.h>
45 #include <stdbool.h>
46 #include <stdlib.h>
47 #include <stdio.h>
48 #include <string.h>
49 #include <unistd.h>
50
51 #include "pathnames.h"
52 #include "pciconf.h"
53
54 struct pci_device_info
55 {
56 TAILQ_ENTRY(pci_device_info) link;
57 int id;
58 char *desc;
59 };
60
61 struct pci_vendor_info
62 {
63 TAILQ_ENTRY(pci_vendor_info) link;
64 TAILQ_HEAD(,pci_device_info) devs;
65 int id;
66 char *desc;
67 };
68
69
70 struct pci_tree_entry {
71 TAILQ_ENTRY(pci_tree_entry) link;
72 TAILQ_HEAD(pci_tree_list, pci_tree_entry) children;
73 struct pci_conf *p;
74 };
75
76 static TAILQ_HEAD(,pci_vendor_info) pci_vendors;
77
78 static struct pcisel getsel(const char *str);
79 static void list_bridge(int fd, struct pci_conf *p);
80 static void list_bars(int fd, struct pci_conf *p);
81 static void list_devs(const char *name, int verbose, int bars, int bridge,
82 int caps, int errors, int vpd, int compact, const char *class);
83 static void show_tree(int verbose);
84 static void list_verbose(struct pci_conf *p);
85 static void list_vpd(int fd, struct pci_conf *p);
86 static bool validate_class(const char *class);
87 static const char *guess_class(struct pci_conf *p);
88 static const char *guess_subclass(struct pci_conf *p);
89 static int load_vendors(void);
90 static void readit(const char *, const char *, int);
91 static void writeit(const char *, const char *, const char *, int);
92 static void chkattached(const char *);
93 static void dump_bar(const char *name, const char *reg, const char *bar_start,
94 const char *bar_count, int width, int verbose);
95 static void read_bar(const char *name, const char *bar, const char *start_end,
96 int width);
97 static void write_bar(const char *name, const char *bar, const char *offset_str,
98 const char *value_str, int width);
99
100 static int exitstatus = 0;
101
102 static void
usage(void)103 usage(void)
104 {
105
106 fprintf(stderr, "%s",
107 "usage: pciconf -l [-BbcevV] [-C class] [device]\n"
108 " pciconf -t [-v]\n"
109 " pciconf -a device\n"
110 " pciconf -r [-b | -h] device addr[:addr2]\n"
111 " pciconf -w [-b | -h] device addr value\n"
112 " pciconf -D [-b | -h | -x] device bar [start [count]]\n"
113 " pciconf -R [-b | -h | -x] device bar start[:end]\n"
114 " pciconf -W [-b | -h | -x] device bar offset value"
115 "\n");
116 exit(1);
117 }
118
119 int
main(int argc,char ** argv)120 main(int argc, char **argv)
121 {
122 int c, width;
123 enum { NONE, LIST, TREE, READ, WRITE, ATTACHED, DUMPBAR, READBAR,
124 WRITEBAR } mode;
125 int compact, bars, bridge, caps, errors, verbose, vpd;
126 const char *class;
127
128 mode = NONE;
129 compact = bars = bridge = caps = errors = verbose = vpd = 0;
130 width = 4;
131 class = NULL;
132
133 while ((c = getopt(argc, argv, "aBbcC:DehlRrtWwVvx")) != -1) {
134 switch(c) {
135 case 'a':
136 mode = ATTACHED;
137 break;
138
139 case 'B':
140 bridge = 1;
141 break;
142
143 case 'b':
144 bars = 1;
145 width = 1;
146 break;
147
148 case 'c':
149 caps++;
150 break;
151
152 case 'C':
153 class = optarg;
154 break;
155
156 case 'D':
157 mode = DUMPBAR;
158 break;
159
160 case 'e':
161 errors = 1;
162 break;
163
164 case 'h':
165 width = 2;
166 break;
167
168 case 'l':
169 if (mode == LIST)
170 compact = 1;
171 mode = LIST;
172 break;
173
174 case 'R':
175 mode = READBAR;
176 break;
177
178 case 'r':
179 mode = READ;
180 break;
181
182 case 't':
183 mode = TREE;
184 break;
185
186 case 'W':
187 mode = WRITEBAR;
188 break;
189
190 case 'w':
191 mode = WRITE;
192 break;
193
194 case 'v':
195 verbose++;
196 break;
197
198 case 'V':
199 vpd = 1;
200 break;
201
202 case 'x':
203 width = 8;
204 break;
205
206 default:
207 usage();
208 }
209 }
210
211 switch (mode) {
212 case LIST:
213 if (optind >= argc + 1)
214 usage();
215 list_devs(optind + 1 == argc ? argv[optind] : NULL, verbose,
216 bars, bridge, caps, errors, vpd, compact, class);
217 break;
218 case TREE:
219 if (optind != argc)
220 usage();
221 show_tree(verbose);
222 break;
223 case ATTACHED:
224 if (optind + 1 != argc)
225 usage();
226 chkattached(argv[optind]);
227 break;
228 case READ:
229 if (optind + 2 != argc || width == 8)
230 usage();
231 readit(argv[optind], argv[optind + 1], width);
232 break;
233 case WRITE:
234 if (optind + 3 != argc || width == 8)
235 usage();
236 writeit(argv[optind], argv[optind + 1], argv[optind + 2],
237 width);
238 break;
239 case DUMPBAR:
240 if (optind + 2 > argc || optind + 4 < argc)
241 usage();
242 dump_bar(argv[optind], argv[optind + 1],
243 optind + 2 < argc ? argv[optind + 2] : NULL,
244 optind + 3 < argc ? argv[optind + 3] : NULL,
245 width, verbose);
246 break;
247 case READBAR:
248 if (optind + 3 != argc)
249 usage();
250 read_bar(argv[optind], argv[optind + 1], argv[optind + 2],
251 width);
252 break;
253 case WRITEBAR:
254 if (optind + 4 != argc)
255 usage();
256 write_bar(argv[optind], argv[optind + 1], argv[optind + 2],
257 argv[optind + 3], width);
258 break;
259 default:
260 usage();
261 }
262
263 return (exitstatus);
264 }
265
266 static bool
fetch_devs(int fd,const char * name,struct pci_conf ** confp,size_t * countp)267 fetch_devs(int fd, const char *name, struct pci_conf **confp, size_t *countp)
268 {
269 struct pci_conf_io pc;
270 struct pci_conf conf[255], *p;
271 struct pci_match_conf patterns[1];
272 size_t count;
273
274 bzero(&pc, sizeof(struct pci_conf_io));
275 pc.match_buf_len = sizeof(conf);
276 pc.matches = conf;
277 if (name != NULL) {
278 bzero(&patterns, sizeof(patterns));
279 patterns[0].pc_sel = getsel(name);
280 patterns[0].flags = PCI_GETCONF_MATCH_DOMAIN |
281 PCI_GETCONF_MATCH_BUS | PCI_GETCONF_MATCH_DEV |
282 PCI_GETCONF_MATCH_FUNC;
283 pc.num_patterns = 1;
284 pc.pat_buf_len = sizeof(patterns);
285 pc.patterns = patterns;
286 }
287
288 p = NULL;
289 count = 0;
290 do {
291 if (ioctl(fd, PCIOCGETCONF, &pc) == -1)
292 err(1, "ioctl(PCIOCGETCONF)");
293
294 if (pc.status == PCI_GETCONF_LIST_CHANGED) {
295 free(p);
296 p = NULL;
297 count = 0;
298 pc.offset = 0;
299 continue;
300 }
301
302 if (pc.status == PCI_GETCONF_ERROR) {
303 warnx("error returned from PCIOCGETCONF ioctl");
304 return (false);
305 }
306
307 p = reallocf(p, (count + pc.num_matches) * sizeof(*p));
308 if (p == NULL) {
309 warnx("failed to allocate buffer for PCIOCGETCONF results");
310 return (false);
311 }
312
313 memcpy(p + count, conf, pc.num_matches * sizeof(*p));
314 count += pc.num_matches;
315 } while (pc.status == PCI_GETCONF_MORE_DEVS);
316
317 *confp = p;
318 *countp = count;
319 return (true);
320 }
321
322 static void
list_devs(const char * name,int verbose,int bars,int bridge,int caps,int errors,int vpd,int compact,const char * class)323 list_devs(const char *name, int verbose, int bars, int bridge, int caps,
324 int errors, int vpd, int compact, const char *class)
325 {
326 int fd;
327 struct pci_conf *conf, *p;
328 size_t count;
329 const char *pclass;
330 int none_count = 0;
331
332 if (verbose)
333 load_vendors();
334
335 if (class != NULL && !validate_class(class))
336 errx(1, "Invalid class name");
337
338 fd = open(_PATH_DEVPCI, (bridge || caps || errors) ? O_RDWR : O_RDONLY,
339 0);
340 if (fd < 0)
341 err(1, "%s", _PATH_DEVPCI);
342
343 if (!fetch_devs(fd, name, &conf, &count)) {
344 exitstatus = 1;
345 close(fd);
346 return;
347 }
348
349 if (compact)
350 printf("drv\tselector\tclass rev hdr "
351 "vendor device subven subdev\n");
352 for (p = conf; p < conf + count; p++) {
353 if (class != NULL) {
354 pclass = guess_class(p);
355 if (pclass == NULL || strcasecmp(pclass, class) != 0)
356 continue;
357 }
358
359 if (compact)
360 printf("%s%d@pci%d:%d:%d:%d:"
361 "\t%06x %02x %02x "
362 "%04x %04x %04x %04x\n",
363 *p->pd_name ? p->pd_name : "none",
364 *p->pd_name ? (int)p->pd_unit :
365 none_count++, p->pc_sel.pc_domain,
366 p->pc_sel.pc_bus, p->pc_sel.pc_dev,
367 p->pc_sel.pc_func, (p->pc_class << 16) |
368 (p->pc_subclass << 8) | p->pc_progif,
369 p->pc_revid, p->pc_hdr,
370 p->pc_vendor, p->pc_device,
371 p->pc_subvendor, p->pc_subdevice);
372 else
373 printf("%s%d@pci%d:%d:%d:%d:"
374 "\tclass=0x%06x rev=0x%02x hdr=0x%02x "
375 "vendor=0x%04x device=0x%04x "
376 "subvendor=0x%04x subdevice=0x%04x\n",
377 *p->pd_name ? p->pd_name : "none",
378 *p->pd_name ? (int)p->pd_unit :
379 none_count++, p->pc_sel.pc_domain,
380 p->pc_sel.pc_bus, p->pc_sel.pc_dev,
381 p->pc_sel.pc_func, (p->pc_class << 16) |
382 (p->pc_subclass << 8) | p->pc_progif,
383 p->pc_revid, p->pc_hdr,
384 p->pc_vendor, p->pc_device,
385 p->pc_subvendor, p->pc_subdevice);
386 if (verbose)
387 list_verbose(p);
388 if (bars)
389 list_bars(fd, p);
390 if (bridge)
391 list_bridge(fd, p);
392 if (caps)
393 list_caps(fd, p, caps);
394 if (errors)
395 list_errors(fd, p);
396 if (vpd)
397 list_vpd(fd, p);
398 }
399
400 free(conf);
401 close(fd);
402 }
403
404 static int
pci_conf_compar(const void * lhs,const void * rhs)405 pci_conf_compar(const void *lhs, const void *rhs)
406 {
407 const struct pci_conf *l, *r;
408
409 l = lhs;
410 r = rhs;
411 if (l->pc_sel.pc_domain != r->pc_sel.pc_domain)
412 return (l->pc_sel.pc_domain - r->pc_sel.pc_domain);
413 if (l->pc_sel.pc_bus != r->pc_sel.pc_bus)
414 return (l->pc_sel.pc_bus - r->pc_sel.pc_bus);
415 if (l->pc_sel.pc_dev != r->pc_sel.pc_dev)
416 return (l->pc_sel.pc_dev - r->pc_sel.pc_dev);
417 return (l->pc_sel.pc_func - r->pc_sel.pc_func);
418 }
419
420 static void
tree_add_device(struct pci_tree_list * head,struct pci_conf * p,struct pci_conf * conf,size_t count,bitstr_t * added)421 tree_add_device(struct pci_tree_list *head, struct pci_conf *p,
422 struct pci_conf *conf, size_t count, bitstr_t *added)
423 {
424 struct pci_tree_entry *e;
425 struct pci_conf *child;
426 size_t i;
427
428 e = malloc(sizeof(*e));
429 TAILQ_INIT(&e->children);
430 e->p = p;
431 TAILQ_INSERT_TAIL(head, e, link);
432
433 switch (p->pc_hdr) {
434 case PCIM_HDRTYPE_BRIDGE:
435 case PCIM_HDRTYPE_CARDBUS:
436 break;
437 default:
438 return;
439 }
440 if (p->pc_secbus == 0)
441 return;
442
443 assert(p->pc_subbus >= p->pc_secbus);
444 for (i = 0; i < count; i++) {
445 child = conf + i;
446 if (child->pc_sel.pc_domain < p->pc_sel.pc_domain)
447 continue;
448 if (child->pc_sel.pc_domain > p->pc_sel.pc_domain)
449 break;
450 if (child->pc_sel.pc_bus < p->pc_secbus)
451 continue;
452 if (child->pc_sel.pc_bus > p->pc_subbus)
453 break;
454
455 if (child->pc_sel.pc_bus == p->pc_secbus) {
456 assert(bit_test(added, i) == 0);
457 bit_set(added, i);
458 tree_add_device(&e->children, conf + i, conf, count,
459 added);
460 continue;
461 }
462
463 if (bit_test(added, i) == 0) {
464 /*
465 * This really shouldn't happen, but if for
466 * some reason a child bridge doesn't claim
467 * this device, display it now rather than
468 * later.
469 */
470 bit_set(added, i);
471 tree_add_device(&e->children, conf + i, conf, count,
472 added);
473 continue;
474 }
475 }
476 }
477
478 static bool
build_tree(struct pci_tree_list * head,struct pci_conf * conf,size_t count)479 build_tree(struct pci_tree_list *head, struct pci_conf *conf, size_t count)
480 {
481 bitstr_t *added;
482 size_t i;
483
484 TAILQ_INIT(head);
485
486 /*
487 * Allocate a bitstring to track which devices have already
488 * been added to the tree.
489 */
490 added = bit_alloc(count);
491 if (added == NULL)
492 return (false);
493
494 for (i = 0; i < count; i++) {
495 if (bit_test(added, i))
496 continue;
497
498 bit_set(added, i);
499 tree_add_device(head, conf + i, conf, count, added);
500 }
501
502 free(added);
503 return (true);
504 }
505
506 static void
free_tree(struct pci_tree_list * head)507 free_tree(struct pci_tree_list *head)
508 {
509 struct pci_tree_entry *e, *n;
510
511 TAILQ_FOREACH_SAFE(e, head, link, n) {
512 free_tree(&e->children);
513 TAILQ_REMOVE(head, e, link);
514 free(e);
515 }
516 }
517
518 static void
print_tree_entry(struct pci_tree_entry * e,const char * indent,bool last,int verbose)519 print_tree_entry(struct pci_tree_entry *e, const char *indent, bool last,
520 int verbose)
521 {
522 struct pci_vendor_info *vi;
523 struct pci_device_info *di;
524 struct pci_tree_entry *child;
525 struct pci_conf *p = e->p;
526 char *indent_buf;
527
528 printf("%s%c--- ", indent, last ? '`' : '|');
529 if (p->pd_name[0] != '\0')
530 printf("%s%lu", p->pd_name, p->pd_unit);
531 else
532 printf("pci%d:%d:%d:%d", p->pc_sel.pc_domain, p->pc_sel.pc_bus,
533 p->pc_sel.pc_dev, p->pc_sel.pc_func);
534
535 if (verbose) {
536 di = NULL;
537 TAILQ_FOREACH(vi, &pci_vendors, link) {
538 if (vi->id == p->pc_vendor) {
539 printf(" %s", vi->desc);
540 TAILQ_FOREACH(di, &vi->devs, link) {
541 if (di->id == p->pc_device) {
542 printf(" %s", di->desc);
543 if (verbose > 1)
544 printf(" [0x%04x:0x%04x "
545 "0x%04x:0x%04x]",
546 p->pc_vendor,
547 p->pc_device,
548 p->pc_subvendor,
549 p->pc_subdevice);
550 break;
551 }
552 }
553 break;
554 }
555 }
556 if (vi == NULL)
557 printf(" vendor=0x%04x device=0x%04x", p->pc_vendor,
558 p->pc_device);
559 else if (di == NULL)
560 printf(" device=0x%04x", p->pc_device);
561 }
562 printf("\n");
563
564 if (TAILQ_EMPTY(&e->children))
565 return;
566
567 asprintf(&indent_buf, "%s%c ", indent, last ? ' ' : '|');
568 TAILQ_FOREACH(child, &e->children, link) {
569 print_tree_entry(child, indent_buf, TAILQ_NEXT(child, link) ==
570 NULL, verbose);
571 }
572 free(indent_buf);
573 }
574
575 static void
show_tree(int verbose)576 show_tree(int verbose)
577 {
578 struct pci_tree_list head;
579 struct pci_tree_entry *e, *n;
580 struct pci_conf *conf;
581 size_t count;
582 int fd;
583 bool last, new_bus;
584
585 if (verbose)
586 load_vendors();
587
588 fd = open(_PATH_DEVPCI, O_RDONLY);
589 if (fd < 0)
590 err(1, "%s", _PATH_DEVPCI);
591
592 if (!fetch_devs(fd, NULL, &conf, &count)) {
593 exitstatus = 1;
594 goto close_fd;
595 }
596
597 if (count == 0)
598 goto close_fd;
599
600 if (conf[0].pc_reported_len < offsetof(struct pci_conf, pc_subbus)) {
601 warnx("kernel too old");
602 exitstatus = 1;
603 goto free_conf;
604 }
605
606 /* First, sort devices by DBSF. */
607 qsort(conf, count, sizeof(*conf), pci_conf_compar);
608
609 if (!build_tree(&head, conf, count)) {
610 warnx("failed to build tree of PCI devices");
611 exitstatus = 1;
612 goto free_conf;
613 }
614
615 new_bus = true;
616 TAILQ_FOREACH(e, &head, link) {
617 if (new_bus) {
618 printf("--- pci%d:%d\n", e->p->pc_sel.pc_domain,
619 e->p->pc_sel.pc_bus);
620 new_bus = false;
621 }
622
623 /* Is this the last entry for this bus? */
624 n = TAILQ_NEXT(e, link);
625 if (n == NULL ||
626 n->p->pc_sel.pc_domain != e->p->pc_sel.pc_domain ||
627 n->p->pc_sel.pc_bus != e->p->pc_sel.pc_bus) {
628 last = true;
629 new_bus = true;
630 } else
631 last = false;
632
633 print_tree_entry(e, " ", last, verbose);
634 }
635
636 free_tree(&head);
637 free_conf:
638 free(conf);
639 close_fd:
640 close(fd);
641 }
642
643 static void
print_bus_range(struct pci_conf * p)644 print_bus_range(struct pci_conf *p)
645 {
646 printf(" bus range = %u-%u\n", p->pc_secbus, p->pc_subbus);
647 }
648
649 static void
print_window(int reg,const char * type,int range,uint64_t base,uint64_t limit)650 print_window(int reg, const char *type, int range, uint64_t base,
651 uint64_t limit)
652 {
653
654 printf(" window[%02x] = type %s, range %2d, addr %#jx-%#jx, %s\n",
655 reg, type, range, (uintmax_t)base, (uintmax_t)limit,
656 base < limit ? "enabled" : "disabled");
657 }
658
659 static void
print_special_decode(bool isa,bool vga,bool subtractive)660 print_special_decode(bool isa, bool vga, bool subtractive)
661 {
662 bool comma;
663
664 if (isa || vga || subtractive) {
665 comma = false;
666 printf(" decode = ");
667 if (isa) {
668 printf("ISA");
669 comma = true;
670 }
671 if (vga) {
672 printf("%sVGA", comma ? ", " : "");
673 comma = true;
674 }
675 if (subtractive)
676 printf("%ssubtractive", comma ? ", " : "");
677 printf("\n");
678 }
679 }
680
681 static void
print_bridge_windows(int fd,struct pci_conf * p)682 print_bridge_windows(int fd, struct pci_conf *p)
683 {
684 uint64_t base, limit;
685 uint32_t val;
686 uint16_t bctl;
687 bool subtractive;
688 int range;
689
690 /*
691 * XXX: This assumes that a window with a base and limit of 0
692 * is not implemented. In theory a window might be programmed
693 * at the smallest size with a base of 0, but those do not seem
694 * common in practice.
695 */
696 val = read_config(fd, &p->pc_sel, PCIR_IOBASEL_1, 1);
697 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1) != 0) {
698 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
699 base = PCI_PPBIOBASE(
700 read_config(fd, &p->pc_sel, PCIR_IOBASEH_1, 2),
701 val);
702 limit = PCI_PPBIOLIMIT(
703 read_config(fd, &p->pc_sel, PCIR_IOLIMITH_1, 2),
704 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1));
705 range = 32;
706 } else {
707 base = PCI_PPBIOBASE(0, val);
708 limit = PCI_PPBIOLIMIT(0,
709 read_config(fd, &p->pc_sel, PCIR_IOLIMITL_1, 1));
710 range = 16;
711 }
712 print_window(PCIR_IOBASEL_1, "I/O Port", range, base, limit);
713 }
714
715 base = PCI_PPBMEMBASE(0,
716 read_config(fd, &p->pc_sel, PCIR_MEMBASE_1, 2));
717 limit = PCI_PPBMEMLIMIT(0,
718 read_config(fd, &p->pc_sel, PCIR_MEMLIMIT_1, 2));
719 print_window(PCIR_MEMBASE_1, "Memory", 32, base, limit);
720
721 val = read_config(fd, &p->pc_sel, PCIR_PMBASEL_1, 2);
722 if (val != 0 || read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2) != 0) {
723 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
724 base = PCI_PPBMEMBASE(
725 read_config(fd, &p->pc_sel, PCIR_PMBASEH_1, 4),
726 val);
727 limit = PCI_PPBMEMLIMIT(
728 read_config(fd, &p->pc_sel, PCIR_PMLIMITH_1, 4),
729 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2));
730 range = 64;
731 } else {
732 base = PCI_PPBMEMBASE(0, val);
733 limit = PCI_PPBMEMLIMIT(0,
734 read_config(fd, &p->pc_sel, PCIR_PMLIMITL_1, 2));
735 range = 32;
736 }
737 print_window(PCIR_PMBASEL_1, "Prefetchable Memory", range, base,
738 limit);
739 }
740
741 /*
742 * XXX: This list of bridges that are subtractive but do not set
743 * progif to indicate it is copied from pci_pci.c.
744 */
745 subtractive = p->pc_progif == PCIP_BRIDGE_PCI_SUBTRACTIVE;
746 switch (p->pc_device << 16 | p->pc_vendor) {
747 case 0xa002177d: /* Cavium ThunderX */
748 case 0x124b8086: /* Intel 82380FB Mobile */
749 case 0x060513d7: /* Toshiba ???? */
750 subtractive = true;
751 }
752 if (p->pc_vendor == 0x8086 && (p->pc_device & 0xff00) == 0x2400)
753 subtractive = true;
754
755 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_1, 2);
756 print_special_decode(bctl & PCIB_BCR_ISA_ENABLE,
757 bctl & PCIB_BCR_VGA_ENABLE, subtractive);
758 }
759
760 static void
print_cardbus_mem_window(int fd,struct pci_conf * p,int basereg,int limitreg,bool prefetch)761 print_cardbus_mem_window(int fd, struct pci_conf *p, int basereg, int limitreg,
762 bool prefetch)
763 {
764
765 print_window(basereg, prefetch ? "Prefetchable Memory" : "Memory", 32,
766 PCI_CBBMEMBASE(read_config(fd, &p->pc_sel, basereg, 4)),
767 PCI_CBBMEMLIMIT(read_config(fd, &p->pc_sel, limitreg, 4)));
768 }
769
770 static void
print_cardbus_io_window(int fd,struct pci_conf * p,int basereg,int limitreg)771 print_cardbus_io_window(int fd, struct pci_conf *p, int basereg, int limitreg)
772 {
773 uint32_t base, limit;
774 uint32_t val;
775 int range;
776
777 val = read_config(fd, &p->pc_sel, basereg, 2);
778 if ((val & PCIM_CBBIO_MASK) == PCIM_CBBIO_32) {
779 base = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, basereg, 4));
780 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 4));
781 range = 32;
782 } else {
783 base = PCI_CBBIOBASE(val);
784 limit = PCI_CBBIOBASE(read_config(fd, &p->pc_sel, limitreg, 2));
785 range = 16;
786 }
787 print_window(basereg, "I/O Port", range, base, limit);
788 }
789
790 static void
print_cardbus_windows(int fd,struct pci_conf * p)791 print_cardbus_windows(int fd, struct pci_conf *p)
792 {
793 uint16_t bctl;
794
795 bctl = read_config(fd, &p->pc_sel, PCIR_BRIDGECTL_2, 2);
796 print_cardbus_mem_window(fd, p, PCIR_MEMBASE0_2, PCIR_MEMLIMIT0_2,
797 bctl & CBB_BCR_PREFETCH_0_ENABLE);
798 print_cardbus_mem_window(fd, p, PCIR_MEMBASE1_2, PCIR_MEMLIMIT1_2,
799 bctl & CBB_BCR_PREFETCH_1_ENABLE);
800 print_cardbus_io_window(fd, p, PCIR_IOBASE0_2, PCIR_IOLIMIT0_2);
801 print_cardbus_io_window(fd, p, PCIR_IOBASE1_2, PCIR_IOLIMIT1_2);
802 print_special_decode(bctl & CBB_BCR_ISA_ENABLE,
803 bctl & CBB_BCR_VGA_ENABLE, false);
804 }
805
806 static void
list_bridge(int fd,struct pci_conf * p)807 list_bridge(int fd, struct pci_conf *p)
808 {
809
810 switch (p->pc_hdr & PCIM_HDRTYPE) {
811 case PCIM_HDRTYPE_BRIDGE:
812 print_bus_range(p);
813 print_bridge_windows(fd, p);
814 break;
815 case PCIM_HDRTYPE_CARDBUS:
816 print_bus_range(p);
817 print_cardbus_windows(fd, p);
818 break;
819 }
820 }
821
822 static void
list_bars(int fd,struct pci_conf * p)823 list_bars(int fd, struct pci_conf *p)
824 {
825 int i, max;
826
827 switch (p->pc_hdr & PCIM_HDRTYPE) {
828 case PCIM_HDRTYPE_NORMAL:
829 max = PCIR_MAX_BAR_0;
830 break;
831 case PCIM_HDRTYPE_BRIDGE:
832 max = PCIR_MAX_BAR_1;
833 break;
834 case PCIM_HDRTYPE_CARDBUS:
835 max = PCIR_MAX_BAR_2;
836 break;
837 default:
838 return;
839 }
840
841 for (i = 0; i <= max; i++)
842 print_bar(fd, p, "bar ", PCIR_BAR(i));
843 }
844
845 void
print_bar(int fd,struct pci_conf * p,const char * label,uint16_t bar_offset)846 print_bar(int fd, struct pci_conf *p, const char *label, uint16_t bar_offset)
847 {
848 uint64_t base;
849 const char *type;
850 struct pci_bar_io bar;
851 int range;
852
853 bar.pbi_sel = p->pc_sel;
854 bar.pbi_reg = bar_offset;
855 if (ioctl(fd, PCIOCGETBAR, &bar) < 0)
856 return;
857 if (PCI_BAR_IO(bar.pbi_base)) {
858 type = "I/O Port";
859 range = 32;
860 base = bar.pbi_base & PCIM_BAR_IO_BASE;
861 } else {
862 if (bar.pbi_base & PCIM_BAR_MEM_PREFETCH)
863 type = "Prefetchable Memory";
864 else
865 type = "Memory";
866 switch (bar.pbi_base & PCIM_BAR_MEM_TYPE) {
867 case PCIM_BAR_MEM_32:
868 range = 32;
869 break;
870 case PCIM_BAR_MEM_1MB:
871 range = 20;
872 break;
873 case PCIM_BAR_MEM_64:
874 range = 64;
875 break;
876 default:
877 range = -1;
878 }
879 base = bar.pbi_base & ~((uint64_t)0xf);
880 }
881 printf(" %s[%02x] = type %s, range %2d, base %#jx, ",
882 label, bar_offset, type, range, (uintmax_t)base);
883 printf("size %ju, %s\n", (uintmax_t)bar.pbi_length,
884 bar.pbi_enabled ? "enabled" : "disabled");
885 }
886
887 static void
list_verbose(struct pci_conf * p)888 list_verbose(struct pci_conf *p)
889 {
890 struct pci_vendor_info *vi;
891 struct pci_device_info *di;
892 const char *dp;
893
894 TAILQ_FOREACH(vi, &pci_vendors, link) {
895 if (vi->id == p->pc_vendor) {
896 printf(" vendor = '%s'\n", vi->desc);
897 break;
898 }
899 }
900 if (vi == NULL) {
901 di = NULL;
902 } else {
903 TAILQ_FOREACH(di, &vi->devs, link) {
904 if (di->id == p->pc_device) {
905 printf(" device = '%s'\n", di->desc);
906 break;
907 }
908 }
909 }
910 if ((dp = guess_class(p)) != NULL)
911 printf(" class = %s\n", dp);
912 if ((dp = guess_subclass(p)) != NULL)
913 printf(" subclass = %s\n", dp);
914 }
915
916 static void
list_vpd(int fd,struct pci_conf * p)917 list_vpd(int fd, struct pci_conf *p)
918 {
919 struct pci_list_vpd_io list;
920 struct pci_vpd_element *vpd, *end;
921
922 list.plvi_sel = p->pc_sel;
923 list.plvi_len = 0;
924 list.plvi_data = NULL;
925 if (ioctl(fd, PCIOCLISTVPD, &list) < 0 || list.plvi_len == 0)
926 return;
927
928 list.plvi_data = malloc(list.plvi_len);
929 if (ioctl(fd, PCIOCLISTVPD, &list) < 0) {
930 free(list.plvi_data);
931 return;
932 }
933
934 vpd = list.plvi_data;
935 end = (struct pci_vpd_element *)((char *)vpd + list.plvi_len);
936 for (; vpd < end; vpd = PVE_NEXT(vpd)) {
937 if (vpd->pve_flags == PVE_FLAG_IDENT) {
938 printf(" VPD ident = '%.*s'\n",
939 (int)vpd->pve_datalen, vpd->pve_data);
940 continue;
941 }
942
943 /* Ignore the checksum keyword. */
944 if (!(vpd->pve_flags & PVE_FLAG_RW) &&
945 memcmp(vpd->pve_keyword, "RV", 2) == 0)
946 continue;
947
948 /* Ignore remaining read-write space. */
949 if (vpd->pve_flags & PVE_FLAG_RW &&
950 memcmp(vpd->pve_keyword, "RW", 2) == 0)
951 continue;
952
953 /* Handle extended capability keyword. */
954 if (!(vpd->pve_flags & PVE_FLAG_RW) &&
955 memcmp(vpd->pve_keyword, "CP", 2) == 0) {
956 printf(" VPD ro CP = ID %02x in map 0x%x[0x%x]\n",
957 (unsigned int)vpd->pve_data[0],
958 PCIR_BAR((unsigned int)vpd->pve_data[1]),
959 (unsigned int)vpd->pve_data[3] << 8 |
960 (unsigned int)vpd->pve_data[2]);
961 continue;
962 }
963
964 /* Remaining keywords should all have ASCII values. */
965 printf(" VPD %s %c%c = '%.*s'\n",
966 vpd->pve_flags & PVE_FLAG_RW ? "rw" : "ro",
967 vpd->pve_keyword[0], vpd->pve_keyword[1],
968 (int)vpd->pve_datalen, vpd->pve_data);
969 }
970 free(list.plvi_data);
971 }
972
973 /*
974 * This is a direct cut-and-paste from the table in sys/dev/pci/pci.c.
975 */
976 static struct
977 {
978 int class;
979 int subclass;
980 const char *desc;
981 } pci_nomatch_tab[] = {
982 {PCIC_OLD, -1, "old"},
983 {PCIC_OLD, PCIS_OLD_NONVGA, "non-VGA display device"},
984 {PCIC_OLD, PCIS_OLD_VGA, "VGA-compatible display device"},
985 {PCIC_STORAGE, -1, "mass storage"},
986 {PCIC_STORAGE, PCIS_STORAGE_SCSI, "SCSI"},
987 {PCIC_STORAGE, PCIS_STORAGE_IDE, "ATA"},
988 {PCIC_STORAGE, PCIS_STORAGE_FLOPPY, "floppy disk"},
989 {PCIC_STORAGE, PCIS_STORAGE_IPI, "IPI"},
990 {PCIC_STORAGE, PCIS_STORAGE_RAID, "RAID"},
991 {PCIC_STORAGE, PCIS_STORAGE_ATA_ADMA, "ATA (ADMA)"},
992 {PCIC_STORAGE, PCIS_STORAGE_SATA, "SATA"},
993 {PCIC_STORAGE, PCIS_STORAGE_SAS, "SAS"},
994 {PCIC_STORAGE, PCIS_STORAGE_NVM, "NVM"},
995 {PCIC_STORAGE, PCIS_STORAGE_UFS, "UFS"},
996 {PCIC_NETWORK, -1, "network"},
997 {PCIC_NETWORK, PCIS_NETWORK_ETHERNET, "ethernet"},
998 {PCIC_NETWORK, PCIS_NETWORK_TOKENRING, "token ring"},
999 {PCIC_NETWORK, PCIS_NETWORK_FDDI, "fddi"},
1000 {PCIC_NETWORK, PCIS_NETWORK_ATM, "ATM"},
1001 {PCIC_NETWORK, PCIS_NETWORK_ISDN, "ISDN"},
1002 {PCIC_NETWORK, PCIS_NETWORK_WORLDFIP, "WorldFip"},
1003 {PCIC_NETWORK, PCIS_NETWORK_PICMG, "PICMG"},
1004 {PCIC_NETWORK, PCIS_NETWORK_INFINIBAND, "InfiniBand"},
1005 {PCIC_NETWORK, PCIS_NETWORK_HFC, "host fabric"},
1006 {PCIC_DISPLAY, -1, "display"},
1007 {PCIC_DISPLAY, PCIS_DISPLAY_VGA, "VGA"},
1008 {PCIC_DISPLAY, PCIS_DISPLAY_XGA, "XGA"},
1009 {PCIC_DISPLAY, PCIS_DISPLAY_3D, "3D"},
1010 {PCIC_MULTIMEDIA, -1, "multimedia"},
1011 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_VIDEO, "video"},
1012 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_AUDIO, "audio"},
1013 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_TELE, "telephony"},
1014 {PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_HDA, "HDA"},
1015 {PCIC_MEMORY, -1, "memory"},
1016 {PCIC_MEMORY, PCIS_MEMORY_RAM, "RAM"},
1017 {PCIC_MEMORY, PCIS_MEMORY_FLASH, "flash"},
1018 {PCIC_BRIDGE, -1, "bridge"},
1019 {PCIC_BRIDGE, PCIS_BRIDGE_HOST, "HOST-PCI"},
1020 {PCIC_BRIDGE, PCIS_BRIDGE_ISA, "PCI-ISA"},
1021 {PCIC_BRIDGE, PCIS_BRIDGE_EISA, "PCI-EISA"},
1022 {PCIC_BRIDGE, PCIS_BRIDGE_MCA, "PCI-MCA"},
1023 {PCIC_BRIDGE, PCIS_BRIDGE_PCI, "PCI-PCI"},
1024 {PCIC_BRIDGE, PCIS_BRIDGE_PCMCIA, "PCI-PCMCIA"},
1025 {PCIC_BRIDGE, PCIS_BRIDGE_NUBUS, "PCI-NuBus"},
1026 {PCIC_BRIDGE, PCIS_BRIDGE_CARDBUS, "PCI-CardBus"},
1027 {PCIC_BRIDGE, PCIS_BRIDGE_RACEWAY, "PCI-RACEway"},
1028 {PCIC_BRIDGE, PCIS_BRIDGE_PCI_TRANSPARENT,
1029 "Semi-transparent PCI-to-PCI"},
1030 {PCIC_BRIDGE, PCIS_BRIDGE_INFINIBAND, "InfiniBand-PCI"},
1031 {PCIC_BRIDGE, PCIS_BRIDGE_AS_PCI,
1032 "AdvancedSwitching-PCI"},
1033 {PCIC_SIMPLECOMM, -1, "simple comms"},
1034 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_UART, "UART"}, /* could detect 16550 */
1035 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_PAR, "parallel port"},
1036 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MULSER, "multiport serial"},
1037 {PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_MODEM, "generic modem"},
1038 {PCIC_BASEPERIPH, -1, "base peripheral"},
1039 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PIC, "interrupt controller"},
1040 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_DMA, "DMA controller"},
1041 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_TIMER, "timer"},
1042 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RTC, "realtime clock"},
1043 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_PCIHOT, "PCI hot-plug controller"},
1044 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_SDHC, "SD host controller"},
1045 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_IOMMU, "IOMMU"},
1046 {PCIC_BASEPERIPH, PCIS_BASEPERIPH_RCEC,
1047 "Root Complex Event Collector"},
1048 {PCIC_INPUTDEV, -1, "input device"},
1049 {PCIC_INPUTDEV, PCIS_INPUTDEV_KEYBOARD, "keyboard"},
1050 {PCIC_INPUTDEV, PCIS_INPUTDEV_DIGITIZER,"digitizer"},
1051 {PCIC_INPUTDEV, PCIS_INPUTDEV_MOUSE, "mouse"},
1052 {PCIC_INPUTDEV, PCIS_INPUTDEV_SCANNER, "scanner"},
1053 {PCIC_INPUTDEV, PCIS_INPUTDEV_GAMEPORT, "gameport"},
1054 {PCIC_DOCKING, -1, "docking station"},
1055 {PCIC_PROCESSOR, -1, "processor"},
1056 {PCIC_SERIALBUS, -1, "serial bus"},
1057 {PCIC_SERIALBUS, PCIS_SERIALBUS_FW, "FireWire"},
1058 {PCIC_SERIALBUS, PCIS_SERIALBUS_ACCESS, "AccessBus"},
1059 {PCIC_SERIALBUS, PCIS_SERIALBUS_SSA, "SSA"},
1060 {PCIC_SERIALBUS, PCIS_SERIALBUS_USB, "USB"},
1061 {PCIC_SERIALBUS, PCIS_SERIALBUS_FC, "Fibre Channel"},
1062 {PCIC_SERIALBUS, PCIS_SERIALBUS_SMBUS, "SMBus"},
1063 {PCIC_SERIALBUS, PCIS_SERIALBUS_INFINIBAND, "InfiniBand"},
1064 {PCIC_SERIALBUS, PCIS_SERIALBUS_IPMI, "IPMI"},
1065 {PCIC_SERIALBUS, PCIS_SERIALBUS_SERCOS, "SERCOS"},
1066 {PCIC_SERIALBUS, PCIS_SERIALBUS_CANBUS, "CANbus"},
1067 {PCIC_SERIALBUS, PCIS_SERIALBUS_MIPI_I3C, "MIPI I3C"},
1068 {PCIC_WIRELESS, -1, "wireless controller"},
1069 {PCIC_WIRELESS, PCIS_WIRELESS_IRDA, "iRDA"},
1070 {PCIC_WIRELESS, PCIS_WIRELESS_IR, "IR"},
1071 {PCIC_WIRELESS, PCIS_WIRELESS_RF, "RF"},
1072 {PCIC_WIRELESS, PCIS_WIRELESS_BLUETOOTH, "bluetooth"},
1073 {PCIC_WIRELESS, PCIS_WIRELESS_BROADBAND, "broadband"},
1074 {PCIC_WIRELESS, PCIS_WIRELESS_80211A, "ethernet 802.11a"},
1075 {PCIC_WIRELESS, PCIS_WIRELESS_80211B, "ethernet 802.11b"},
1076 {PCIC_WIRELESS, PCIS_WIRELESS_CELL,
1077 "cellular controller/modem"},
1078 {PCIC_WIRELESS, PCIS_WIRELESS_CELL_E,
1079 "cellular controller/modem plus ethernet"},
1080 {PCIC_INTELLIIO, -1, "intelligent I/O controller"},
1081 {PCIC_INTELLIIO, PCIS_INTELLIIO_I2O, "I2O"},
1082 {PCIC_SATCOM, -1, "satellite communication"},
1083 {PCIC_SATCOM, PCIS_SATCOM_TV, "sat TV"},
1084 {PCIC_SATCOM, PCIS_SATCOM_AUDIO, "sat audio"},
1085 {PCIC_SATCOM, PCIS_SATCOM_VOICE, "sat voice"},
1086 {PCIC_SATCOM, PCIS_SATCOM_DATA, "sat data"},
1087 {PCIC_CRYPTO, -1, "encrypt/decrypt"},
1088 {PCIC_CRYPTO, PCIS_CRYPTO_NETCOMP, "network/computer crypto"},
1089 {PCIC_CRYPTO, PCIS_CRYPTO_ENTERTAIN, "entertainment crypto"},
1090 {PCIC_DASP, -1, "dasp"},
1091 {PCIC_DASP, PCIS_DASP_DPIO, "DPIO module"},
1092 {PCIC_DASP, PCIS_DASP_PERFCNTRS, "performance counters"},
1093 {PCIC_DASP, PCIS_DASP_COMM_SYNC, "communication synchronizer"},
1094 {PCIC_DASP, PCIS_DASP_MGMT_CARD, "signal processing management"},
1095 {PCIC_ACCEL, -1, "processing accelerators"},
1096 {PCIC_ACCEL, PCIS_ACCEL_PROCESSING, "processing accelerators"},
1097 {PCIC_INSTRUMENT, -1, "non-essential instrumentation"},
1098 {0, 0, NULL}
1099 };
1100
1101 static bool
validate_class(const char * class)1102 validate_class(const char *class)
1103 {
1104 int i;
1105
1106 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
1107 if ((strcasecmp(class, pci_nomatch_tab[i].desc) == 0) &&
1108 (pci_nomatch_tab[i].subclass == -1))
1109 return (true);
1110 }
1111 return (false);
1112 }
1113
1114 static const char *
guess_class(struct pci_conf * p)1115 guess_class(struct pci_conf *p)
1116 {
1117 int i;
1118
1119 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
1120 if (pci_nomatch_tab[i].class == p->pc_class)
1121 return(pci_nomatch_tab[i].desc);
1122 }
1123 return(NULL);
1124 }
1125
1126 static const char *
guess_subclass(struct pci_conf * p)1127 guess_subclass(struct pci_conf *p)
1128 {
1129 int i;
1130
1131 for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
1132 if ((pci_nomatch_tab[i].class == p->pc_class) &&
1133 (pci_nomatch_tab[i].subclass == p->pc_subclass))
1134 return(pci_nomatch_tab[i].desc);
1135 }
1136 return(NULL);
1137 }
1138
1139 static int
load_vendors(void)1140 load_vendors(void)
1141 {
1142 const char *dbf;
1143 FILE *db;
1144 struct pci_vendor_info *cv;
1145 struct pci_device_info *cd;
1146 char buf[1024], str[1024];
1147 char *ch;
1148 int id, error;
1149
1150 /*
1151 * Locate the database and initialise.
1152 */
1153 TAILQ_INIT(&pci_vendors);
1154 if ((dbf = getenv("PCICONF_VENDOR_DATABASE")) == NULL)
1155 dbf = _PATH_LPCIVDB;
1156 if ((db = fopen(dbf, "r")) == NULL) {
1157 dbf = _PATH_PCIVDB;
1158 if ((db = fopen(dbf, "r")) == NULL)
1159 return(1);
1160 }
1161 cv = NULL;
1162 cd = NULL;
1163 error = 0;
1164
1165 /*
1166 * Scan input lines from the database
1167 */
1168 for (;;) {
1169 if (fgets(buf, sizeof(buf), db) == NULL)
1170 break;
1171
1172 if ((ch = strchr(buf, '#')) != NULL)
1173 *ch = '\0';
1174 ch = strchr(buf, '\0') - 1;
1175 while (ch > buf && isspace(*ch))
1176 *ch-- = '\0';
1177 if (ch <= buf)
1178 continue;
1179
1180 /* Can't handle subvendor / subdevice entries yet */
1181 if (buf[0] == '\t' && buf[1] == '\t')
1182 continue;
1183
1184 /* Check for vendor entry */
1185 if (buf[0] != '\t' && sscanf(buf, "%04x %[^\n]", &id, str) == 2) {
1186 if ((id == 0) || (strlen(str) < 1))
1187 continue;
1188 if ((cv = malloc(sizeof(struct pci_vendor_info))) == NULL) {
1189 warn("allocating vendor entry");
1190 error = 1;
1191 break;
1192 }
1193 if ((cv->desc = strdup(str)) == NULL) {
1194 free(cv);
1195 warn("allocating vendor description");
1196 error = 1;
1197 break;
1198 }
1199 cv->id = id;
1200 TAILQ_INIT(&cv->devs);
1201 TAILQ_INSERT_TAIL(&pci_vendors, cv, link);
1202 continue;
1203 }
1204
1205 /* Check for device entry */
1206 if (buf[0] == '\t' && sscanf(buf + 1, "%04x %[^\n]", &id, str) == 2) {
1207 if ((id == 0) || (strlen(str) < 1))
1208 continue;
1209 if (cv == NULL) {
1210 warnx("device entry with no vendor!");
1211 continue;
1212 }
1213 if ((cd = malloc(sizeof(struct pci_device_info))) == NULL) {
1214 warn("allocating device entry");
1215 error = 1;
1216 break;
1217 }
1218 if ((cd->desc = strdup(str)) == NULL) {
1219 free(cd);
1220 warn("allocating device description");
1221 error = 1;
1222 break;
1223 }
1224 cd->id = id;
1225 TAILQ_INSERT_TAIL(&cv->devs, cd, link);
1226 continue;
1227 }
1228
1229 /* It's a comment or junk, ignore it */
1230 }
1231 if (ferror(db))
1232 error = 1;
1233 fclose(db);
1234
1235 return(error);
1236 }
1237
1238 uint32_t
read_config(int fd,struct pcisel * sel,long reg,int width)1239 read_config(int fd, struct pcisel *sel, long reg, int width)
1240 {
1241 struct pci_io pi;
1242
1243 pi.pi_sel = *sel;
1244 pi.pi_reg = reg;
1245 pi.pi_width = width;
1246
1247 if (ioctl(fd, PCIOCREAD, &pi) < 0)
1248 err(1, "ioctl(PCIOCREAD)");
1249
1250 return (pi.pi_data);
1251 }
1252
1253 static struct pcisel
getdevice(const char * name)1254 getdevice(const char *name)
1255 {
1256 struct pci_conf_io pc;
1257 struct pci_conf conf[1];
1258 struct pci_match_conf patterns[1];
1259 char *cp;
1260 int fd;
1261
1262 fd = open(_PATH_DEVPCI, O_RDONLY, 0);
1263 if (fd < 0)
1264 err(1, "%s", _PATH_DEVPCI);
1265
1266 bzero(&pc, sizeof(struct pci_conf_io));
1267 pc.match_buf_len = sizeof(conf);
1268 pc.matches = conf;
1269
1270 bzero(&patterns, sizeof(patterns));
1271
1272 /*
1273 * The pattern structure requires the unit to be split out from
1274 * the driver name. Walk backwards from the end of the name to
1275 * find the start of the unit.
1276 */
1277 if (name[0] == '\0')
1278 errx(1, "Empty device name");
1279 cp = strchr(name, '\0');
1280 assert(cp != NULL && cp != name);
1281 cp--;
1282 while (cp != name && isdigit(cp[-1]))
1283 cp--;
1284 if (cp == name || !isdigit(*cp))
1285 errx(1, "Invalid device name");
1286 if ((size_t)(cp - name) + 1 > sizeof(patterns[0].pd_name))
1287 errx(1, "Device name is too long");
1288 memcpy(patterns[0].pd_name, name, cp - name);
1289 patterns[0].pd_unit = strtol(cp, &cp, 10);
1290 if (*cp != '\0')
1291 errx(1, "Invalid device name");
1292 patterns[0].flags = PCI_GETCONF_MATCH_NAME | PCI_GETCONF_MATCH_UNIT;
1293 pc.num_patterns = 1;
1294 pc.pat_buf_len = sizeof(patterns);
1295 pc.patterns = patterns;
1296
1297 if (ioctl(fd, PCIOCGETCONF, &pc) == -1)
1298 err(1, "ioctl(PCIOCGETCONF)");
1299 if (pc.status != PCI_GETCONF_LAST_DEVICE &&
1300 pc.status != PCI_GETCONF_MORE_DEVS)
1301 errx(1, "error returned from PCIOCGETCONF ioctl");
1302 close(fd);
1303 if (pc.num_matches == 0)
1304 errx(1, "Device not found");
1305 return (conf[0].pc_sel);
1306 }
1307
1308 static struct pcisel
parsesel(const char * str)1309 parsesel(const char *str)
1310 {
1311 const char *ep;
1312 char *eppos;
1313 struct pcisel sel;
1314 unsigned long selarr[4];
1315 int i;
1316
1317 ep = strchr(str, '@');
1318 if (ep != NULL)
1319 ep++;
1320 else
1321 ep = str;
1322
1323 if (strncmp(ep, "pci", 3) == 0) {
1324 ep += 3;
1325 i = 0;
1326 while (isdigit(*ep) && i < 4) {
1327 selarr[i++] = strtoul(ep, &eppos, 10);
1328 ep = eppos;
1329 if (*ep == ':')
1330 ep++;
1331 }
1332 if (i > 0 && *ep == '\0') {
1333 sel.pc_func = (i > 2) ? selarr[--i] : 0;
1334 sel.pc_dev = (i > 0) ? selarr[--i] : 0;
1335 sel.pc_bus = (i > 0) ? selarr[--i] : 0;
1336 sel.pc_domain = (i > 0) ? selarr[--i] : 0;
1337 return (sel);
1338 }
1339 }
1340 errx(1, "cannot parse selector %s", str);
1341 }
1342
1343 static struct pcisel
getsel(const char * str)1344 getsel(const char *str)
1345 {
1346
1347 /*
1348 * No device names contain colons and selectors always contain
1349 * at least one colon.
1350 */
1351 if (strchr(str, ':') == NULL)
1352 return (getdevice(str));
1353 else
1354 return (parsesel(str));
1355 }
1356
1357 static void
readit(const char * name,const char * reg,int width)1358 readit(const char *name, const char *reg, int width)
1359 {
1360 long rstart;
1361 long rend;
1362 long r;
1363 char *end;
1364 int i, items_per_line;
1365 int fd;
1366 struct pcisel sel;
1367
1368 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1369 if (fd < 0)
1370 err(1, "%s", _PATH_DEVPCI);
1371
1372 rend = rstart = strtol(reg, &end, 0);
1373 if (*end == ':') {
1374 end++;
1375 rend = strtol(end, NULL, 0);
1376 }
1377 sel = getsel(name);
1378 items_per_line = 16 / width;
1379 for (i = 1, r = rstart; r <= rend; i++, r += width) {
1380 printf("%0*x", width * 2, read_config(fd, &sel, r, width));
1381
1382 /* Use a double space in the middle when outputting bytes. */
1383 if (width == 1 && i % 16 == 8)
1384 putchar(' ');
1385
1386 putchar(i % items_per_line == 0 ? '\n' : ' ');
1387 }
1388 if (i % items_per_line != 1)
1389 putchar('\n');
1390 close(fd);
1391 }
1392
1393 static void
writeit(const char * name,const char * reg,const char * data,int width)1394 writeit(const char *name, const char *reg, const char *data, int width)
1395 {
1396 int fd;
1397 struct pci_io pi;
1398
1399 pi.pi_sel = getsel(name);
1400 pi.pi_reg = strtoul(reg, NULL, 0); /* XXX error check */
1401 pi.pi_width = width;
1402 pi.pi_data = strtoul(data, NULL, 0); /* XXX error check */
1403
1404 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1405 if (fd < 0)
1406 err(1, "%s", _PATH_DEVPCI);
1407
1408 if (ioctl(fd, PCIOCWRITE, &pi) < 0)
1409 err(1, "ioctl(PCIOCWRITE)");
1410 close(fd);
1411 }
1412
1413 static void
chkattached(const char * name)1414 chkattached(const char *name)
1415 {
1416 int fd;
1417 struct pci_io pi;
1418
1419 pi.pi_sel = getsel(name);
1420
1421 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1422 if (fd < 0)
1423 err(1, "%s", _PATH_DEVPCI);
1424
1425 if (ioctl(fd, PCIOCATTACHED, &pi) < 0)
1426 err(1, "ioctl(PCIOCATTACHED)");
1427
1428 exitstatus = pi.pi_data ? 0 : 2; /* exit(2), if NOT attached */
1429 printf("%s: %s%s\n", name, pi.pi_data == 0 ? "not " : "", "attached");
1430 close(fd);
1431 }
1432
1433 static void
map_bar(const char * name,const char * reg,int flags,struct pci_bar_mmap * pbm)1434 map_bar(const char *name, const char *reg, int flags, struct pci_bar_mmap *pbm)
1435 {
1436 int fd;
1437 char *el;
1438
1439 memset(pbm, 0, sizeof(struct pci_bar_mmap));
1440 pbm->pbm_sel = getsel(name);
1441 pbm->pbm_reg = strtoul(reg, &el, 0);
1442 if (*reg == '\0' || *el != '\0')
1443 errx(1, "Invalid bar specification %s", reg);
1444 pbm->pbm_memattr = VM_MEMATTR_DEVICE;
1445 pbm->pbm_flags = flags;
1446
1447 fd = open(_PATH_DEVPCI, O_RDWR, 0);
1448 if (fd < 0)
1449 err(1, "%s", _PATH_DEVPCI);
1450
1451 if (ioctl(fd, PCIOCBARMMAP, pbm) < 0)
1452 err(1, "ioctl(PCIOCBARMMAP)");
1453
1454 close(fd);
1455 }
1456
1457 static void
unmap_bar(struct pci_bar_mmap * pbm)1458 unmap_bar(struct pci_bar_mmap *pbm)
1459 {
1460 munmap(pbm->pbm_map_base, pbm->pbm_map_length);
1461 }
1462
1463 static void
dump_bar(const char * name,const char * reg,const char * bar_start,const char * bar_count,int width,int verbose)1464 dump_bar(const char *name, const char *reg, const char *bar_start,
1465 const char *bar_count, int width, int verbose)
1466 {
1467 struct pci_bar_mmap pbm;
1468 uint32_t *dd;
1469 uint16_t *dh;
1470 uint8_t *db;
1471 uint64_t *dx, a, start, count;
1472 char *el;
1473 size_t res;
1474
1475 start = 0;
1476 if (bar_start != NULL) {
1477 start = strtoul(bar_start, &el, 0);
1478 if (*el != '\0')
1479 errx(1, "Invalid bar start specification %s",
1480 bar_start);
1481 }
1482 count = 0;
1483 if (bar_count != NULL) {
1484 count = strtoul(bar_count, &el, 0);
1485 if (*el != '\0')
1486 errx(1, "Invalid count specification %s",
1487 bar_count);
1488 }
1489
1490 map_bar(name, reg, 0, &pbm);
1491
1492 if (count == 0)
1493 count = pbm.pbm_bar_length / width;
1494 if (start + count < start || (start + count) * width < (uint64_t)width)
1495 errx(1, "(start + count) x width overflow");
1496 if ((start + count) * width > pbm.pbm_bar_length) {
1497 if (start * width > pbm.pbm_bar_length)
1498 count = 0;
1499 else
1500 count = (pbm.pbm_bar_length - start * width) / width;
1501 }
1502 if (verbose) {
1503 fprintf(stderr,
1504 "Dumping pci%d:%d:%d:%d BAR %x mapped base %p "
1505 "off %#x length %#jx from %#jx count %#jx in %d-bytes\n",
1506 pbm.pbm_sel.pc_domain, pbm.pbm_sel.pc_bus,
1507 pbm.pbm_sel.pc_dev, pbm.pbm_sel.pc_func,
1508 pbm.pbm_reg, pbm.pbm_map_base, pbm.pbm_bar_off,
1509 pbm.pbm_bar_length, start, count, width);
1510 }
1511 switch (width) {
1512 case 1:
1513 db = (uint8_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1514 pbm.pbm_bar_off + start * width);
1515 for (a = 0; a < count; a++, db++) {
1516 res = fwrite(db, width, 1, stdout);
1517 if (res != 1) {
1518 errx(1, "error writing to stdout");
1519 break;
1520 }
1521 }
1522 break;
1523 case 2:
1524 dh = (uint16_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1525 pbm.pbm_bar_off + start * width);
1526 for (a = 0; a < count; a++, dh++) {
1527 res = fwrite(dh, width, 1, stdout);
1528 if (res != 1) {
1529 errx(1, "error writing to stdout");
1530 break;
1531 }
1532 }
1533 break;
1534 case 4:
1535 dd = (uint32_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1536 pbm.pbm_bar_off + start * width);
1537 for (a = 0; a < count; a ++, dd++) {
1538 res = fwrite(dd, width, 1, stdout);
1539 if (res != 1) {
1540 errx(1, "error writing to stdout");
1541 break;
1542 }
1543 }
1544 break;
1545 case 8:
1546 dx = (uint64_t *)(uintptr_t)((uintptr_t)pbm.pbm_map_base +
1547 pbm.pbm_bar_off + start * width);
1548 for (a = 0; a < count; a++, dx++) {
1549 res = fwrite(dx, width, 1, stdout);
1550 if (res != 1) {
1551 errx(1, "error writing to stdout");
1552 break;
1553 }
1554 }
1555 break;
1556 default:
1557 errx(1, "invalid access width");
1558 }
1559
1560 unmap_bar(&pbm);
1561 }
1562
1563 union tunion {
1564 uint8_t one;
1565 uint16_t two;
1566 uint32_t four;
1567 uint64_t eight;
1568 uint8_t bytes[8];
1569 };
1570
1571 static void
read_bar(const char * name,const char * bar,const char * start_end,int width)1572 read_bar(const char *name, const char *bar, const char *start_end, int width)
1573 {
1574 struct pci_bar_mmap pbm;
1575 long rstart, rend, r;
1576 char *end;
1577 int items_per_line, i;
1578
1579 rend = rstart = strtol(start_end, &end, 0);
1580 if (*end == ':') {
1581 end++;
1582 rend = strtol(end, NULL, 0);
1583 }
1584
1585 map_bar(name, bar, 0, &pbm);
1586
1587 items_per_line = 16 / width;
1588 for (i = 1, r = rstart; r <= rend; i++, r += width) {
1589 uintptr_t addr;
1590 union tunion t;
1591 int j;
1592
1593 addr = (uintptr_t)pbm.pbm_map_base + pbm.pbm_bar_off + r;
1594 switch (width) {
1595 case 1:
1596 t.one = *((uint8_t *)addr);
1597 break;
1598 case 2:
1599 t.two = *((uint16_t *)addr);
1600 break;
1601 case 4:
1602 t.four = *((uint32_t *)addr);
1603 break;
1604 case 8:
1605 t.eight = *((uint64_t *)addr);
1606 break;
1607 default:
1608 errx(1, "invalid read width");
1609 }
1610 for (j = 0; j < width; j++) {
1611 printf("%02x", t.bytes[j]);
1612 }
1613 /* Use a double space in the middle when outputting bytes. */
1614 if (width == 1 && (i % 16) == 8)
1615 putchar(' ');
1616 putchar(i % items_per_line == 0 ? '\n' : ' ');
1617 }
1618 if (i % items_per_line != 1)
1619 putchar('\n');
1620
1621 unmap_bar(&pbm);
1622 }
1623
1624 static void
write_bar(const char * name,const char * bar,const char * offset_str,const char * value_str,int width)1625 write_bar(const char *name, const char *bar, const char *offset_str,
1626 const char *value_str, int width)
1627 {
1628 struct pci_bar_mmap pbm;
1629 uint64_t offset, value;
1630 uintptr_t addr;
1631 char *el;
1632
1633 offset = strtoul(offset_str, &el, 0);
1634 if (*el != '\0')
1635 errx(1, "Invalid bar offset specification %s", offset_str);
1636 value = strtoul(value_str, (char **)0, 0); /* XXX error check */
1637
1638 map_bar(name, bar, PCIIO_BAR_MMAP_RW, &pbm);
1639
1640 addr = (uintptr_t)pbm.pbm_map_base + pbm.pbm_bar_off + offset;
1641 switch (width) {
1642 case 1:
1643 *((uint8_t *)addr) = value;
1644 break;
1645 case 2:
1646 *((uint16_t *)addr) = value;
1647 break;
1648 case 4:
1649 *((uint32_t *)addr) = value;
1650 break;
1651 case 8:
1652 *((uint64_t *)addr) = value;
1653 break;
1654 default:
1655 errx(1, "invalid write width");
1656 }
1657
1658 unmap_bar(&pbm);
1659 }
1660