xref: /freebsd/sys/dev/usb/serial/umcs.c (revision ca48e43ba9ee73a07cdbad8365117793b01273bb)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * This driver supports several multiport USB-to-RS232 serial adapters driven
31  * by MosChip mos7820 and mos7840, bridge chips.
32  * The adapters are sold under many different brand names.
33  *
34  * Datasheets are available at MosChip www site at
35  * http://www.moschip.com.  The datasheets don't contain full
36  * programming information for the chip.
37  *
38  * It is normal to have only two enabled ports in devices, based on
39  * quad-port mos7840.
40  *
41  */
42 #include <sys/stdint.h>
43 #include <sys/stddef.h>
44 #include <sys/param.h>
45 #include <sys/queue.h>
46 #include <sys/types.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
49 #include <sys/bus.h>
50 #include <sys/linker_set.h>
51 #include <sys/module.h>
52 #include <sys/lock.h>
53 #include <sys/mutex.h>
54 #include <sys/condvar.h>
55 #include <sys/sysctl.h>
56 #include <sys/sx.h>
57 #include <sys/unistd.h>
58 #include <sys/callout.h>
59 #include <sys/malloc.h>
60 #include <sys/priv.h>
61 
62 #include <dev/usb/usb.h>
63 #include <dev/usb/usbdi.h>
64 #include <dev/usb/usbdi_util.h>
65 #include <dev/usb/usb_cdc.h>
66 #include "usbdevs.h"
67 
68 #define	USB_DEBUG_VAR umcs_debug
69 #include <dev/usb/usb_debug.h>
70 #include <dev/usb/usb_process.h>
71 
72 #include <dev/usb/serial/usb_serial.h>
73 
74 #include <dev/usb/serial/umcs.h>
75 
76 #define	UMCS7840_MODVER	1
77 
78 #ifdef USB_DEBUG
79 static int umcs_debug = 0;
80 
81 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
82     "USB umcs quadport serial adapter");
83 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RWTUN, &umcs_debug, 0, "Debug level");
84 #endif					/* USB_DEBUG */
85 
86 /*
87  * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
88  * have ports 0 and 2, with ports 1 and 3 omitted.
89  * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
90  * This driver trys to use physical numbers as much as possible.
91  */
92 
93 /*
94  * Indexed by PHYSICAL port number.
95  * Pack non-regular registers to array to easier if-less access.
96  */
97 struct umcs7840_port_registers {
98 	uint8_t	reg_sp;			/* SP register. */
99 	uint8_t	reg_control;		/* CONTROL register. */
100 	uint8_t	reg_dcr;		/* DCR0 register. DCR1 & DCR2 can be
101 					 * calculated */
102 };
103 
104 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = {
105 	{.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1},
106 	{.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2},
107 	{.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3},
108 	{.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4},
109 };
110 
111 enum {
112 	UMCS7840_BULK_RD_EP,
113 	UMCS7840_BULK_WR_EP,
114 	UMCS7840_N_TRANSFERS
115 };
116 
117 struct umcs7840_softc_oneport {
118 	struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS];	/* Control structures
119 							 * for two transfers */
120 
121 	uint8_t	sc_lcr;			/* local line control register */
122 	uint8_t	sc_mcr;			/* local modem control register */
123 };
124 
125 struct umcs7840_softc {
126 	struct ucom_super_softc sc_super_ucom;
127 	struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS];	/* Need to be continuous
128 							 * array, so indexed by
129 							 * LOGICAL port
130 							 * (subunit) number */
131 
132 	struct usb_xfer *sc_intr_xfer;	/* Interrupt endpoint */
133 
134 	device_t sc_dev;		/* Device for error prints */
135 	struct usb_device *sc_udev;	/* USB Device for all operations */
136 	struct mtx sc_mtx;		/* ucom requires this */
137 
138 	uint8_t	sc_driver_done;		/* Flag when enumeration is finished */
139 
140 	uint8_t	sc_numports;		/* Number of ports (subunits) */
141 	struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS];	/* Indexed by PHYSICAL
142 									 * port number. */
143 };
144 
145 /* prototypes */
146 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *);
147 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t);
148 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *);
149 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t);
150 
151 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t);
152 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *);
153 
154 static void	umcs7840_free(struct ucom_softc *);
155 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *);
156 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t);
157 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t);
158 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t);
159 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *);
160 static void umcs7840_cfg_open(struct ucom_softc *);
161 static void umcs7840_cfg_close(struct ucom_softc *);
162 
163 static int umcs7840_pre_param(struct ucom_softc *, struct termios *);
164 
165 static void umcs7840_start_read(struct ucom_softc *);
166 static void umcs7840_stop_read(struct ucom_softc *);
167 
168 static void umcs7840_start_write(struct ucom_softc *);
169 static void umcs7840_stop_write(struct ucom_softc *);
170 
171 static void umcs7840_poll(struct ucom_softc *ucom);
172 
173 static device_probe_t umcs7840_probe;
174 static device_attach_t umcs7840_attach;
175 static device_detach_t umcs7840_detach;
176 static void umcs7840_free_softc(struct umcs7840_softc *);
177 
178 static usb_callback_t umcs7840_intr_callback;
179 static usb_callback_t umcs7840_read_callback1;
180 static usb_callback_t umcs7840_read_callback2;
181 static usb_callback_t umcs7840_read_callback3;
182 static usb_callback_t umcs7840_read_callback4;
183 static usb_callback_t umcs7840_write_callback1;
184 static usb_callback_t umcs7840_write_callback2;
185 static usb_callback_t umcs7840_write_callback3;
186 static usb_callback_t umcs7840_write_callback4;
187 
188 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
189 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
190 
191 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */
192 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = {
193 	{&umcs7840_read_callback1, &umcs7840_write_callback1},
194 	{&umcs7840_read_callback2, &umcs7840_write_callback2},
195 	{&umcs7840_read_callback3, &umcs7840_write_callback3},
196 	{&umcs7840_read_callback4, &umcs7840_write_callback4},
197 };
198 
199 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = {
200 	[UMCS7840_BULK_RD_EP] = {
201 		.type = UE_BULK,
202 		.endpoint = 0x01,
203 		.direction = UE_DIR_IN,
204 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
205 		.bufsize = 0,		/* use wMaxPacketSize */
206 		.callback = &umcs7840_read_callback1,
207 		.if_index = 0,
208 	},
209 
210 	[UMCS7840_BULK_WR_EP] = {
211 		.type = UE_BULK,
212 		.endpoint = 0x02,
213 		.direction = UE_DIR_OUT,
214 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
215 		.bufsize = 0,		/* use wMaxPacketSize */
216 		.callback = &umcs7840_write_callback1,
217 		.if_index = 0,
218 	},
219 };
220 
221 static const struct usb_config umcs7840_intr_config_data[1] = {
222 	[0] = {
223 		.type = UE_INTERRUPT,
224 		.endpoint = 0x09,
225 		.direction = UE_DIR_IN,
226 		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
227 		.bufsize = 0,		/* use wMaxPacketSize */
228 		.callback = &umcs7840_intr_callback,
229 		.if_index = 0,
230 	},
231 };
232 
233 static struct ucom_callback umcs7840_callback = {
234 	.ucom_cfg_get_status = &umcs7840_cfg_get_status,
235 
236 	.ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr,
237 	.ucom_cfg_set_rts = &umcs7840_cfg_set_rts,
238 	.ucom_cfg_set_break = &umcs7840_cfg_set_break,
239 
240 	.ucom_cfg_param = &umcs7840_cfg_param,
241 	.ucom_cfg_open = &umcs7840_cfg_open,
242 	.ucom_cfg_close = &umcs7840_cfg_close,
243 
244 	.ucom_pre_param = &umcs7840_pre_param,
245 
246 	.ucom_start_read = &umcs7840_start_read,
247 	.ucom_stop_read = &umcs7840_stop_read,
248 
249 	.ucom_start_write = &umcs7840_start_write,
250 	.ucom_stop_write = &umcs7840_stop_write,
251 
252 	.ucom_poll = &umcs7840_poll,
253 	.ucom_free = &umcs7840_free,
254 };
255 
256 static const STRUCT_USB_HOST_ID umcs7840_devs[] = {
257 	{USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)},
258 	{USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)},
259 };
260 
261 static device_method_t umcs7840_methods[] = {
262 	DEVMETHOD(device_probe, umcs7840_probe),
263 	DEVMETHOD(device_attach, umcs7840_attach),
264 	DEVMETHOD(device_detach, umcs7840_detach),
265 	DEVMETHOD_END
266 };
267 
268 static driver_t umcs7840_driver = {
269 	.name = "umcs7840",
270 	.methods = umcs7840_methods,
271 	.size = sizeof(struct umcs7840_softc),
272 };
273 
274 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, 0, 0);
275 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1);
276 MODULE_DEPEND(umcs7840, usb, 1, 1, 1);
277 MODULE_VERSION(umcs7840, UMCS7840_MODVER);
278 USB_PNP_HOST_INFO(umcs7840_devs);
279 
280 static int
umcs7840_probe(device_t dev)281 umcs7840_probe(device_t dev)
282 {
283 	struct usb_attach_arg *uaa = device_get_ivars(dev);
284 
285 	if (uaa->usb_mode != USB_MODE_HOST)
286 		return (ENXIO);
287 	if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX)
288 		return (ENXIO);
289 	if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX)
290 		return (ENXIO);
291 	return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa));
292 }
293 
294 static int
umcs7840_attach(device_t dev)295 umcs7840_attach(device_t dev)
296 {
297 	struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS];
298 	struct usb_attach_arg *uaa = device_get_ivars(dev);
299 	struct umcs7840_softc *sc = device_get_softc(dev);
300 
301 	uint8_t iface_index = MCS7840_IFACE_INDEX;
302 	int error;
303 	int subunit;
304 	int n;
305 	uint8_t data;
306 
307 	for (n = 0; n < UMCS7840_N_TRANSFERS; ++n)
308 		umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n];
309 
310 	device_set_usb_desc(dev);
311 	mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF);
312 	ucom_ref(&sc->sc_super_ucom);
313 
314 	sc->sc_dev = dev;
315 	sc->sc_udev = uaa->device;
316 
317 	/*
318 	 * Get number of ports
319 	 * Documentation (full datasheet) says, that number of ports is
320 	 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only
321 	 * register. But vendor driver uses these undocumented
322 	 * register & bit.
323 	 *
324 	 * Experiments show, that MODE register can have `0'
325 	 * (4 ports) bit on 2-port device, so use vendor driver's way.
326 	 *
327 	 * Also, see notes in header file for these constants.
328 	 */
329 	umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data);
330 	if (data & MCS7840_DEV_GPIO_4PORTS) {
331 		sc->sc_numports = 4;
332 		/* Store physical port numbers in sc_portno */
333 		sc->sc_ucom[0].sc_portno = 0;
334 		sc->sc_ucom[1].sc_portno = 1;
335 		sc->sc_ucom[2].sc_portno = 2;
336 		sc->sc_ucom[3].sc_portno = 3;
337 	} else {
338 		sc->sc_numports = 2;
339 		/* Store physical port numbers in sc_portno */
340 		sc->sc_ucom[0].sc_portno = 0;
341 		sc->sc_ucom[1].sc_portno = 2;	/* '1' is skipped */
342 	}
343 	device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports);
344 	if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) {
345 		device_printf(dev, "On-die configuration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n",
346 		    (data & MCS7840_DEV_MODE_RESET) ? "low" : "high",
347 		    (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no",
348 		    (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail",
349 		    (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail",
350 		    (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4",
351 		    (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled",
352 		    (data & MCS7840_DEV_MODE_IRDA) ? "" : "not ");
353 	}
354 	/* Setup all transfers */
355 	for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
356 		for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) {
357 			/* Set endpoint address */
358 			umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno;
359 			umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n];
360 		}
361 		error = usbd_transfer_setup(uaa->device,
362 		    &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp,
363 		    UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx);
364 		if (error) {
365 			device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n",
366 			    subunit + 1, sc->sc_numports);
367 			goto detach;
368 		}
369 	}
370 	error = usbd_transfer_setup(uaa->device,
371 	    &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data,
372 	    1, sc, &sc->sc_mtx);
373 	if (error) {
374 		device_printf(dev, "allocating USB transfers failed for interrupt\n");
375 		goto detach;
376 	}
377 	/* clear stall at first run */
378 	mtx_lock(&sc->sc_mtx);
379 	for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
380 		usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]);
381 		usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]);
382 	}
383 	mtx_unlock(&sc->sc_mtx);
384 
385 	error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc,
386 	    &umcs7840_callback, &sc->sc_mtx);
387 	if (error)
388 		goto detach;
389 
390 	ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
391 
392 	return (0);
393 
394 detach:
395 	umcs7840_detach(dev);
396 	return (ENXIO);
397 }
398 
399 static int
umcs7840_detach(device_t dev)400 umcs7840_detach(device_t dev)
401 {
402 	struct umcs7840_softc *sc = device_get_softc(dev);
403 	int subunit;
404 
405 	ucom_detach(&sc->sc_super_ucom, sc->sc_ucom);
406 
407 	for (subunit = 0; subunit < sc->sc_numports; ++subunit)
408 		usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
409 	usbd_transfer_unsetup(&sc->sc_intr_xfer, 1);
410 
411 	device_claim_softc(dev);
412 
413 	umcs7840_free_softc(sc);
414 
415 	return (0);
416 }
417 
418 UCOM_UNLOAD_DRAIN(umcs7840);
419 
420 static void
umcs7840_free_softc(struct umcs7840_softc * sc)421 umcs7840_free_softc(struct umcs7840_softc *sc)
422 {
423 	if (ucom_unref(&sc->sc_super_ucom)) {
424 		mtx_destroy(&sc->sc_mtx);
425 		device_free_softc(sc);
426 	}
427 }
428 
429 static void
umcs7840_free(struct ucom_softc * ucom)430 umcs7840_free(struct ucom_softc *ucom)
431 {
432 	umcs7840_free_softc(ucom->sc_parent);
433 }
434 
435 static void
umcs7840_cfg_open(struct ucom_softc * ucom)436 umcs7840_cfg_open(struct ucom_softc *ucom)
437 {
438 	struct umcs7840_softc *sc = ucom->sc_parent;
439 	uint16_t pn = ucom->sc_portno;
440 	uint8_t data;
441 
442 	/* If it very first open, finish global configuration */
443 	if (!sc->sc_driver_done) {
444 		/*
445 		 * USB enumeration is finished, pass internal memory to FIFOs
446 		 * If it is done in the end of "attach", kernel panics.
447 		 */
448 		if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data))
449 			return;
450 		data |= MCS7840_DEV_CONTROL1_DRIVER_DONE;
451 		if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data))
452 			return;
453 		sc->sc_driver_done = 1;
454 	}
455 	/* Toggle reset bit on-off */
456 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
457 		return;
458 	data |= MCS7840_DEV_SPx_UART_RESET;
459 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
460 		return;
461 	data &= ~MCS7840_DEV_SPx_UART_RESET;
462 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
463 		return;
464 
465 	/* Set RS-232 mode */
466 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232))
467 		return;
468 
469 	/* Disable RX on time of initialization */
470 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
471 		return;
472 	data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
473 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
474 		return;
475 
476 	/* Disable all interrupts */
477 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0))
478 		return;
479 
480 	/* Reset FIFO -- documented */
481 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0))
482 		return;
483 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR,
484 	    MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR |
485 	    MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14))
486 		return;
487 
488 	/* Set 8 bit, no parity, 1 stop bit -- documented */
489 	sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1;
490 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr))
491 		return;
492 
493 	/*
494 	 * Enable DTR/RTS on modem control, enable modem interrupts --
495 	 * documented
496 	 */
497 	sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_IE;
498 	if (ucom->sc_tty == NULL || (ucom->sc_tty->t_termios.c_cflag & CNO_RTSDTR) == 0)
499 		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS;
500 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr))
501 		return;
502 
503 	/* Clearing Bulkin and Bulkout FIFO */
504 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
505 		return;
506 	data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO;
507 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
508 		return;
509 	data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO);
510 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
511 		return;
512 
513 	/* Set speed 9600 */
514 	if (umcs7840_set_baudrate(sc, pn, 9600))
515 		return;
516 
517 	/* Finally enable all interrupts -- documented */
518 	/*
519 	 * Copied from vendor driver, I don't know why we should read LCR
520 	 * here
521 	 */
522 	if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr))
523 		return;
524 	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER,
525 	    MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM))
526 		return;
527 
528 	/* Enable RX */
529 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
530 		return;
531 	data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE;
532 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
533 		return;
534 
535 	DPRINTF("Port %d has been opened\n", pn);
536 }
537 
538 static void
umcs7840_cfg_close(struct ucom_softc * ucom)539 umcs7840_cfg_close(struct ucom_softc *ucom)
540 {
541 	struct umcs7840_softc *sc = ucom->sc_parent;
542 	uint16_t pn = ucom->sc_portno;
543 	uint8_t data;
544 
545 	umcs7840_stop_read(ucom);
546 	umcs7840_stop_write(ucom);
547 
548 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0);
549 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0);
550 
551 	/* Disable RX */
552 	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
553 		return;
554 	data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
555 	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
556 		return;
557 	DPRINTF("Port %d has been closed\n", pn);
558 }
559 
560 static void
umcs7840_cfg_set_dtr(struct ucom_softc * ucom,uint8_t onoff)561 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
562 {
563 	struct umcs7840_softc *sc = ucom->sc_parent;
564 	uint8_t pn = ucom->sc_portno;
565 
566 	if (onoff)
567 		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR;
568 	else
569 		sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR;
570 
571 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
572 	DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off");
573 }
574 
575 static void
umcs7840_cfg_set_rts(struct ucom_softc * ucom,uint8_t onoff)576 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
577 {
578 	struct umcs7840_softc *sc = ucom->sc_parent;
579 	uint8_t pn = ucom->sc_portno;
580 
581 	if (onoff)
582 		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS;
583 	else
584 		sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS;
585 
586 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
587 	DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off");
588 }
589 
590 static void
umcs7840_cfg_set_break(struct ucom_softc * ucom,uint8_t onoff)591 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
592 {
593 	struct umcs7840_softc *sc = ucom->sc_parent;
594 	uint8_t pn = ucom->sc_portno;
595 
596 	if (onoff)
597 		sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK;
598 	else
599 		sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK;
600 
601 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
602 	DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off");
603 }
604 
605 static void
umcs7840_cfg_param(struct ucom_softc * ucom,struct termios * t)606 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t)
607 {
608 	struct umcs7840_softc *sc = ucom->sc_parent;
609 	uint8_t pn = ucom->sc_portno;
610 	uint8_t lcr = sc->sc_ports[pn].sc_lcr;
611 	uint8_t mcr = sc->sc_ports[pn].sc_mcr;
612 
613 	DPRINTF("Port %d config:\n", pn);
614 	if (t->c_cflag & CSTOPB) {
615 		DPRINTF("  2 stop bits\n");
616 		lcr |= MCS7840_UART_LCR_STOPB2;
617 	} else {
618 		lcr |= MCS7840_UART_LCR_STOPB1;
619 		DPRINTF("  1 stop bit\n");
620 	}
621 
622 	lcr &= ~MCS7840_UART_LCR_PARITYMASK;
623 	if (t->c_cflag & PARENB) {
624 		lcr |= MCS7840_UART_LCR_PARITYON;
625 		if (t->c_cflag & PARODD) {
626 			lcr = MCS7840_UART_LCR_PARITYODD;
627 			DPRINTF("  parity on - odd\n");
628 		} else {
629 			lcr = MCS7840_UART_LCR_PARITYEVEN;
630 			DPRINTF("  parity on - even\n");
631 		}
632 	} else {
633 		lcr &= ~MCS7840_UART_LCR_PARITYON;
634 		DPRINTF("  parity off\n");
635 	}
636 
637 	lcr &= ~MCS7840_UART_LCR_DATALENMASK;
638 	switch (t->c_cflag & CSIZE) {
639 	case CS5:
640 		lcr |= MCS7840_UART_LCR_DATALEN5;
641 		DPRINTF("  5 bit\n");
642 		break;
643 	case CS6:
644 		lcr |= MCS7840_UART_LCR_DATALEN6;
645 		DPRINTF("  6 bit\n");
646 		break;
647 	case CS7:
648 		lcr |= MCS7840_UART_LCR_DATALEN7;
649 		DPRINTF("  7 bit\n");
650 		break;
651 	case CS8:
652 		lcr |= MCS7840_UART_LCR_DATALEN8;
653 		DPRINTF("  8 bit\n");
654 		break;
655 	}
656 
657 	if (t->c_cflag & CRTSCTS) {
658 		mcr |= MCS7840_UART_MCR_CTSRTS;
659 		DPRINTF("  CTS/RTS\n");
660 	} else
661 		mcr &= ~MCS7840_UART_MCR_CTSRTS;
662 
663 	if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) {
664 		mcr |= MCS7840_UART_MCR_DTRDSR;
665 		DPRINTF("  DTR/DSR\n");
666 	} else
667 		mcr &= ~MCS7840_UART_MCR_DTRDSR;
668 
669 	sc->sc_ports[pn].sc_lcr = lcr;
670 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
671 	DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr);
672 
673 	sc->sc_ports[pn].sc_mcr = mcr;
674 	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
675 	DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr);
676 
677 	umcs7840_set_baudrate(sc, pn, t->c_ospeed);
678 }
679 
680 static int
umcs7840_pre_param(struct ucom_softc * ucom,struct termios * t)681 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t)
682 {
683 	uint8_t clk;
684 	uint16_t divisor;
685 
686 	if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor)
687 		return (EINVAL);
688 	return (0);
689 }
690 
691 static void
umcs7840_start_read(struct ucom_softc * ucom)692 umcs7840_start_read(struct ucom_softc *ucom)
693 {
694 	struct umcs7840_softc *sc = ucom->sc_parent;
695 	uint8_t pn = ucom->sc_portno;
696 
697 	/* Start interrupt transfer */
698 	usbd_transfer_start(sc->sc_intr_xfer);
699 
700 	/* Start read transfer */
701 	usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
702 }
703 
704 static void
umcs7840_stop_read(struct ucom_softc * ucom)705 umcs7840_stop_read(struct ucom_softc *ucom)
706 {
707 	struct umcs7840_softc *sc = ucom->sc_parent;
708 	uint8_t pn = ucom->sc_portno;
709 
710 	/* Stop read transfer */
711 	usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
712 }
713 
714 static void
umcs7840_start_write(struct ucom_softc * ucom)715 umcs7840_start_write(struct ucom_softc *ucom)
716 {
717 	struct umcs7840_softc *sc = ucom->sc_parent;
718 	uint8_t pn = ucom->sc_portno;
719 
720 	/* Start interrupt transfer */
721 	usbd_transfer_start(sc->sc_intr_xfer);
722 
723 	/* Start write transfer */
724 	usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
725 }
726 
727 static void
umcs7840_stop_write(struct ucom_softc * ucom)728 umcs7840_stop_write(struct ucom_softc *ucom)
729 {
730 	struct umcs7840_softc *sc = ucom->sc_parent;
731 	uint8_t pn = ucom->sc_portno;
732 
733 	/* Stop write transfer */
734 	usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
735 }
736 
737 static void
umcs7840_cfg_get_status(struct ucom_softc * ucom,uint8_t * lsr,uint8_t * msr)738 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
739 {
740 	struct umcs7840_softc *sc = ucom->sc_parent;
741 	uint8_t pn = ucom->sc_portno;
742 	uint8_t	hw_msr = 0;	/* local modem status register */
743 
744 	/*
745 	 * Read status registers.  MSR bits need translation from ns16550 to
746 	 * SER_* values.  LSR bits are ns16550 in hardware and ucom.
747 	 */
748 	umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, lsr);
749 	umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr);
750 
751 	if (hw_msr & MCS7840_UART_MSR_NEGCTS)
752 		*msr |= SER_CTS;
753 
754 	if (hw_msr & MCS7840_UART_MSR_NEGDCD)
755 		*msr |= SER_DCD;
756 
757 	if (hw_msr & MCS7840_UART_MSR_NEGRI)
758 		*msr |= SER_RI;
759 
760 	if (hw_msr & MCS7840_UART_MSR_NEGDSR)
761 		*msr |= SER_DSR;
762 
763 	DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr);
764 }
765 
766 static void
umcs7840_intr_callback(struct usb_xfer * xfer,usb_error_t error)767 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error)
768 {
769 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
770 	struct usb_page_cache *pc;
771 	uint8_t buf[13];
772 	int actlen;
773 	int subunit;
774 
775 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
776 
777 	switch (USB_GET_STATE(xfer)) {
778 	case USB_ST_TRANSFERRED:
779 		if (actlen == 5 || actlen == 13) {
780 			pc = usbd_xfer_get_frame(xfer, 0);
781 			usbd_copy_out(pc, 0, buf, actlen);
782 			/* Check status of all ports */
783 			for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
784 				uint8_t pn = sc->sc_ucom[subunit].sc_portno;
785 
786 				if (buf[pn] & MCS7840_UART_ISR_NOPENDING)
787 					continue;
788 				DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK));
789 				switch (buf[pn] & MCS7840_UART_ISR_INTMASK) {
790 				case MCS7840_UART_ISR_RXERR:
791 				case MCS7840_UART_ISR_RXHASDATA:
792 				case MCS7840_UART_ISR_RXTIMEOUT:
793 				case MCS7840_UART_ISR_MSCHANGE:
794 					ucom_status_change(&sc->sc_ucom[subunit]);
795 					break;
796 				default:
797 					/* Do nothing */
798 					break;
799 				}
800 			}
801 		} else
802 			device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen);
803 		/* FALLTHROUGH */
804 	case USB_ST_SETUP:
805 tr_setup:
806 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
807 		usbd_transfer_submit(xfer);
808 		return;
809 
810 	default:			/* Error */
811 		if (error != USB_ERR_CANCELLED) {
812 			/* try to clear stall first */
813 			usbd_xfer_set_stall(xfer);
814 			goto tr_setup;
815 		}
816 		return;
817 	}
818 }
819 
820 static void
umcs7840_read_callback1(struct usb_xfer * xfer,usb_error_t error)821 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error)
822 {
823 	umcs7840_read_callbackN(xfer, error, 0);
824 }
825 
826 static void
umcs7840_read_callback2(struct usb_xfer * xfer,usb_error_t error)827 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error)
828 {
829 	umcs7840_read_callbackN(xfer, error, 1);
830 }
831 static void
umcs7840_read_callback3(struct usb_xfer * xfer,usb_error_t error)832 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error)
833 {
834 	umcs7840_read_callbackN(xfer, error, 2);
835 }
836 
837 static void
umcs7840_read_callback4(struct usb_xfer * xfer,usb_error_t error)838 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error)
839 {
840 	umcs7840_read_callbackN(xfer, error, 3);
841 }
842 
843 static void
umcs7840_read_callbackN(struct usb_xfer * xfer,usb_error_t error,uint8_t subunit)844 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
845 {
846 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
847 	struct ucom_softc *ucom = &sc->sc_ucom[subunit];
848 	struct usb_page_cache *pc;
849 	int actlen;
850 
851 	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
852 
853 	DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen);
854 
855 	switch (USB_GET_STATE(xfer)) {
856 	case USB_ST_TRANSFERRED:
857 		pc = usbd_xfer_get_frame(xfer, 0);
858 		ucom_put_data(ucom, pc, 0, actlen);
859 		/* FALLTHROUGH */
860 	case USB_ST_SETUP:
861 tr_setup:
862 		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
863 		usbd_transfer_submit(xfer);
864 		return;
865 
866 	default:			/* Error */
867 		if (error != USB_ERR_CANCELLED) {
868 			/* try to clear stall first */
869 			usbd_xfer_set_stall(xfer);
870 			goto tr_setup;
871 		}
872 		return;
873 	}
874 }
875 
876 static void
umcs7840_write_callback1(struct usb_xfer * xfer,usb_error_t error)877 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error)
878 {
879 	umcs7840_write_callbackN(xfer, error, 0);
880 }
881 
882 static void
umcs7840_write_callback2(struct usb_xfer * xfer,usb_error_t error)883 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error)
884 {
885 	umcs7840_write_callbackN(xfer, error, 1);
886 }
887 
888 static void
umcs7840_write_callback3(struct usb_xfer * xfer,usb_error_t error)889 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error)
890 {
891 	umcs7840_write_callbackN(xfer, error, 2);
892 }
893 
894 static void
umcs7840_write_callback4(struct usb_xfer * xfer,usb_error_t error)895 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error)
896 {
897 	umcs7840_write_callbackN(xfer, error, 3);
898 }
899 
900 static void
umcs7840_write_callbackN(struct usb_xfer * xfer,usb_error_t error,uint8_t subunit)901 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
902 {
903 	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
904 	struct ucom_softc *ucom = &sc->sc_ucom[subunit];
905 	struct usb_page_cache *pc;
906 	uint32_t actlen;
907 
908 	DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer));
909 
910 	switch (USB_GET_STATE(xfer)) {
911 	case USB_ST_SETUP:
912 	case USB_ST_TRANSFERRED:
913 tr_setup:
914 		pc = usbd_xfer_get_frame(xfer, 0);
915 		if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) {
916 			DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen);
917 			usbd_xfer_set_frame_len(xfer, 0, actlen);
918 			usbd_transfer_submit(xfer);
919 		}
920 		return;
921 
922 	default:			/* Error */
923 		if (error != USB_ERR_CANCELLED) {
924 			/* try to clear stall first */
925 			usbd_xfer_set_stall(xfer);
926 			goto tr_setup;
927 		}
928 		return;
929 	}
930 }
931 
932 static void
umcs7840_poll(struct ucom_softc * ucom)933 umcs7840_poll(struct ucom_softc *ucom)
934 {
935 	struct umcs7840_softc *sc = ucom->sc_parent;
936 
937 	DPRINTF("Port %d poll\n", ucom->sc_portno);
938 	usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
939 	usbd_transfer_poll(&sc->sc_intr_xfer, 1);
940 }
941 
942 static usb_error_t
umcs7840_get_reg_sync(struct umcs7840_softc * sc,uint8_t reg,uint8_t * data)943 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data)
944 {
945 	struct usb_device_request req;
946 	usb_error_t err;
947 	uint16_t len;
948 
949 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
950 	req.bRequest = MCS7840_RDREQ;
951 	USETW(req.wValue, 0);
952 	USETW(req.wIndex, reg);
953 	USETW(req.wLength, UMCS7840_READ_LENGTH);
954 
955 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
956 	if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
957 		device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len);
958 		return (USB_ERR_INVAL);
959 	} else if (err)
960 		device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err));
961 	return (err);
962 }
963 
964 static usb_error_t
umcs7840_set_reg_sync(struct umcs7840_softc * sc,uint8_t reg,uint8_t data)965 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data)
966 {
967 	struct usb_device_request req;
968 	usb_error_t err;
969 
970 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
971 	req.bRequest = MCS7840_WRREQ;
972 	USETW(req.wValue, data);
973 	USETW(req.wIndex, reg);
974 	USETW(req.wLength, 0);
975 
976 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
977 	if (err)
978 		device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err));
979 
980 	return (err);
981 }
982 
983 static usb_error_t
umcs7840_get_UART_reg_sync(struct umcs7840_softc * sc,uint8_t portno,uint8_t reg,uint8_t * data)984 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data)
985 {
986 	struct usb_device_request req;
987 	uint16_t wVal;
988 	usb_error_t err;
989 	uint16_t len;
990 
991 	/* portno is port number */
992 	wVal = ((uint16_t)(portno + 1)) << 8;
993 
994 	req.bmRequestType = UT_READ_VENDOR_DEVICE;
995 	req.bRequest = MCS7840_RDREQ;
996 	USETW(req.wValue, wVal);
997 	USETW(req.wIndex, reg);
998 	USETW(req.wLength, UMCS7840_READ_LENGTH);
999 
1000 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
1001 	if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
1002 		device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len);
1003 		return (USB_ERR_INVAL);
1004 	} else if (err)
1005 		device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1006 	return (err);
1007 }
1008 
1009 static usb_error_t
umcs7840_set_UART_reg_sync(struct umcs7840_softc * sc,uint8_t portno,uint8_t reg,uint8_t data)1010 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data)
1011 {
1012 	struct usb_device_request req;
1013 	usb_error_t err;
1014 	uint16_t wVal;
1015 
1016 	/* portno is port number */
1017 	wVal = ((uint16_t)(portno + 1)) << 8 | data;
1018 
1019 	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1020 	req.bRequest = MCS7840_WRREQ;
1021 	USETW(req.wValue, wVal);
1022 	USETW(req.wIndex, reg);
1023 	USETW(req.wLength, 0);
1024 
1025 	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
1026 	if (err)
1027 		device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1028 	return (err);
1029 }
1030 
1031 static usb_error_t
umcs7840_set_baudrate(struct umcs7840_softc * sc,uint8_t portno,uint32_t rate)1032 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate)
1033 {
1034 	usb_error_t err;
1035 	uint16_t divisor;
1036 	uint8_t clk;
1037 	uint8_t data;
1038 
1039 	if (umcs7840_calc_baudrate(rate, &divisor, &clk)) {
1040 		DPRINTF("Port %d bad speed: %d\n", portno, rate);
1041 		return (-1);
1042 	}
1043 	if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) {
1044 		DPRINTF("Port %d bad speed calculation: %d\n", portno, rate);
1045 		return (-1);
1046 	}
1047 	DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor);
1048 
1049 	/* Set clock source for standard BAUD frequencies */
1050 	err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data);
1051 	if (err)
1052 		return (err);
1053 	data &= MCS7840_DEV_SPx_CLOCK_MASK;
1054 	data |= clk;
1055 	err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data);
1056 	if (err)
1057 		return (err);
1058 
1059 	/* Set divider */
1060 	sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS;
1061 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1062 	if (err)
1063 		return (err);
1064 
1065 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff));
1066 	if (err)
1067 		return (err);
1068 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff));
1069 	if (err)
1070 		return (err);
1071 
1072 	/* Turn off access to DLL/DLM registers of UART */
1073 	sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS;
1074 	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1075 	if (err)
1076 		return (err);
1077 	return (0);
1078 }
1079 
1080 /* Maximum speeds for standard frequencies, when PLL is not used */
1081 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,};
1082 static const uint8_t umcs7840_baudrate_divisors_len = nitems(umcs7840_baudrate_divisors);
1083 
1084 static usb_error_t
umcs7840_calc_baudrate(uint32_t rate,uint16_t * divisor,uint8_t * clk)1085 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk)
1086 {
1087 	uint8_t i = 0;
1088 
1089 	if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1])
1090 		return (-1);
1091 
1092 	for (i = 0; i < umcs7840_baudrate_divisors_len - 1 &&
1093 	    !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i);
1094 	if (rate == 0)
1095 		*divisor = 1;	/* XXX */
1096 	else
1097 		*divisor = umcs7840_baudrate_divisors[i + 1] / rate;
1098 	/* 0x00 .. 0x70 */
1099 	*clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT;
1100 	return (0);
1101 }
1102